spi-bitbang-txrx.h 3.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Mix this utility code with some glue code to get one of several types of
  4. * simple SPI master driver. Two do polled word-at-a-time I/O:
  5. *
  6. * - GPIO/parport bitbangers. Provide chipselect() and txrx_word[](),
  7. * expanding the per-word routines from the inline templates below.
  8. *
  9. * - Drivers for controllers resembling bare shift registers. Provide
  10. * chipselect() and txrx_word[](), with custom setup()/cleanup() methods
  11. * that use your controller's clock and chipselect registers.
  12. *
  13. * Some hardware works well with requests at spi_transfer scope:
  14. *
  15. * - Drivers leveraging smarter hardware, with fifos or DMA; or for half
  16. * duplex (MicroWire) controllers. Provide chipselect() and txrx_bufs(),
  17. * and custom setup()/cleanup() methods.
  18. */
  19. /*
  20. * The code that knows what GPIO pins do what should have declared four
  21. * functions, ideally as inlines, before including this header:
  22. *
  23. * void setsck(struct spi_device *, int is_on);
  24. * void setmosi(struct spi_device *, int is_on);
  25. * int getmiso(struct spi_device *);
  26. * void spidelay(unsigned);
  27. *
  28. * setsck()'s is_on parameter is a zero/nonzero boolean.
  29. *
  30. * setmosi()'s is_on parameter is a zero/nonzero boolean.
  31. *
  32. * getmiso() is required to return 0 or 1 only. Any other value is invalid
  33. * and will result in improper operation.
  34. *
  35. * A non-inlined routine would call bitbang_txrx_*() routines. The
  36. * main loop could easily compile down to a handful of instructions,
  37. * especially if the delay is a NOP (to run at peak speed).
  38. *
  39. * Since this is software, the timings may not be exactly what your board's
  40. * chips need ... there may be several reasons you'd need to tweak timings
  41. * in these routines, not just to make it faster or slower to match a
  42. * particular CPU clock rate.
  43. */
  44. static inline u32
  45. bitbang_txrx_be_cpha0(struct spi_device *spi,
  46. unsigned nsecs, unsigned cpol, unsigned flags,
  47. u32 word, u8 bits)
  48. {
  49. /* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */
  50. u32 oldbit = (!(word & (1<<(bits-1)))) << 31;
  51. /* clock starts at inactive polarity */
  52. for (word <<= (32 - bits); likely(bits); bits--) {
  53. /* setup MSB (to slave) on trailing edge */
  54. if ((flags & SPI_MASTER_NO_TX) == 0) {
  55. if ((word & (1 << 31)) != oldbit) {
  56. setmosi(spi, word & (1 << 31));
  57. oldbit = word & (1 << 31);
  58. }
  59. }
  60. spidelay(nsecs); /* T(setup) */
  61. setsck(spi, !cpol);
  62. spidelay(nsecs);
  63. /* sample MSB (from slave) on leading edge */
  64. word <<= 1;
  65. if ((flags & SPI_MASTER_NO_RX) == 0)
  66. word |= getmiso(spi);
  67. setsck(spi, cpol);
  68. }
  69. return word;
  70. }
  71. static inline u32
  72. bitbang_txrx_be_cpha1(struct spi_device *spi,
  73. unsigned nsecs, unsigned cpol, unsigned flags,
  74. u32 word, u8 bits)
  75. {
  76. /* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */
  77. u32 oldbit = (!(word & (1<<(bits-1)))) << 31;
  78. /* clock starts at inactive polarity */
  79. for (word <<= (32 - bits); likely(bits); bits--) {
  80. /* setup MSB (to slave) on leading edge */
  81. setsck(spi, !cpol);
  82. if ((flags & SPI_MASTER_NO_TX) == 0) {
  83. if ((word & (1 << 31)) != oldbit) {
  84. setmosi(spi, word & (1 << 31));
  85. oldbit = word & (1 << 31);
  86. }
  87. }
  88. spidelay(nsecs); /* T(setup) */
  89. setsck(spi, cpol);
  90. spidelay(nsecs);
  91. /* sample MSB (from slave) on trailing edge */
  92. word <<= 1;
  93. if ((flags & SPI_MASTER_NO_RX) == 0)
  94. word |= getmiso(spi);
  95. }
  96. return word;
  97. }