aspeed-lpc-ctrl.c 7.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright 2017 IBM Corporation
  4. */
  5. #include <linux/clk.h>
  6. #include <linux/mfd/syscon.h>
  7. #include <linux/miscdevice.h>
  8. #include <linux/mm.h>
  9. #include <linux/module.h>
  10. #include <linux/of_address.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/poll.h>
  13. #include <linux/regmap.h>
  14. #include <linux/aspeed-lpc-ctrl.h>
  15. #define DEVICE_NAME "aspeed-lpc-ctrl"
  16. #define HICR5 0x0
  17. #define HICR5_ENL2H BIT(8)
  18. #define HICR5_ENFWH BIT(10)
  19. #define HICR7 0x8
  20. #define HICR8 0xc
  21. struct aspeed_lpc_ctrl {
  22. struct miscdevice miscdev;
  23. struct regmap *regmap;
  24. struct clk *clk;
  25. phys_addr_t mem_base;
  26. resource_size_t mem_size;
  27. u32 pnor_size;
  28. u32 pnor_base;
  29. };
  30. static struct aspeed_lpc_ctrl *file_aspeed_lpc_ctrl(struct file *file)
  31. {
  32. return container_of(file->private_data, struct aspeed_lpc_ctrl,
  33. miscdev);
  34. }
  35. static int aspeed_lpc_ctrl_mmap(struct file *file, struct vm_area_struct *vma)
  36. {
  37. struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
  38. unsigned long vsize = vma->vm_end - vma->vm_start;
  39. pgprot_t prot = vma->vm_page_prot;
  40. if (vma->vm_pgoff + vma_pages(vma) > lpc_ctrl->mem_size >> PAGE_SHIFT)
  41. return -EINVAL;
  42. /* ast2400/2500 AHB accesses are not cache coherent */
  43. prot = pgprot_noncached(prot);
  44. if (remap_pfn_range(vma, vma->vm_start,
  45. (lpc_ctrl->mem_base >> PAGE_SHIFT) + vma->vm_pgoff,
  46. vsize, prot))
  47. return -EAGAIN;
  48. return 0;
  49. }
  50. static long aspeed_lpc_ctrl_ioctl(struct file *file, unsigned int cmd,
  51. unsigned long param)
  52. {
  53. struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
  54. struct device *dev = file->private_data;
  55. void __user *p = (void __user *)param;
  56. struct aspeed_lpc_ctrl_mapping map;
  57. u32 addr;
  58. u32 size;
  59. long rc;
  60. if (copy_from_user(&map, p, sizeof(map)))
  61. return -EFAULT;
  62. if (map.flags != 0)
  63. return -EINVAL;
  64. switch (cmd) {
  65. case ASPEED_LPC_CTRL_IOCTL_GET_SIZE:
  66. /* The flash windows don't report their size */
  67. if (map.window_type != ASPEED_LPC_CTRL_WINDOW_MEMORY)
  68. return -EINVAL;
  69. /* Support more than one window id in the future */
  70. if (map.window_id != 0)
  71. return -EINVAL;
  72. /* If memory-region is not described in device tree */
  73. if (!lpc_ctrl->mem_size) {
  74. dev_dbg(dev, "Didn't find reserved memory\n");
  75. return -ENXIO;
  76. }
  77. map.size = lpc_ctrl->mem_size;
  78. return copy_to_user(p, &map, sizeof(map)) ? -EFAULT : 0;
  79. case ASPEED_LPC_CTRL_IOCTL_MAP:
  80. /*
  81. * The top half of HICR7 is the MSB of the BMC address of the
  82. * mapping.
  83. * The bottom half of HICR7 is the MSB of the HOST LPC
  84. * firmware space address of the mapping.
  85. *
  86. * The 1 bits in the top of half of HICR8 represent the bits
  87. * (in the requested address) that should be ignored and
  88. * replaced with those from the top half of HICR7.
  89. * The 1 bits in the bottom half of HICR8 represent the bits
  90. * (in the requested address) that should be kept and pass
  91. * into the BMC address space.
  92. */
  93. /*
  94. * It doesn't make sense to talk about a size or offset with
  95. * low 16 bits set. Both HICR7 and HICR8 talk about the top 16
  96. * bits of addresses and sizes.
  97. */
  98. if ((map.size & 0x0000ffff) || (map.offset & 0x0000ffff))
  99. return -EINVAL;
  100. /*
  101. * Because of the way the masks work in HICR8 offset has to
  102. * be a multiple of size.
  103. */
  104. if (map.offset & (map.size - 1))
  105. return -EINVAL;
  106. if (map.window_type == ASPEED_LPC_CTRL_WINDOW_FLASH) {
  107. if (!lpc_ctrl->pnor_size) {
  108. dev_dbg(dev, "Didn't find host pnor flash\n");
  109. return -ENXIO;
  110. }
  111. addr = lpc_ctrl->pnor_base;
  112. size = lpc_ctrl->pnor_size;
  113. } else if (map.window_type == ASPEED_LPC_CTRL_WINDOW_MEMORY) {
  114. /* If memory-region is not described in device tree */
  115. if (!lpc_ctrl->mem_size) {
  116. dev_dbg(dev, "Didn't find reserved memory\n");
  117. return -ENXIO;
  118. }
  119. addr = lpc_ctrl->mem_base;
  120. size = lpc_ctrl->mem_size;
  121. } else {
  122. return -EINVAL;
  123. }
  124. /* Check overflow first! */
  125. if (map.offset + map.size < map.offset ||
  126. map.offset + map.size > size)
  127. return -EINVAL;
  128. if (map.size == 0 || map.size > size)
  129. return -EINVAL;
  130. addr += map.offset;
  131. /*
  132. * addr (host lpc address) is safe regardless of values. This
  133. * simply changes the address the host has to request on its
  134. * side of the LPC bus. This cannot impact the hosts own
  135. * memory space by surprise as LPC specific accessors are
  136. * required. The only strange thing that could be done is
  137. * setting the lower 16 bits but the shift takes care of that.
  138. */
  139. rc = regmap_write(lpc_ctrl->regmap, HICR7,
  140. (addr | (map.addr >> 16)));
  141. if (rc)
  142. return rc;
  143. rc = regmap_write(lpc_ctrl->regmap, HICR8,
  144. (~(map.size - 1)) | ((map.size >> 16) - 1));
  145. if (rc)
  146. return rc;
  147. /*
  148. * Enable LPC FHW cycles. This is required for the host to
  149. * access the regions specified.
  150. */
  151. return regmap_update_bits(lpc_ctrl->regmap, HICR5,
  152. HICR5_ENFWH | HICR5_ENL2H,
  153. HICR5_ENFWH | HICR5_ENL2H);
  154. }
  155. return -EINVAL;
  156. }
  157. static const struct file_operations aspeed_lpc_ctrl_fops = {
  158. .owner = THIS_MODULE,
  159. .mmap = aspeed_lpc_ctrl_mmap,
  160. .unlocked_ioctl = aspeed_lpc_ctrl_ioctl,
  161. };
  162. static int aspeed_lpc_ctrl_probe(struct platform_device *pdev)
  163. {
  164. struct aspeed_lpc_ctrl *lpc_ctrl;
  165. struct device_node *node;
  166. struct resource resm;
  167. struct device *dev;
  168. int rc;
  169. dev = &pdev->dev;
  170. lpc_ctrl = devm_kzalloc(dev, sizeof(*lpc_ctrl), GFP_KERNEL);
  171. if (!lpc_ctrl)
  172. return -ENOMEM;
  173. /* If flash is described in device tree then store */
  174. node = of_parse_phandle(dev->of_node, "flash", 0);
  175. if (!node) {
  176. dev_dbg(dev, "Didn't find host pnor flash node\n");
  177. } else {
  178. rc = of_address_to_resource(node, 1, &resm);
  179. of_node_put(node);
  180. if (rc) {
  181. dev_err(dev, "Couldn't address to resource for flash\n");
  182. return rc;
  183. }
  184. lpc_ctrl->pnor_size = resource_size(&resm);
  185. lpc_ctrl->pnor_base = resm.start;
  186. }
  187. dev_set_drvdata(&pdev->dev, lpc_ctrl);
  188. /* If memory-region is described in device tree then store */
  189. node = of_parse_phandle(dev->of_node, "memory-region", 0);
  190. if (!node) {
  191. dev_dbg(dev, "Didn't find reserved memory\n");
  192. } else {
  193. rc = of_address_to_resource(node, 0, &resm);
  194. of_node_put(node);
  195. if (rc) {
  196. dev_err(dev, "Couldn't address to resource for reserved memory\n");
  197. return -ENXIO;
  198. }
  199. lpc_ctrl->mem_size = resource_size(&resm);
  200. lpc_ctrl->mem_base = resm.start;
  201. }
  202. lpc_ctrl->regmap = syscon_node_to_regmap(
  203. pdev->dev.parent->of_node);
  204. if (IS_ERR(lpc_ctrl->regmap)) {
  205. dev_err(dev, "Couldn't get regmap\n");
  206. return -ENODEV;
  207. }
  208. lpc_ctrl->clk = devm_clk_get(dev, NULL);
  209. if (IS_ERR(lpc_ctrl->clk))
  210. return dev_err_probe(dev, PTR_ERR(lpc_ctrl->clk),
  211. "couldn't get clock\n");
  212. rc = clk_prepare_enable(lpc_ctrl->clk);
  213. if (rc) {
  214. dev_err(dev, "couldn't enable clock\n");
  215. return rc;
  216. }
  217. lpc_ctrl->miscdev.minor = MISC_DYNAMIC_MINOR;
  218. lpc_ctrl->miscdev.name = DEVICE_NAME;
  219. lpc_ctrl->miscdev.fops = &aspeed_lpc_ctrl_fops;
  220. lpc_ctrl->miscdev.parent = dev;
  221. rc = misc_register(&lpc_ctrl->miscdev);
  222. if (rc) {
  223. dev_err(dev, "Unable to register device\n");
  224. goto err;
  225. }
  226. return 0;
  227. err:
  228. clk_disable_unprepare(lpc_ctrl->clk);
  229. return rc;
  230. }
  231. static int aspeed_lpc_ctrl_remove(struct platform_device *pdev)
  232. {
  233. struct aspeed_lpc_ctrl *lpc_ctrl = dev_get_drvdata(&pdev->dev);
  234. misc_deregister(&lpc_ctrl->miscdev);
  235. clk_disable_unprepare(lpc_ctrl->clk);
  236. return 0;
  237. }
  238. static const struct of_device_id aspeed_lpc_ctrl_match[] = {
  239. { .compatible = "aspeed,ast2400-lpc-ctrl" },
  240. { .compatible = "aspeed,ast2500-lpc-ctrl" },
  241. { },
  242. };
  243. static struct platform_driver aspeed_lpc_ctrl_driver = {
  244. .driver = {
  245. .name = DEVICE_NAME,
  246. .of_match_table = aspeed_lpc_ctrl_match,
  247. },
  248. .probe = aspeed_lpc_ctrl_probe,
  249. .remove = aspeed_lpc_ctrl_remove,
  250. };
  251. module_platform_driver(aspeed_lpc_ctrl_driver);
  252. MODULE_DEVICE_TABLE(of, aspeed_lpc_ctrl_match);
  253. MODULE_LICENSE("GPL");
  254. MODULE_AUTHOR("Cyril Bur <cyrilbur@gmail.com>");
  255. MODULE_DESCRIPTION("Control for aspeed 2400/2500 LPC HOST to BMC mappings");