qcom_glink_smem.c 6.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2016, Linaro Ltd
  4. */
  5. #include <linux/io.h>
  6. #include <linux/module.h>
  7. #include <linux/of.h>
  8. #include <linux/of_address.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mfd/syscon.h>
  12. #include <linux/slab.h>
  13. #include <linux/rpmsg.h>
  14. #include <linux/idr.h>
  15. #include <linux/circ_buf.h>
  16. #include <linux/soc/qcom/smem.h>
  17. #include <linux/sizes.h>
  18. #include <linux/delay.h>
  19. #include <linux/regmap.h>
  20. #include <linux/workqueue.h>
  21. #include <linux/list.h>
  22. #include <linux/rpmsg/qcom_glink.h>
  23. #include "qcom_glink_native.h"
  24. #define FIFO_FULL_RESERVE 8
  25. #define FIFO_ALIGNMENT 8
  26. #define TX_BLOCKED_CMD_RESERVE 8 /* size of struct read_notif_request */
  27. #define SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR 478
  28. #define SMEM_GLINK_NATIVE_XPRT_FIFO_0 479
  29. #define SMEM_GLINK_NATIVE_XPRT_FIFO_1 480
  30. struct glink_smem_pipe {
  31. struct qcom_glink_pipe native;
  32. __le32 *tail;
  33. __le32 *head;
  34. void *fifo;
  35. int remote_pid;
  36. };
  37. #define to_smem_pipe(p) container_of(p, struct glink_smem_pipe, native)
  38. static size_t glink_smem_rx_avail(struct qcom_glink_pipe *np)
  39. {
  40. struct glink_smem_pipe *pipe = to_smem_pipe(np);
  41. size_t len;
  42. void *fifo;
  43. u32 head;
  44. u32 tail;
  45. if (!pipe->fifo) {
  46. fifo = qcom_smem_get(pipe->remote_pid,
  47. SMEM_GLINK_NATIVE_XPRT_FIFO_1, &len);
  48. if (IS_ERR(fifo)) {
  49. pr_err("failed to acquire RX fifo handle: %ld\n",
  50. PTR_ERR(fifo));
  51. return 0;
  52. }
  53. pipe->fifo = fifo;
  54. pipe->native.length = len;
  55. }
  56. head = le32_to_cpu(*pipe->head);
  57. tail = le32_to_cpu(*pipe->tail);
  58. if (head < tail)
  59. return pipe->native.length - tail + head;
  60. else
  61. return head - tail;
  62. }
  63. static void glink_smem_rx_peak(struct qcom_glink_pipe *np,
  64. void *data, unsigned int offset, size_t count)
  65. {
  66. struct glink_smem_pipe *pipe = to_smem_pipe(np);
  67. size_t len;
  68. u32 tail;
  69. tail = le32_to_cpu(*pipe->tail);
  70. tail += offset;
  71. if (tail >= pipe->native.length)
  72. tail -= pipe->native.length;
  73. len = min_t(size_t, count, pipe->native.length - tail);
  74. if (len)
  75. memcpy_fromio(data, pipe->fifo + tail, len);
  76. if (len != count)
  77. memcpy_fromio(data + len, pipe->fifo, (count - len));
  78. }
  79. static void glink_smem_rx_advance(struct qcom_glink_pipe *np,
  80. size_t count)
  81. {
  82. struct glink_smem_pipe *pipe = to_smem_pipe(np);
  83. u32 tail;
  84. tail = le32_to_cpu(*pipe->tail);
  85. tail += count;
  86. if (tail >= pipe->native.length)
  87. tail -= pipe->native.length;
  88. *pipe->tail = cpu_to_le32(tail);
  89. }
  90. static size_t glink_smem_tx_avail(struct qcom_glink_pipe *np)
  91. {
  92. struct glink_smem_pipe *pipe = to_smem_pipe(np);
  93. u32 head;
  94. u32 tail;
  95. u32 avail;
  96. head = le32_to_cpu(*pipe->head);
  97. tail = le32_to_cpu(*pipe->tail);
  98. if (tail <= head)
  99. avail = pipe->native.length - head + tail;
  100. else
  101. avail = tail - head;
  102. if (avail < (FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE))
  103. avail = 0;
  104. else
  105. avail -= FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE;
  106. return avail;
  107. }
  108. static unsigned int glink_smem_tx_write_one(struct glink_smem_pipe *pipe,
  109. unsigned int head,
  110. const void *data, size_t count)
  111. {
  112. size_t len;
  113. len = min_t(size_t, count, pipe->native.length - head);
  114. if (len)
  115. memcpy(pipe->fifo + head, data, len);
  116. if (len != count)
  117. memcpy(pipe->fifo, data + len, count - len);
  118. head += count;
  119. if (head >= pipe->native.length)
  120. head -= pipe->native.length;
  121. return head;
  122. }
  123. static void glink_smem_tx_write(struct qcom_glink_pipe *glink_pipe,
  124. const void *hdr, size_t hlen,
  125. const void *data, size_t dlen)
  126. {
  127. struct glink_smem_pipe *pipe = to_smem_pipe(glink_pipe);
  128. unsigned int head;
  129. head = le32_to_cpu(*pipe->head);
  130. head = glink_smem_tx_write_one(pipe, head, hdr, hlen);
  131. head = glink_smem_tx_write_one(pipe, head, data, dlen);
  132. /* Ensure head is always aligned to 8 bytes */
  133. head = ALIGN(head, 8);
  134. if (head >= pipe->native.length)
  135. head -= pipe->native.length;
  136. /* Ensure ordering of fifo and head update */
  137. wmb();
  138. *pipe->head = cpu_to_le32(head);
  139. }
  140. static void qcom_glink_smem_release(struct device *dev)
  141. {
  142. kfree(dev);
  143. }
  144. struct qcom_glink *qcom_glink_smem_register(struct device *parent,
  145. struct device_node *node)
  146. {
  147. struct glink_smem_pipe *rx_pipe;
  148. struct glink_smem_pipe *tx_pipe;
  149. struct qcom_glink *glink;
  150. struct device *dev;
  151. u32 remote_pid;
  152. __le32 *descs;
  153. size_t size;
  154. int ret;
  155. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  156. if (!dev)
  157. return ERR_PTR(-ENOMEM);
  158. dev->parent = parent;
  159. dev->of_node = node;
  160. dev->release = qcom_glink_smem_release;
  161. dev_set_name(dev, "%s:%pOFn", dev_name(parent->parent), node);
  162. ret = device_register(dev);
  163. if (ret) {
  164. pr_err("failed to register glink edge\n");
  165. put_device(dev);
  166. return ERR_PTR(ret);
  167. }
  168. ret = of_property_read_u32(dev->of_node, "qcom,remote-pid",
  169. &remote_pid);
  170. if (ret) {
  171. dev_err(dev, "failed to parse qcom,remote-pid\n");
  172. goto err_put_dev;
  173. }
  174. rx_pipe = devm_kzalloc(dev, sizeof(*rx_pipe), GFP_KERNEL);
  175. tx_pipe = devm_kzalloc(dev, sizeof(*tx_pipe), GFP_KERNEL);
  176. if (!rx_pipe || !tx_pipe) {
  177. ret = -ENOMEM;
  178. goto err_put_dev;
  179. }
  180. ret = qcom_smem_alloc(remote_pid,
  181. SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, 32);
  182. if (ret && ret != -EEXIST) {
  183. dev_err(dev, "failed to allocate glink descriptors\n");
  184. goto err_put_dev;
  185. }
  186. descs = qcom_smem_get(remote_pid,
  187. SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, &size);
  188. if (IS_ERR(descs)) {
  189. dev_err(dev, "failed to acquire xprt descriptor\n");
  190. ret = PTR_ERR(descs);
  191. goto err_put_dev;
  192. }
  193. if (size != 32) {
  194. dev_err(dev, "glink descriptor of invalid size\n");
  195. ret = -EINVAL;
  196. goto err_put_dev;
  197. }
  198. tx_pipe->tail = &descs[0];
  199. tx_pipe->head = &descs[1];
  200. rx_pipe->tail = &descs[2];
  201. rx_pipe->head = &descs[3];
  202. ret = qcom_smem_alloc(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
  203. SZ_16K);
  204. if (ret && ret != -EEXIST) {
  205. dev_err(dev, "failed to allocate TX fifo\n");
  206. goto err_put_dev;
  207. }
  208. tx_pipe->fifo = qcom_smem_get(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
  209. &tx_pipe->native.length);
  210. if (IS_ERR(tx_pipe->fifo)) {
  211. dev_err(dev, "failed to acquire TX fifo\n");
  212. ret = PTR_ERR(tx_pipe->fifo);
  213. goto err_put_dev;
  214. }
  215. rx_pipe->native.avail = glink_smem_rx_avail;
  216. rx_pipe->native.peak = glink_smem_rx_peak;
  217. rx_pipe->native.advance = glink_smem_rx_advance;
  218. rx_pipe->remote_pid = remote_pid;
  219. tx_pipe->native.avail = glink_smem_tx_avail;
  220. tx_pipe->native.write = glink_smem_tx_write;
  221. tx_pipe->remote_pid = remote_pid;
  222. *rx_pipe->tail = 0;
  223. *tx_pipe->head = 0;
  224. glink = qcom_glink_native_probe(dev,
  225. GLINK_FEATURE_INTENT_REUSE,
  226. &rx_pipe->native, &tx_pipe->native,
  227. false);
  228. if (IS_ERR(glink)) {
  229. ret = PTR_ERR(glink);
  230. goto err_put_dev;
  231. }
  232. return glink;
  233. err_put_dev:
  234. device_unregister(dev);
  235. return ERR_PTR(ret);
  236. }
  237. EXPORT_SYMBOL_GPL(qcom_glink_smem_register);
  238. void qcom_glink_smem_unregister(struct qcom_glink *glink)
  239. {
  240. qcom_glink_native_remove(glink);
  241. qcom_glink_native_unregister(glink);
  242. }
  243. EXPORT_SYMBOL_GPL(qcom_glink_smem_unregister);
  244. MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@linaro.org>");
  245. MODULE_DESCRIPTION("Qualcomm GLINK SMEM driver");
  246. MODULE_LICENSE("GPL v2");