reset-qcom-aoss.c 3.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2018 The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/platform_device.h>
  7. #include <linux/reset-controller.h>
  8. #include <linux/delay.h>
  9. #include <linux/io.h>
  10. #include <linux/of_device.h>
  11. #include <dt-bindings/reset/qcom,sdm845-aoss.h>
  12. struct qcom_aoss_reset_map {
  13. unsigned int reg;
  14. };
  15. struct qcom_aoss_desc {
  16. const struct qcom_aoss_reset_map *resets;
  17. size_t num_resets;
  18. };
  19. struct qcom_aoss_reset_data {
  20. struct reset_controller_dev rcdev;
  21. void __iomem *base;
  22. const struct qcom_aoss_desc *desc;
  23. };
  24. static const struct qcom_aoss_reset_map sdm845_aoss_resets[] = {
  25. [AOSS_CC_MSS_RESTART] = {0x10000},
  26. [AOSS_CC_CAMSS_RESTART] = {0x11000},
  27. [AOSS_CC_VENUS_RESTART] = {0x12000},
  28. [AOSS_CC_GPU_RESTART] = {0x13000},
  29. [AOSS_CC_DISPSS_RESTART] = {0x14000},
  30. [AOSS_CC_WCSS_RESTART] = {0x20000},
  31. [AOSS_CC_LPASS_RESTART] = {0x30000},
  32. };
  33. static const struct qcom_aoss_desc sdm845_aoss_desc = {
  34. .resets = sdm845_aoss_resets,
  35. .num_resets = ARRAY_SIZE(sdm845_aoss_resets),
  36. };
  37. static inline struct qcom_aoss_reset_data *to_qcom_aoss_reset_data(
  38. struct reset_controller_dev *rcdev)
  39. {
  40. return container_of(rcdev, struct qcom_aoss_reset_data, rcdev);
  41. }
  42. static int qcom_aoss_control_assert(struct reset_controller_dev *rcdev,
  43. unsigned long idx)
  44. {
  45. struct qcom_aoss_reset_data *data = to_qcom_aoss_reset_data(rcdev);
  46. const struct qcom_aoss_reset_map *map = &data->desc->resets[idx];
  47. writel(1, data->base + map->reg);
  48. /* Wait 6 32kHz sleep cycles for reset */
  49. usleep_range(200, 300);
  50. return 0;
  51. }
  52. static int qcom_aoss_control_deassert(struct reset_controller_dev *rcdev,
  53. unsigned long idx)
  54. {
  55. struct qcom_aoss_reset_data *data = to_qcom_aoss_reset_data(rcdev);
  56. const struct qcom_aoss_reset_map *map = &data->desc->resets[idx];
  57. writel(0, data->base + map->reg);
  58. /* Wait 6 32kHz sleep cycles for reset */
  59. usleep_range(200, 300);
  60. return 0;
  61. }
  62. static int qcom_aoss_control_reset(struct reset_controller_dev *rcdev,
  63. unsigned long idx)
  64. {
  65. qcom_aoss_control_assert(rcdev, idx);
  66. return qcom_aoss_control_deassert(rcdev, idx);
  67. }
  68. static const struct reset_control_ops qcom_aoss_reset_ops = {
  69. .reset = qcom_aoss_control_reset,
  70. .assert = qcom_aoss_control_assert,
  71. .deassert = qcom_aoss_control_deassert,
  72. };
  73. static int qcom_aoss_reset_probe(struct platform_device *pdev)
  74. {
  75. struct qcom_aoss_reset_data *data;
  76. struct device *dev = &pdev->dev;
  77. const struct qcom_aoss_desc *desc;
  78. struct resource *res;
  79. desc = of_device_get_match_data(dev);
  80. if (!desc)
  81. return -EINVAL;
  82. data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
  83. if (!data)
  84. return -ENOMEM;
  85. data->desc = desc;
  86. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  87. data->base = devm_ioremap_resource(dev, res);
  88. if (IS_ERR(data->base))
  89. return PTR_ERR(data->base);
  90. data->rcdev.owner = THIS_MODULE;
  91. data->rcdev.ops = &qcom_aoss_reset_ops;
  92. data->rcdev.nr_resets = desc->num_resets;
  93. data->rcdev.of_node = dev->of_node;
  94. return devm_reset_controller_register(dev, &data->rcdev);
  95. }
  96. static const struct of_device_id qcom_aoss_reset_of_match[] = {
  97. { .compatible = "qcom,sdm845-aoss-cc", .data = &sdm845_aoss_desc },
  98. {}
  99. };
  100. MODULE_DEVICE_TABLE(of, qcom_aoss_reset_of_match);
  101. static struct platform_driver qcom_aoss_reset_driver = {
  102. .probe = qcom_aoss_reset_probe,
  103. .driver = {
  104. .name = "qcom_aoss_reset",
  105. .of_match_table = qcom_aoss_reset_of_match,
  106. },
  107. };
  108. module_platform_driver(qcom_aoss_reset_driver);
  109. MODULE_DESCRIPTION("Qualcomm AOSS Reset Driver");
  110. MODULE_LICENSE("GPL v2");