reset-hsdk.c 3.5 KB

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  1. /*
  2. * Copyright (C) 2017 Synopsys.
  3. *
  4. * Synopsys HSDK Development platform reset driver.
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/delay.h>
  11. #include <linux/io.h>
  12. #include <linux/iopoll.h>
  13. #include <linux/module.h>
  14. #include <linux/of.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/reset-controller.h>
  17. #include <linux/slab.h>
  18. #include <linux/types.h>
  19. #define to_hsdk_rst(p) container_of((p), struct hsdk_rst, rcdev)
  20. struct hsdk_rst {
  21. void __iomem *regs_ctl;
  22. void __iomem *regs_rst;
  23. spinlock_t lock;
  24. struct reset_controller_dev rcdev;
  25. };
  26. static const u32 rst_map[] = {
  27. BIT(16), /* APB_RST */
  28. BIT(17), /* AXI_RST */
  29. BIT(18), /* ETH_RST */
  30. BIT(19), /* USB_RST */
  31. BIT(20), /* SDIO_RST */
  32. BIT(21), /* HDMI_RST */
  33. BIT(22), /* GFX_RST */
  34. BIT(25), /* DMAC_RST */
  35. BIT(31), /* EBI_RST */
  36. };
  37. #define HSDK_MAX_RESETS ARRAY_SIZE(rst_map)
  38. #define CGU_SYS_RST_CTRL 0x0
  39. #define CGU_IP_SW_RESET 0x0
  40. #define CGU_IP_SW_RESET_DELAY_SHIFT 16
  41. #define CGU_IP_SW_RESET_DELAY_MASK GENMASK(31, CGU_IP_SW_RESET_DELAY_SHIFT)
  42. #define CGU_IP_SW_RESET_DELAY 0
  43. #define CGU_IP_SW_RESET_RESET BIT(0)
  44. #define SW_RESET_TIMEOUT 10000
  45. static void hsdk_reset_config(struct hsdk_rst *rst, unsigned long id)
  46. {
  47. writel(rst_map[id], rst->regs_ctl + CGU_SYS_RST_CTRL);
  48. }
  49. static int hsdk_reset_do(struct hsdk_rst *rst)
  50. {
  51. u32 reg;
  52. reg = readl(rst->regs_rst + CGU_IP_SW_RESET);
  53. reg &= ~CGU_IP_SW_RESET_DELAY_MASK;
  54. reg |= CGU_IP_SW_RESET_DELAY << CGU_IP_SW_RESET_DELAY_SHIFT;
  55. reg |= CGU_IP_SW_RESET_RESET;
  56. writel(reg, rst->regs_rst + CGU_IP_SW_RESET);
  57. /* wait till reset bit is back to 0 */
  58. return readl_poll_timeout_atomic(rst->regs_rst + CGU_IP_SW_RESET, reg,
  59. !(reg & CGU_IP_SW_RESET_RESET), 5, SW_RESET_TIMEOUT);
  60. }
  61. static int hsdk_reset_reset(struct reset_controller_dev *rcdev,
  62. unsigned long id)
  63. {
  64. struct hsdk_rst *rst = to_hsdk_rst(rcdev);
  65. unsigned long flags;
  66. int ret;
  67. spin_lock_irqsave(&rst->lock, flags);
  68. hsdk_reset_config(rst, id);
  69. ret = hsdk_reset_do(rst);
  70. spin_unlock_irqrestore(&rst->lock, flags);
  71. return ret;
  72. }
  73. static const struct reset_control_ops hsdk_reset_ops = {
  74. .reset = hsdk_reset_reset,
  75. .deassert = hsdk_reset_reset,
  76. };
  77. static int hsdk_reset_probe(struct platform_device *pdev)
  78. {
  79. struct hsdk_rst *rst;
  80. struct resource *mem;
  81. rst = devm_kzalloc(&pdev->dev, sizeof(*rst), GFP_KERNEL);
  82. if (!rst)
  83. return -ENOMEM;
  84. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  85. rst->regs_ctl = devm_ioremap_resource(&pdev->dev, mem);
  86. if (IS_ERR(rst->regs_ctl))
  87. return PTR_ERR(rst->regs_ctl);
  88. mem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  89. rst->regs_rst = devm_ioremap_resource(&pdev->dev, mem);
  90. if (IS_ERR(rst->regs_rst))
  91. return PTR_ERR(rst->regs_rst);
  92. spin_lock_init(&rst->lock);
  93. rst->rcdev.owner = THIS_MODULE;
  94. rst->rcdev.ops = &hsdk_reset_ops;
  95. rst->rcdev.of_node = pdev->dev.of_node;
  96. rst->rcdev.nr_resets = HSDK_MAX_RESETS;
  97. rst->rcdev.of_reset_n_cells = 1;
  98. return reset_controller_register(&rst->rcdev);
  99. }
  100. static const struct of_device_id hsdk_reset_dt_match[] = {
  101. { .compatible = "snps,hsdk-reset" },
  102. { },
  103. };
  104. static struct platform_driver hsdk_reset_driver = {
  105. .probe = hsdk_reset_probe,
  106. .driver = {
  107. .name = "hsdk-reset",
  108. .of_match_table = hsdk_reset_dt_match,
  109. },
  110. };
  111. builtin_platform_driver(hsdk_reset_driver);
  112. MODULE_AUTHOR("Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>");
  113. MODULE_DESCRIPTION("Synopsys HSDK SDP reset driver");
  114. MODULE_LICENSE("GPL v2");