Kconfig 7.8 KB

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  1. # SPDX-License-Identifier: GPL-2.0-only
  2. config ARCH_HAS_RESET_CONTROLLER
  3. bool
  4. menuconfig RESET_CONTROLLER
  5. bool "Reset Controller Support"
  6. default y if ARCH_HAS_RESET_CONTROLLER
  7. help
  8. Generic Reset Controller support.
  9. This framework is designed to abstract reset handling of devices
  10. via GPIOs or SoC-internal reset controller modules.
  11. If unsure, say no.
  12. if RESET_CONTROLLER
  13. config RESET_A10SR
  14. tristate "Altera Arria10 System Resource Reset"
  15. depends on MFD_ALTERA_A10SR
  16. help
  17. This option enables support for the external reset functions for
  18. peripheral PHYs on the Altera Arria10 System Resource Chip.
  19. config RESET_ATH79
  20. bool "AR71xx Reset Driver" if COMPILE_TEST
  21. default ATH79
  22. help
  23. This enables the ATH79 reset controller driver that supports the
  24. AR71xx SoC reset controller.
  25. config RESET_AXS10X
  26. bool "AXS10x Reset Driver" if COMPILE_TEST
  27. default ARC_PLAT_AXS10X
  28. help
  29. This enables the reset controller driver for AXS10x.
  30. config RESET_BERLIN
  31. bool "Berlin Reset Driver" if COMPILE_TEST
  32. default ARCH_BERLIN
  33. help
  34. This enables the reset controller driver for Marvell Berlin SoCs.
  35. config RESET_BRCMSTB
  36. tristate "Broadcom STB reset controller"
  37. depends on ARCH_BRCMSTB || COMPILE_TEST
  38. default ARCH_BRCMSTB
  39. help
  40. This enables the reset controller driver for Broadcom STB SoCs using
  41. a SUN_TOP_CTRL_SW_INIT style controller.
  42. config RESET_BRCMSTB_RESCAL
  43. bool "Broadcom STB RESCAL reset controller"
  44. depends on HAS_IOMEM
  45. depends on ARCH_BRCMSTB || COMPILE_TEST
  46. default ARCH_BRCMSTB
  47. help
  48. This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
  49. BCM7216.
  50. config RESET_HSDK
  51. bool "Synopsys HSDK Reset Driver"
  52. depends on HAS_IOMEM
  53. depends on ARC_SOC_HSDK || COMPILE_TEST
  54. help
  55. This enables the reset controller driver for HSDK board.
  56. config RESET_IMX7
  57. tristate "i.MX7/8 Reset Driver"
  58. depends on HAS_IOMEM
  59. depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST
  60. default y if SOC_IMX7D
  61. select MFD_SYSCON
  62. help
  63. This enables the reset controller driver for i.MX7 SoCs.
  64. config RESET_INTEL_GW
  65. bool "Intel Reset Controller Driver"
  66. depends on X86 || COMPILE_TEST
  67. depends on OF && HAS_IOMEM
  68. select REGMAP_MMIO
  69. help
  70. This enables the reset controller driver for Intel Gateway SoCs.
  71. Say Y to control the reset signals provided by reset controller.
  72. Otherwise, say N.
  73. config RESET_LANTIQ
  74. bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
  75. default SOC_TYPE_XWAY
  76. help
  77. This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
  78. config RESET_LPC18XX
  79. bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
  80. default ARCH_LPC18XX
  81. help
  82. This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
  83. config RESET_MESON
  84. tristate "Meson Reset Driver"
  85. depends on ARCH_MESON || COMPILE_TEST
  86. default ARCH_MESON
  87. help
  88. This enables the reset driver for Amlogic Meson SoCs.
  89. config RESET_MESON_AUDIO_ARB
  90. tristate "Meson Audio Memory Arbiter Reset Driver"
  91. depends on ARCH_MESON || COMPILE_TEST
  92. help
  93. This enables the reset driver for Audio Memory Arbiter of
  94. Amlogic's A113 based SoCs
  95. config RESET_NPCM
  96. bool "NPCM BMC Reset Driver" if COMPILE_TEST
  97. default ARCH_NPCM
  98. help
  99. This enables the reset controller driver for Nuvoton NPCM
  100. BMC SoCs.
  101. config RESET_OXNAS
  102. bool
  103. config RESET_PISTACHIO
  104. bool "Pistachio Reset Driver" if COMPILE_TEST
  105. default MACH_PISTACHIO
  106. help
  107. This enables the reset driver for ImgTec Pistachio SoCs.
  108. config RESET_QCOM_AOSS
  109. tristate "Qcom AOSS Reset Driver"
  110. depends on ARCH_QCOM || COMPILE_TEST
  111. help
  112. This enables the AOSS (always on subsystem) reset driver
  113. for Qualcomm SDM845 SoCs. Say Y if you want to control
  114. reset signals provided by AOSS for Modem, Venus, ADSP,
  115. GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
  116. config RESET_QCOM_PDC
  117. tristate "Qualcomm PDC Reset Driver"
  118. depends on ARCH_QCOM || COMPILE_TEST
  119. help
  120. This enables the PDC (Power Domain Controller) reset driver
  121. for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
  122. to control reset signals provided by PDC for Modem, Compute,
  123. Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
  124. config RESET_RASPBERRYPI
  125. tristate "Raspberry Pi 4 Firmware Reset Driver"
  126. depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
  127. default USB_XHCI_PCI
  128. help
  129. Raspberry Pi 4's co-processor controls some of the board's HW
  130. initialization process, but it's up to Linux to trigger it when
  131. relevant. This driver provides a reset controller capable of
  132. interfacing with RPi4's co-processor and model these firmware
  133. initialization routines as reset lines.
  134. config RESET_SCMI
  135. tristate "Reset driver controlled via ARM SCMI interface"
  136. depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
  137. default ARM_SCMI_PROTOCOL
  138. help
  139. This driver provides support for reset signal/domains that are
  140. controlled by firmware that implements the SCMI interface.
  141. This driver uses SCMI Message Protocol to interact with the
  142. firmware controlling all the reset signals.
  143. config RESET_SIMPLE
  144. bool "Simple Reset Controller Driver" if COMPILE_TEST
  145. default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
  146. help
  147. This enables a simple reset controller driver for reset lines that
  148. that can be asserted and deasserted by toggling bits in a contiguous,
  149. exclusive register space.
  150. Currently this driver supports:
  151. - Altera SoCFPGAs
  152. - ASPEED BMC SoCs
  153. - Bitmain BM1880 SoC
  154. - Realtek SoCs
  155. - RCC reset controller in STM32 MCUs
  156. - Allwinner SoCs
  157. - ZTE's zx2967 family
  158. config RESET_STM32MP157
  159. bool "STM32MP157 Reset Driver" if COMPILE_TEST
  160. default MACH_STM32MP157
  161. help
  162. This enables the RCC reset controller driver for STM32 MPUs.
  163. config RESET_SOCFPGA
  164. bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA
  165. default ARCH_SOCFPGA
  166. select RESET_SIMPLE
  167. help
  168. This enables the reset driver for the SoCFPGA ARMv7 platforms. This
  169. driver gets initialized early during platform init calls.
  170. config RESET_SUNXI
  171. bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
  172. default ARCH_SUNXI
  173. select RESET_SIMPLE
  174. help
  175. This enables the reset driver for Allwinner SoCs.
  176. config RESET_TI_SCI
  177. tristate "TI System Control Interface (TI-SCI) reset driver"
  178. depends on TI_SCI_PROTOCOL
  179. help
  180. This enables the reset driver support over TI System Control Interface
  181. available on some new TI's SoCs. If you wish to use reset resources
  182. managed by the TI System Controller, say Y here. Otherwise, say N.
  183. config RESET_TI_SYSCON
  184. tristate "TI SYSCON Reset Driver"
  185. depends on HAS_IOMEM
  186. select MFD_SYSCON
  187. help
  188. This enables the reset driver support for TI devices with
  189. memory-mapped reset registers as part of a syscon device node. If
  190. you wish to use the reset framework for such memory-mapped devices,
  191. say Y here. Otherwise, say N.
  192. config RESET_UNIPHIER
  193. tristate "Reset controller driver for UniPhier SoCs"
  194. depends on ARCH_UNIPHIER || COMPILE_TEST
  195. depends on OF && MFD_SYSCON
  196. default ARCH_UNIPHIER
  197. help
  198. Support for reset controllers on UniPhier SoCs.
  199. Say Y if you want to control reset signals provided by System Control
  200. block, Media I/O block, Peripheral Block.
  201. config RESET_UNIPHIER_GLUE
  202. tristate "Reset driver in glue layer for UniPhier SoCs"
  203. depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
  204. default ARCH_UNIPHIER
  205. select RESET_SIMPLE
  206. help
  207. Support for peripheral core reset included in its own glue layer
  208. on UniPhier SoCs. Say Y if you want to control reset signals
  209. provided by the glue layer.
  210. config RESET_ZYNQ
  211. bool "ZYNQ Reset Driver" if COMPILE_TEST
  212. default ARCH_ZYNQ
  213. help
  214. This enables the reset controller driver for Xilinx Zynq SoCs.
  215. config RESET_LIGHT
  216. bool "thead-light Reset Driver" if COMPILE_TEST
  217. default y
  218. help
  219. This enables the reset controller driver for thead-light SoCs.
  220. source "drivers/reset/sti/Kconfig"
  221. source "drivers/reset/hisilicon/Kconfig"
  222. source "drivers/reset/tegra/Kconfig"
  223. endif