stm32_rproc.c 21 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
  4. * Authors: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
  5. * Fabien Dessenne <fabien.dessenne@st.com> for STMicroelectronics.
  6. */
  7. #include <linux/arm-smccc.h>
  8. #include <linux/dma-mapping.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/io.h>
  11. #include <linux/mailbox_client.h>
  12. #include <linux/mfd/syscon.h>
  13. #include <linux/module.h>
  14. #include <linux/of_address.h>
  15. #include <linux/of_device.h>
  16. #include <linux/of_reserved_mem.h>
  17. #include <linux/pm_wakeirq.h>
  18. #include <linux/regmap.h>
  19. #include <linux/remoteproc.h>
  20. #include <linux/reset.h>
  21. #include <linux/slab.h>
  22. #include <linux/workqueue.h>
  23. #include "remoteproc_internal.h"
  24. #define HOLD_BOOT 0
  25. #define RELEASE_BOOT 1
  26. #define MBOX_NB_VQ 2
  27. #define MBOX_NB_MBX 3
  28. #define STM32_SMC_RCC 0x82001000
  29. #define STM32_SMC_REG_WRITE 0x1
  30. #define STM32_MBX_VQ0 "vq0"
  31. #define STM32_MBX_VQ0_ID 0
  32. #define STM32_MBX_VQ1 "vq1"
  33. #define STM32_MBX_VQ1_ID 1
  34. #define STM32_MBX_SHUTDOWN "shutdown"
  35. #define RSC_TBL_SIZE 1024
  36. #define M4_STATE_OFF 0
  37. #define M4_STATE_INI 1
  38. #define M4_STATE_CRUN 2
  39. #define M4_STATE_CSTOP 3
  40. #define M4_STATE_STANDBY 4
  41. #define M4_STATE_CRASH 5
  42. struct stm32_syscon {
  43. struct regmap *map;
  44. u32 reg;
  45. u32 mask;
  46. };
  47. struct stm32_rproc_mem {
  48. char name[20];
  49. void __iomem *cpu_addr;
  50. phys_addr_t bus_addr;
  51. u32 dev_addr;
  52. size_t size;
  53. };
  54. struct stm32_rproc_mem_ranges {
  55. u32 dev_addr;
  56. u32 bus_addr;
  57. u32 size;
  58. };
  59. struct stm32_mbox {
  60. const unsigned char name[10];
  61. struct mbox_chan *chan;
  62. struct mbox_client client;
  63. struct work_struct vq_work;
  64. int vq_id;
  65. };
  66. struct stm32_rproc {
  67. struct reset_control *rst;
  68. struct stm32_syscon hold_boot;
  69. struct stm32_syscon pdds;
  70. struct stm32_syscon m4_state;
  71. struct stm32_syscon rsctbl;
  72. int wdg_irq;
  73. u32 nb_rmems;
  74. struct stm32_rproc_mem *rmems;
  75. struct stm32_mbox mb[MBOX_NB_MBX];
  76. struct workqueue_struct *workqueue;
  77. bool secured_soc;
  78. void __iomem *rsc_va;
  79. };
  80. static int stm32_rproc_pa_to_da(struct rproc *rproc, phys_addr_t pa, u64 *da)
  81. {
  82. unsigned int i;
  83. struct stm32_rproc *ddata = rproc->priv;
  84. struct stm32_rproc_mem *p_mem;
  85. for (i = 0; i < ddata->nb_rmems; i++) {
  86. p_mem = &ddata->rmems[i];
  87. if (pa < p_mem->bus_addr ||
  88. pa >= p_mem->bus_addr + p_mem->size)
  89. continue;
  90. *da = pa - p_mem->bus_addr + p_mem->dev_addr;
  91. dev_dbg(rproc->dev.parent, "pa %pa to da %llx\n", &pa, *da);
  92. return 0;
  93. }
  94. return -EINVAL;
  95. }
  96. static int stm32_rproc_mem_alloc(struct rproc *rproc,
  97. struct rproc_mem_entry *mem)
  98. {
  99. struct device *dev = rproc->dev.parent;
  100. void *va;
  101. dev_dbg(dev, "map memory: %pa+%x\n", &mem->dma, mem->len);
  102. va = ioremap_wc(mem->dma, mem->len);
  103. if (IS_ERR_OR_NULL(va)) {
  104. dev_err(dev, "Unable to map memory region: %pa+%x\n",
  105. &mem->dma, mem->len);
  106. return -ENOMEM;
  107. }
  108. /* Update memory entry va */
  109. mem->va = va;
  110. return 0;
  111. }
  112. static int stm32_rproc_mem_release(struct rproc *rproc,
  113. struct rproc_mem_entry *mem)
  114. {
  115. dev_dbg(rproc->dev.parent, "unmap memory: %pa\n", &mem->dma);
  116. iounmap(mem->va);
  117. return 0;
  118. }
  119. static int stm32_rproc_of_memory_translations(struct platform_device *pdev,
  120. struct stm32_rproc *ddata)
  121. {
  122. struct device *parent, *dev = &pdev->dev;
  123. struct device_node *np;
  124. struct stm32_rproc_mem *p_mems;
  125. struct stm32_rproc_mem_ranges *mem_range;
  126. int cnt, array_size, i, ret = 0;
  127. parent = dev->parent;
  128. np = parent->of_node;
  129. cnt = of_property_count_elems_of_size(np, "dma-ranges",
  130. sizeof(*mem_range));
  131. if (cnt <= 0) {
  132. dev_err(dev, "%s: dma-ranges property not defined\n", __func__);
  133. return -EINVAL;
  134. }
  135. p_mems = devm_kcalloc(dev, cnt, sizeof(*p_mems), GFP_KERNEL);
  136. if (!p_mems)
  137. return -ENOMEM;
  138. mem_range = kcalloc(cnt, sizeof(*mem_range), GFP_KERNEL);
  139. if (!mem_range)
  140. return -ENOMEM;
  141. array_size = cnt * sizeof(struct stm32_rproc_mem_ranges) / sizeof(u32);
  142. ret = of_property_read_u32_array(np, "dma-ranges",
  143. (u32 *)mem_range, array_size);
  144. if (ret) {
  145. dev_err(dev, "error while get dma-ranges property: %x\n", ret);
  146. goto free_mem;
  147. }
  148. for (i = 0; i < cnt; i++) {
  149. p_mems[i].bus_addr = mem_range[i].bus_addr;
  150. p_mems[i].dev_addr = mem_range[i].dev_addr;
  151. p_mems[i].size = mem_range[i].size;
  152. dev_dbg(dev, "memory range[%i]: da %#x, pa %pa, size %#zx:\n",
  153. i, p_mems[i].dev_addr, &p_mems[i].bus_addr,
  154. p_mems[i].size);
  155. }
  156. ddata->rmems = p_mems;
  157. ddata->nb_rmems = cnt;
  158. free_mem:
  159. kfree(mem_range);
  160. return ret;
  161. }
  162. static int stm32_rproc_mbox_idx(struct rproc *rproc, const unsigned char *name)
  163. {
  164. struct stm32_rproc *ddata = rproc->priv;
  165. int i;
  166. for (i = 0; i < ARRAY_SIZE(ddata->mb); i++) {
  167. if (!strncmp(ddata->mb[i].name, name, strlen(name)))
  168. return i;
  169. }
  170. dev_err(&rproc->dev, "mailbox %s not found\n", name);
  171. return -EINVAL;
  172. }
  173. static int stm32_rproc_elf_load_rsc_table(struct rproc *rproc,
  174. const struct firmware *fw)
  175. {
  176. if (rproc_elf_load_rsc_table(rproc, fw))
  177. dev_warn(&rproc->dev, "no resource table found for this firmware\n");
  178. return 0;
  179. }
  180. static int stm32_rproc_parse_memory_regions(struct rproc *rproc)
  181. {
  182. struct device *dev = rproc->dev.parent;
  183. struct device_node *np = dev->of_node;
  184. struct of_phandle_iterator it;
  185. struct rproc_mem_entry *mem;
  186. struct reserved_mem *rmem;
  187. u64 da;
  188. int index = 0;
  189. /* Register associated reserved memory regions */
  190. of_phandle_iterator_init(&it, np, "memory-region", NULL, 0);
  191. while (of_phandle_iterator_next(&it) == 0) {
  192. rmem = of_reserved_mem_lookup(it.node);
  193. if (!rmem) {
  194. dev_err(dev, "unable to acquire memory-region\n");
  195. return -EINVAL;
  196. }
  197. if (stm32_rproc_pa_to_da(rproc, rmem->base, &da) < 0) {
  198. dev_err(dev, "memory region not valid %pa\n",
  199. &rmem->base);
  200. return -EINVAL;
  201. }
  202. /* No need to map vdev buffer */
  203. if (strcmp(it.node->name, "vdev0buffer")) {
  204. /* Register memory region */
  205. mem = rproc_mem_entry_init(dev, NULL,
  206. (dma_addr_t)rmem->base,
  207. rmem->size, da,
  208. stm32_rproc_mem_alloc,
  209. stm32_rproc_mem_release,
  210. it.node->name);
  211. if (mem)
  212. rproc_coredump_add_segment(rproc, da,
  213. rmem->size);
  214. } else {
  215. /* Register reserved memory for vdev buffer alloc */
  216. mem = rproc_of_resm_mem_entry_init(dev, index,
  217. rmem->size,
  218. rmem->base,
  219. it.node->name);
  220. }
  221. if (!mem)
  222. return -ENOMEM;
  223. rproc_add_carveout(rproc, mem);
  224. index++;
  225. }
  226. return 0;
  227. }
  228. static int stm32_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
  229. {
  230. int ret = stm32_rproc_parse_memory_regions(rproc);
  231. if (ret)
  232. return ret;
  233. return stm32_rproc_elf_load_rsc_table(rproc, fw);
  234. }
  235. static irqreturn_t stm32_rproc_wdg(int irq, void *data)
  236. {
  237. struct platform_device *pdev = data;
  238. struct rproc *rproc = platform_get_drvdata(pdev);
  239. rproc_report_crash(rproc, RPROC_WATCHDOG);
  240. return IRQ_HANDLED;
  241. }
  242. static void stm32_rproc_mb_vq_work(struct work_struct *work)
  243. {
  244. struct stm32_mbox *mb = container_of(work, struct stm32_mbox, vq_work);
  245. struct rproc *rproc = dev_get_drvdata(mb->client.dev);
  246. if (rproc_vq_interrupt(rproc, mb->vq_id) == IRQ_NONE)
  247. dev_dbg(&rproc->dev, "no message found in vq%d\n", mb->vq_id);
  248. }
  249. static void stm32_rproc_mb_callback(struct mbox_client *cl, void *data)
  250. {
  251. struct rproc *rproc = dev_get_drvdata(cl->dev);
  252. struct stm32_mbox *mb = container_of(cl, struct stm32_mbox, client);
  253. struct stm32_rproc *ddata = rproc->priv;
  254. queue_work(ddata->workqueue, &mb->vq_work);
  255. }
  256. static void stm32_rproc_free_mbox(struct rproc *rproc)
  257. {
  258. struct stm32_rproc *ddata = rproc->priv;
  259. unsigned int i;
  260. for (i = 0; i < ARRAY_SIZE(ddata->mb); i++) {
  261. if (ddata->mb[i].chan)
  262. mbox_free_channel(ddata->mb[i].chan);
  263. ddata->mb[i].chan = NULL;
  264. }
  265. }
  266. static const struct stm32_mbox stm32_rproc_mbox[MBOX_NB_MBX] = {
  267. {
  268. .name = STM32_MBX_VQ0,
  269. .vq_id = STM32_MBX_VQ0_ID,
  270. .client = {
  271. .rx_callback = stm32_rproc_mb_callback,
  272. .tx_block = false,
  273. },
  274. },
  275. {
  276. .name = STM32_MBX_VQ1,
  277. .vq_id = STM32_MBX_VQ1_ID,
  278. .client = {
  279. .rx_callback = stm32_rproc_mb_callback,
  280. .tx_block = false,
  281. },
  282. },
  283. {
  284. .name = STM32_MBX_SHUTDOWN,
  285. .vq_id = -1,
  286. .client = {
  287. .tx_block = true,
  288. .tx_done = NULL,
  289. .tx_tout = 500, /* 500 ms time out */
  290. },
  291. }
  292. };
  293. static int stm32_rproc_request_mbox(struct rproc *rproc)
  294. {
  295. struct stm32_rproc *ddata = rproc->priv;
  296. struct device *dev = &rproc->dev;
  297. unsigned int i;
  298. int j;
  299. const unsigned char *name;
  300. struct mbox_client *cl;
  301. /* Initialise mailbox structure table */
  302. memcpy(ddata->mb, stm32_rproc_mbox, sizeof(stm32_rproc_mbox));
  303. for (i = 0; i < MBOX_NB_MBX; i++) {
  304. name = ddata->mb[i].name;
  305. cl = &ddata->mb[i].client;
  306. cl->dev = dev->parent;
  307. ddata->mb[i].chan = mbox_request_channel_byname(cl, name);
  308. if (IS_ERR(ddata->mb[i].chan)) {
  309. if (PTR_ERR(ddata->mb[i].chan) == -EPROBE_DEFER)
  310. goto err_probe;
  311. dev_warn(dev, "cannot get %s mbox\n", name);
  312. ddata->mb[i].chan = NULL;
  313. }
  314. if (ddata->mb[i].vq_id >= 0) {
  315. INIT_WORK(&ddata->mb[i].vq_work,
  316. stm32_rproc_mb_vq_work);
  317. }
  318. }
  319. return 0;
  320. err_probe:
  321. for (j = i - 1; j >= 0; j--)
  322. if (ddata->mb[j].chan)
  323. mbox_free_channel(ddata->mb[j].chan);
  324. return -EPROBE_DEFER;
  325. }
  326. static int stm32_rproc_set_hold_boot(struct rproc *rproc, bool hold)
  327. {
  328. struct stm32_rproc *ddata = rproc->priv;
  329. struct stm32_syscon hold_boot = ddata->hold_boot;
  330. struct arm_smccc_res smc_res;
  331. int val, err;
  332. val = hold ? HOLD_BOOT : RELEASE_BOOT;
  333. if (IS_ENABLED(CONFIG_HAVE_ARM_SMCCC) && ddata->secured_soc) {
  334. arm_smccc_smc(STM32_SMC_RCC, STM32_SMC_REG_WRITE,
  335. hold_boot.reg, val, 0, 0, 0, 0, &smc_res);
  336. err = smc_res.a0;
  337. } else {
  338. err = regmap_update_bits(hold_boot.map, hold_boot.reg,
  339. hold_boot.mask, val);
  340. }
  341. if (err)
  342. dev_err(&rproc->dev, "failed to set hold boot\n");
  343. return err;
  344. }
  345. static void stm32_rproc_add_coredump_trace(struct rproc *rproc)
  346. {
  347. struct rproc_debug_trace *trace;
  348. struct rproc_dump_segment *segment;
  349. bool already_added;
  350. list_for_each_entry(trace, &rproc->traces, node) {
  351. already_added = false;
  352. list_for_each_entry(segment, &rproc->dump_segments, node) {
  353. if (segment->da == trace->trace_mem.da) {
  354. already_added = true;
  355. break;
  356. }
  357. }
  358. if (!already_added)
  359. rproc_coredump_add_segment(rproc, trace->trace_mem.da,
  360. trace->trace_mem.len);
  361. }
  362. }
  363. static int stm32_rproc_start(struct rproc *rproc)
  364. {
  365. struct stm32_rproc *ddata = rproc->priv;
  366. int err;
  367. stm32_rproc_add_coredump_trace(rproc);
  368. /* clear remote proc Deep Sleep */
  369. if (ddata->pdds.map) {
  370. err = regmap_update_bits(ddata->pdds.map, ddata->pdds.reg,
  371. ddata->pdds.mask, 0);
  372. if (err) {
  373. dev_err(&rproc->dev, "failed to clear pdds\n");
  374. return err;
  375. }
  376. }
  377. err = stm32_rproc_set_hold_boot(rproc, false);
  378. if (err)
  379. return err;
  380. return stm32_rproc_set_hold_boot(rproc, true);
  381. }
  382. static int stm32_rproc_attach(struct rproc *rproc)
  383. {
  384. stm32_rproc_add_coredump_trace(rproc);
  385. return stm32_rproc_set_hold_boot(rproc, true);
  386. }
  387. static int stm32_rproc_stop(struct rproc *rproc)
  388. {
  389. struct stm32_rproc *ddata = rproc->priv;
  390. int err, dummy_data, idx;
  391. /* request shutdown of the remote processor */
  392. if (rproc->state != RPROC_OFFLINE) {
  393. idx = stm32_rproc_mbox_idx(rproc, STM32_MBX_SHUTDOWN);
  394. if (idx >= 0 && ddata->mb[idx].chan) {
  395. /* a dummy data is sent to allow to block on transmit */
  396. err = mbox_send_message(ddata->mb[idx].chan,
  397. &dummy_data);
  398. if (err < 0)
  399. dev_warn(&rproc->dev, "warning: remote FW shutdown without ack\n");
  400. }
  401. }
  402. err = stm32_rproc_set_hold_boot(rproc, true);
  403. if (err)
  404. return err;
  405. err = reset_control_assert(ddata->rst);
  406. if (err) {
  407. dev_err(&rproc->dev, "failed to assert the reset\n");
  408. return err;
  409. }
  410. /* to allow platform Standby power mode, set remote proc Deep Sleep */
  411. if (ddata->pdds.map) {
  412. err = regmap_update_bits(ddata->pdds.map, ddata->pdds.reg,
  413. ddata->pdds.mask, 1);
  414. if (err) {
  415. dev_err(&rproc->dev, "failed to set pdds\n");
  416. return err;
  417. }
  418. }
  419. /* update coprocessor state to OFF if available */
  420. if (ddata->m4_state.map) {
  421. err = regmap_update_bits(ddata->m4_state.map,
  422. ddata->m4_state.reg,
  423. ddata->m4_state.mask,
  424. M4_STATE_OFF);
  425. if (err) {
  426. dev_err(&rproc->dev, "failed to set copro state\n");
  427. return err;
  428. }
  429. }
  430. return 0;
  431. }
  432. static void stm32_rproc_kick(struct rproc *rproc, int vqid)
  433. {
  434. struct stm32_rproc *ddata = rproc->priv;
  435. unsigned int i;
  436. int err;
  437. if (WARN_ON(vqid >= MBOX_NB_VQ))
  438. return;
  439. for (i = 0; i < MBOX_NB_MBX; i++) {
  440. if (vqid != ddata->mb[i].vq_id)
  441. continue;
  442. if (!ddata->mb[i].chan)
  443. return;
  444. err = mbox_send_message(ddata->mb[i].chan, (void *)(long)vqid);
  445. if (err < 0)
  446. dev_err(&rproc->dev, "%s: failed (%s, err:%d)\n",
  447. __func__, ddata->mb[i].name, err);
  448. return;
  449. }
  450. }
  451. static struct rproc_ops st_rproc_ops = {
  452. .start = stm32_rproc_start,
  453. .stop = stm32_rproc_stop,
  454. .attach = stm32_rproc_attach,
  455. .kick = stm32_rproc_kick,
  456. .load = rproc_elf_load_segments,
  457. .parse_fw = stm32_rproc_parse_fw,
  458. .find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table,
  459. .sanity_check = rproc_elf_sanity_check,
  460. .get_boot_addr = rproc_elf_get_boot_addr,
  461. };
  462. static const struct of_device_id stm32_rproc_match[] = {
  463. { .compatible = "st,stm32mp1-m4" },
  464. {},
  465. };
  466. MODULE_DEVICE_TABLE(of, stm32_rproc_match);
  467. static int stm32_rproc_get_syscon(struct device_node *np, const char *prop,
  468. struct stm32_syscon *syscon)
  469. {
  470. int err = 0;
  471. syscon->map = syscon_regmap_lookup_by_phandle(np, prop);
  472. if (IS_ERR(syscon->map)) {
  473. err = PTR_ERR(syscon->map);
  474. syscon->map = NULL;
  475. goto out;
  476. }
  477. err = of_property_read_u32_index(np, prop, 1, &syscon->reg);
  478. if (err)
  479. goto out;
  480. err = of_property_read_u32_index(np, prop, 2, &syscon->mask);
  481. out:
  482. return err;
  483. }
  484. static int stm32_rproc_parse_dt(struct platform_device *pdev,
  485. struct stm32_rproc *ddata, bool *auto_boot)
  486. {
  487. struct device *dev = &pdev->dev;
  488. struct device_node *np = dev->of_node;
  489. struct stm32_syscon tz;
  490. unsigned int tzen;
  491. int err, irq;
  492. irq = platform_get_irq(pdev, 0);
  493. if (irq == -EPROBE_DEFER)
  494. return -EPROBE_DEFER;
  495. if (irq > 0) {
  496. err = devm_request_irq(dev, irq, stm32_rproc_wdg, 0,
  497. dev_name(dev), pdev);
  498. if (err) {
  499. dev_err(dev, "failed to request wdg irq\n");
  500. return err;
  501. }
  502. ddata->wdg_irq = irq;
  503. if (of_property_read_bool(np, "wakeup-source")) {
  504. device_init_wakeup(dev, true);
  505. dev_pm_set_wake_irq(dev, irq);
  506. }
  507. dev_info(dev, "wdg irq registered\n");
  508. }
  509. ddata->rst = devm_reset_control_get_by_index(dev, 0);
  510. if (IS_ERR(ddata->rst)) {
  511. dev_err(dev, "failed to get mcu reset\n");
  512. return PTR_ERR(ddata->rst);
  513. }
  514. /*
  515. * if platform is secured the hold boot bit must be written by
  516. * smc call and read normally.
  517. * if not secure the hold boot bit could be read/write normally
  518. */
  519. err = stm32_rproc_get_syscon(np, "st,syscfg-tz", &tz);
  520. if (err) {
  521. dev_err(dev, "failed to get tz syscfg\n");
  522. return err;
  523. }
  524. err = regmap_read(tz.map, tz.reg, &tzen);
  525. if (err) {
  526. dev_err(dev, "failed to read tzen\n");
  527. return err;
  528. }
  529. ddata->secured_soc = tzen & tz.mask;
  530. err = stm32_rproc_get_syscon(np, "st,syscfg-holdboot",
  531. &ddata->hold_boot);
  532. if (err) {
  533. dev_err(dev, "failed to get hold boot\n");
  534. return err;
  535. }
  536. err = stm32_rproc_get_syscon(np, "st,syscfg-pdds", &ddata->pdds);
  537. if (err)
  538. dev_info(dev, "failed to get pdds\n");
  539. *auto_boot = of_property_read_bool(np, "st,auto-boot");
  540. /*
  541. * See if we can check the M4 status, i.e if it was started
  542. * from the boot loader or not.
  543. */
  544. err = stm32_rproc_get_syscon(np, "st,syscfg-m4-state",
  545. &ddata->m4_state);
  546. if (err) {
  547. /* remember this */
  548. ddata->m4_state.map = NULL;
  549. /* no coprocessor state syscon (optional) */
  550. dev_warn(dev, "m4 state not supported\n");
  551. /* no need to go further */
  552. return 0;
  553. }
  554. /* See if we can get the resource table */
  555. err = stm32_rproc_get_syscon(np, "st,syscfg-rsc-tbl",
  556. &ddata->rsctbl);
  557. if (err) {
  558. /* no rsc table syscon (optional) */
  559. dev_warn(dev, "rsc tbl syscon not supported\n");
  560. }
  561. return 0;
  562. }
  563. static int stm32_rproc_get_m4_status(struct stm32_rproc *ddata,
  564. unsigned int *state)
  565. {
  566. /* See stm32_rproc_parse_dt() */
  567. if (!ddata->m4_state.map) {
  568. /*
  569. * We couldn't get the coprocessor's state, assume
  570. * it is not running.
  571. */
  572. *state = M4_STATE_OFF;
  573. return 0;
  574. }
  575. return regmap_read(ddata->m4_state.map, ddata->m4_state.reg, state);
  576. }
  577. static int stm32_rproc_da_to_pa(struct platform_device *pdev,
  578. struct stm32_rproc *ddata,
  579. u64 da, phys_addr_t *pa)
  580. {
  581. struct device *dev = &pdev->dev;
  582. struct stm32_rproc_mem *p_mem;
  583. unsigned int i;
  584. for (i = 0; i < ddata->nb_rmems; i++) {
  585. p_mem = &ddata->rmems[i];
  586. if (da < p_mem->dev_addr ||
  587. da >= p_mem->dev_addr + p_mem->size)
  588. continue;
  589. *pa = da - p_mem->dev_addr + p_mem->bus_addr;
  590. dev_dbg(dev, "da %llx to pa %#x\n", da, *pa);
  591. return 0;
  592. }
  593. dev_err(dev, "can't translate da %llx\n", da);
  594. return -EINVAL;
  595. }
  596. static int stm32_rproc_get_loaded_rsc_table(struct platform_device *pdev,
  597. struct rproc *rproc,
  598. struct stm32_rproc *ddata)
  599. {
  600. struct device *dev = &pdev->dev;
  601. phys_addr_t rsc_pa;
  602. u32 rsc_da;
  603. int err;
  604. err = regmap_read(ddata->rsctbl.map, ddata->rsctbl.reg, &rsc_da);
  605. if (err) {
  606. dev_err(dev, "failed to read rsc tbl addr\n");
  607. return err;
  608. }
  609. if (!rsc_da)
  610. /* no rsc table */
  611. return 0;
  612. err = stm32_rproc_da_to_pa(pdev, ddata, rsc_da, &rsc_pa);
  613. if (err)
  614. return err;
  615. ddata->rsc_va = devm_ioremap_wc(dev, rsc_pa, RSC_TBL_SIZE);
  616. if (IS_ERR_OR_NULL(ddata->rsc_va)) {
  617. dev_err(dev, "Unable to map memory region: %pa+%zx\n",
  618. &rsc_pa, RSC_TBL_SIZE);
  619. ddata->rsc_va = NULL;
  620. return -ENOMEM;
  621. }
  622. /*
  623. * The resource table is already loaded in device memory, no need
  624. * to work with a cached table.
  625. */
  626. rproc->cached_table = NULL;
  627. /* Assuming the resource table fits in 1kB is fair */
  628. rproc->table_sz = RSC_TBL_SIZE;
  629. rproc->table_ptr = (struct resource_table *)ddata->rsc_va;
  630. return 0;
  631. }
  632. static int stm32_rproc_probe(struct platform_device *pdev)
  633. {
  634. struct device *dev = &pdev->dev;
  635. struct stm32_rproc *ddata;
  636. struct device_node *np = dev->of_node;
  637. struct rproc *rproc;
  638. unsigned int state;
  639. int ret;
  640. ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32));
  641. if (ret)
  642. return ret;
  643. rproc = rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata));
  644. if (!rproc)
  645. return -ENOMEM;
  646. ddata = rproc->priv;
  647. rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
  648. ret = stm32_rproc_parse_dt(pdev, ddata, &rproc->auto_boot);
  649. if (ret)
  650. goto free_rproc;
  651. ret = stm32_rproc_of_memory_translations(pdev, ddata);
  652. if (ret)
  653. goto free_rproc;
  654. ret = stm32_rproc_get_m4_status(ddata, &state);
  655. if (ret)
  656. goto free_rproc;
  657. if (state == M4_STATE_CRUN) {
  658. rproc->state = RPROC_DETACHED;
  659. ret = stm32_rproc_parse_memory_regions(rproc);
  660. if (ret)
  661. goto free_resources;
  662. ret = stm32_rproc_get_loaded_rsc_table(pdev, rproc, ddata);
  663. if (ret)
  664. goto free_resources;
  665. }
  666. rproc->has_iommu = false;
  667. ddata->workqueue = create_workqueue(dev_name(dev));
  668. if (!ddata->workqueue) {
  669. dev_err(dev, "cannot create workqueue\n");
  670. ret = -ENOMEM;
  671. goto free_resources;
  672. }
  673. platform_set_drvdata(pdev, rproc);
  674. ret = stm32_rproc_request_mbox(rproc);
  675. if (ret)
  676. goto free_wkq;
  677. ret = rproc_add(rproc);
  678. if (ret)
  679. goto free_mb;
  680. return 0;
  681. free_mb:
  682. stm32_rproc_free_mbox(rproc);
  683. free_wkq:
  684. destroy_workqueue(ddata->workqueue);
  685. free_resources:
  686. rproc_resource_cleanup(rproc);
  687. free_rproc:
  688. if (device_may_wakeup(dev)) {
  689. dev_pm_clear_wake_irq(dev);
  690. device_init_wakeup(dev, false);
  691. }
  692. rproc_free(rproc);
  693. return ret;
  694. }
  695. static int stm32_rproc_remove(struct platform_device *pdev)
  696. {
  697. struct rproc *rproc = platform_get_drvdata(pdev);
  698. struct stm32_rproc *ddata = rproc->priv;
  699. struct device *dev = &pdev->dev;
  700. if (atomic_read(&rproc->power) > 0)
  701. rproc_shutdown(rproc);
  702. rproc_del(rproc);
  703. stm32_rproc_free_mbox(rproc);
  704. destroy_workqueue(ddata->workqueue);
  705. if (device_may_wakeup(dev)) {
  706. dev_pm_clear_wake_irq(dev);
  707. device_init_wakeup(dev, false);
  708. }
  709. rproc_free(rproc);
  710. return 0;
  711. }
  712. static int __maybe_unused stm32_rproc_suspend(struct device *dev)
  713. {
  714. struct rproc *rproc = dev_get_drvdata(dev);
  715. struct stm32_rproc *ddata = rproc->priv;
  716. if (device_may_wakeup(dev))
  717. return enable_irq_wake(ddata->wdg_irq);
  718. return 0;
  719. }
  720. static int __maybe_unused stm32_rproc_resume(struct device *dev)
  721. {
  722. struct rproc *rproc = dev_get_drvdata(dev);
  723. struct stm32_rproc *ddata = rproc->priv;
  724. if (device_may_wakeup(dev))
  725. return disable_irq_wake(ddata->wdg_irq);
  726. return 0;
  727. }
  728. static SIMPLE_DEV_PM_OPS(stm32_rproc_pm_ops,
  729. stm32_rproc_suspend, stm32_rproc_resume);
  730. static struct platform_driver stm32_rproc_driver = {
  731. .probe = stm32_rproc_probe,
  732. .remove = stm32_rproc_remove,
  733. .driver = {
  734. .name = "stm32-rproc",
  735. .pm = &stm32_rproc_pm_ops,
  736. .of_match_table = of_match_ptr(stm32_rproc_match),
  737. },
  738. };
  739. module_platform_driver(stm32_rproc_driver);
  740. MODULE_DESCRIPTION("STM32 Remote Processor Control Driver");
  741. MODULE_AUTHOR("Ludovic Barre <ludovic.barre@st.com>");
  742. MODULE_AUTHOR("Fabien Dessenne <fabien.dessenne@st.com>");
  743. MODULE_LICENSE("GPL v2");