mtk_scp.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Copyright (c) 2019 MediaTek Inc.
  4. #include <asm/barrier.h>
  5. #include <linux/clk.h>
  6. #include <linux/dma-mapping.h>
  7. #include <linux/err.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/kernel.h>
  10. #include <linux/module.h>
  11. #include <linux/of_address.h>
  12. #include <linux/of_platform.h>
  13. #include <linux/of_reserved_mem.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/remoteproc.h>
  16. #include <linux/remoteproc/mtk_scp.h>
  17. #include <linux/rpmsg/mtk_rpmsg.h>
  18. #include "mtk_common.h"
  19. #include "remoteproc_internal.h"
  20. #define MAX_CODE_SIZE 0x500000
  21. #define SCP_FW_END 0x7C000
  22. /**
  23. * scp_get() - get a reference to SCP.
  24. *
  25. * @pdev: the platform device of the module requesting SCP platform
  26. * device for using SCP API.
  27. *
  28. * Return: Return NULL if failed. otherwise reference to SCP.
  29. **/
  30. struct mtk_scp *scp_get(struct platform_device *pdev)
  31. {
  32. struct device *dev = &pdev->dev;
  33. struct device_node *scp_node;
  34. struct platform_device *scp_pdev;
  35. scp_node = of_parse_phandle(dev->of_node, "mediatek,scp", 0);
  36. if (!scp_node) {
  37. dev_err(dev, "can't get SCP node\n");
  38. return NULL;
  39. }
  40. scp_pdev = of_find_device_by_node(scp_node);
  41. of_node_put(scp_node);
  42. if (WARN_ON(!scp_pdev)) {
  43. dev_err(dev, "SCP pdev failed\n");
  44. return NULL;
  45. }
  46. return platform_get_drvdata(scp_pdev);
  47. }
  48. EXPORT_SYMBOL_GPL(scp_get);
  49. /**
  50. * scp_put() - "free" the SCP
  51. *
  52. * @scp: mtk_scp structure from scp_get().
  53. **/
  54. void scp_put(struct mtk_scp *scp)
  55. {
  56. put_device(scp->dev);
  57. }
  58. EXPORT_SYMBOL_GPL(scp_put);
  59. static void scp_wdt_handler(struct mtk_scp *scp, u32 scp_to_host)
  60. {
  61. dev_err(scp->dev, "SCP watchdog timeout! 0x%x", scp_to_host);
  62. rproc_report_crash(scp->rproc, RPROC_WATCHDOG);
  63. }
  64. static void scp_init_ipi_handler(void *data, unsigned int len, void *priv)
  65. {
  66. struct mtk_scp *scp = (struct mtk_scp *)priv;
  67. struct scp_run *run = (struct scp_run *)data;
  68. scp->run.signaled = run->signaled;
  69. strscpy(scp->run.fw_ver, run->fw_ver, SCP_FW_VER_LEN);
  70. scp->run.dec_capability = run->dec_capability;
  71. scp->run.enc_capability = run->enc_capability;
  72. wake_up_interruptible(&scp->run.wq);
  73. }
  74. static void scp_ipi_handler(struct mtk_scp *scp)
  75. {
  76. struct mtk_share_obj __iomem *rcv_obj = scp->recv_buf;
  77. struct scp_ipi_desc *ipi_desc = scp->ipi_desc;
  78. u8 tmp_data[SCP_SHARE_BUFFER_SIZE];
  79. scp_ipi_handler_t handler;
  80. u32 id = readl(&rcv_obj->id);
  81. u32 len = readl(&rcv_obj->len);
  82. if (len > SCP_SHARE_BUFFER_SIZE) {
  83. dev_err(scp->dev, "ipi message too long (len %d, max %d)", len,
  84. SCP_SHARE_BUFFER_SIZE);
  85. return;
  86. }
  87. if (id >= SCP_IPI_MAX) {
  88. dev_err(scp->dev, "No such ipi id = %d\n", id);
  89. return;
  90. }
  91. scp_ipi_lock(scp, id);
  92. handler = ipi_desc[id].handler;
  93. if (!handler) {
  94. dev_err(scp->dev, "No such ipi id = %d\n", id);
  95. scp_ipi_unlock(scp, id);
  96. return;
  97. }
  98. memcpy_fromio(tmp_data, &rcv_obj->share_buf, len);
  99. handler(tmp_data, len, ipi_desc[id].priv);
  100. scp_ipi_unlock(scp, id);
  101. scp->ipi_id_ack[id] = true;
  102. wake_up(&scp->ack_wq);
  103. }
  104. static int scp_ipi_init(struct mtk_scp *scp)
  105. {
  106. size_t send_offset = SCP_FW_END - sizeof(struct mtk_share_obj);
  107. size_t recv_offset = send_offset - sizeof(struct mtk_share_obj);
  108. /* shared buffer initialization */
  109. scp->recv_buf =
  110. (struct mtk_share_obj __iomem *)(scp->sram_base + recv_offset);
  111. scp->send_buf =
  112. (struct mtk_share_obj __iomem *)(scp->sram_base + send_offset);
  113. memset_io(scp->recv_buf, 0, sizeof(*scp->recv_buf));
  114. memset_io(scp->send_buf, 0, sizeof(*scp->send_buf));
  115. return 0;
  116. }
  117. static void mt8183_scp_reset_assert(struct mtk_scp *scp)
  118. {
  119. u32 val;
  120. val = readl(scp->reg_base + MT8183_SW_RSTN);
  121. val &= ~MT8183_SW_RSTN_BIT;
  122. writel(val, scp->reg_base + MT8183_SW_RSTN);
  123. }
  124. static void mt8183_scp_reset_deassert(struct mtk_scp *scp)
  125. {
  126. u32 val;
  127. val = readl(scp->reg_base + MT8183_SW_RSTN);
  128. val |= MT8183_SW_RSTN_BIT;
  129. writel(val, scp->reg_base + MT8183_SW_RSTN);
  130. }
  131. static void mt8192_scp_reset_assert(struct mtk_scp *scp)
  132. {
  133. writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
  134. }
  135. static void mt8192_scp_reset_deassert(struct mtk_scp *scp)
  136. {
  137. writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_CLR);
  138. }
  139. static void mt8183_scp_irq_handler(struct mtk_scp *scp)
  140. {
  141. u32 scp_to_host;
  142. scp_to_host = readl(scp->reg_base + MT8183_SCP_TO_HOST);
  143. if (scp_to_host & MT8183_SCP_IPC_INT_BIT)
  144. scp_ipi_handler(scp);
  145. else
  146. scp_wdt_handler(scp, scp_to_host);
  147. /* SCP won't send another interrupt until we set SCP_TO_HOST to 0. */
  148. writel(MT8183_SCP_IPC_INT_BIT | MT8183_SCP_WDT_INT_BIT,
  149. scp->reg_base + MT8183_SCP_TO_HOST);
  150. }
  151. static void mt8192_scp_irq_handler(struct mtk_scp *scp)
  152. {
  153. u32 scp_to_host;
  154. scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET);
  155. if (scp_to_host & MT8192_SCP_IPC_INT_BIT) {
  156. scp_ipi_handler(scp);
  157. /*
  158. * SCP won't send another interrupt until we clear
  159. * MT8192_SCP2APMCU_IPC.
  160. */
  161. writel(MT8192_SCP_IPC_INT_BIT,
  162. scp->reg_base + MT8192_SCP2APMCU_IPC_CLR);
  163. } else {
  164. scp_wdt_handler(scp, scp_to_host);
  165. writel(1, scp->reg_base + MT8192_CORE0_WDT_IRQ);
  166. }
  167. }
  168. static irqreturn_t scp_irq_handler(int irq, void *priv)
  169. {
  170. struct mtk_scp *scp = priv;
  171. int ret;
  172. ret = clk_prepare_enable(scp->clk);
  173. if (ret) {
  174. dev_err(scp->dev, "failed to enable clocks\n");
  175. return IRQ_NONE;
  176. }
  177. scp->data->scp_irq_handler(scp);
  178. clk_disable_unprepare(scp->clk);
  179. return IRQ_HANDLED;
  180. }
  181. static int scp_elf_load_segments(struct rproc *rproc, const struct firmware *fw)
  182. {
  183. struct device *dev = &rproc->dev;
  184. struct elf32_hdr *ehdr;
  185. struct elf32_phdr *phdr;
  186. int i, ret = 0;
  187. const u8 *elf_data = fw->data;
  188. ehdr = (struct elf32_hdr *)elf_data;
  189. phdr = (struct elf32_phdr *)(elf_data + ehdr->e_phoff);
  190. /* go through the available ELF segments */
  191. for (i = 0; i < ehdr->e_phnum; i++, phdr++) {
  192. u32 da = phdr->p_paddr;
  193. u32 memsz = phdr->p_memsz;
  194. u32 filesz = phdr->p_filesz;
  195. u32 offset = phdr->p_offset;
  196. void __iomem *ptr;
  197. if (phdr->p_type != PT_LOAD)
  198. continue;
  199. dev_dbg(dev, "phdr: type %d da 0x%x memsz 0x%x filesz 0x%x\n",
  200. phdr->p_type, da, memsz, filesz);
  201. if (filesz > memsz) {
  202. dev_err(dev, "bad phdr filesz 0x%x memsz 0x%x\n",
  203. filesz, memsz);
  204. ret = -EINVAL;
  205. break;
  206. }
  207. if (offset + filesz > fw->size) {
  208. dev_err(dev, "truncated fw: need 0x%x avail 0x%zx\n",
  209. offset + filesz, fw->size);
  210. ret = -EINVAL;
  211. break;
  212. }
  213. /* grab the kernel address for this device address */
  214. ptr = (void __iomem *)rproc_da_to_va(rproc, da, memsz, NULL);
  215. if (!ptr) {
  216. dev_err(dev, "bad phdr da 0x%x mem 0x%x\n", da, memsz);
  217. ret = -EINVAL;
  218. break;
  219. }
  220. /* put the segment where the remote processor expects it */
  221. if (phdr->p_filesz)
  222. scp_memcpy_aligned(ptr, elf_data + phdr->p_offset,
  223. filesz);
  224. }
  225. return ret;
  226. }
  227. static int mt8183_scp_before_load(struct mtk_scp *scp)
  228. {
  229. /* Clear SCP to host interrupt */
  230. writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST);
  231. /* Reset clocks before loading FW */
  232. writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL);
  233. writel(0x0, scp->reg_base + MT8183_SCP_CLK_DIV_SEL);
  234. /* Initialize TCM before loading FW. */
  235. writel(0x0, scp->reg_base + MT8183_SCP_L1_SRAM_PD);
  236. writel(0x0, scp->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD);
  237. /* Turn on the power of SCP's SRAM before using it. */
  238. writel(0x0, scp->reg_base + MT8183_SCP_SRAM_PDN);
  239. /*
  240. * Set I-cache and D-cache size before loading SCP FW.
  241. * SCP SRAM logical address may change when cache size setting differs.
  242. */
  243. writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB,
  244. scp->reg_base + MT8183_SCP_CACHE_CON);
  245. writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON);
  246. return 0;
  247. }
  248. static void mt8192_power_on_sram(void *addr)
  249. {
  250. int i;
  251. for (i = 31; i >= 0; i--)
  252. writel(GENMASK(i, 0), addr);
  253. writel(0, addr);
  254. }
  255. static void mt8192_power_off_sram(void *addr)
  256. {
  257. int i;
  258. writel(0, addr);
  259. for (i = 0; i < 32; i++)
  260. writel(GENMASK(i, 0), addr);
  261. }
  262. static int mt8192_scp_before_load(struct mtk_scp *scp)
  263. {
  264. /* clear SPM interrupt, SCP2SPM_IPC_CLR */
  265. writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR);
  266. writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
  267. /* enable SRAM clock */
  268. mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_0);
  269. mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_1);
  270. mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_2);
  271. mt8192_power_on_sram(scp->reg_base + MT8192_L1TCM_SRAM_PDN);
  272. mt8192_power_on_sram(scp->reg_base + MT8192_CPU0_SRAM_PD);
  273. return 0;
  274. }
  275. static int scp_load(struct rproc *rproc, const struct firmware *fw)
  276. {
  277. struct mtk_scp *scp = rproc->priv;
  278. struct device *dev = scp->dev;
  279. int ret;
  280. ret = clk_prepare_enable(scp->clk);
  281. if (ret) {
  282. dev_err(dev, "failed to enable clocks\n");
  283. return ret;
  284. }
  285. /* Hold SCP in reset while loading FW. */
  286. scp->data->scp_reset_assert(scp);
  287. ret = scp->data->scp_before_load(scp);
  288. if (ret < 0)
  289. goto leave;
  290. ret = scp_elf_load_segments(rproc, fw);
  291. leave:
  292. clk_disable_unprepare(scp->clk);
  293. return ret;
  294. }
  295. static int scp_start(struct rproc *rproc)
  296. {
  297. struct mtk_scp *scp = (struct mtk_scp *)rproc->priv;
  298. struct device *dev = scp->dev;
  299. struct scp_run *run = &scp->run;
  300. int ret;
  301. ret = clk_prepare_enable(scp->clk);
  302. if (ret) {
  303. dev_err(dev, "failed to enable clocks\n");
  304. return ret;
  305. }
  306. run->signaled = false;
  307. scp->data->scp_reset_deassert(scp);
  308. ret = wait_event_interruptible_timeout(
  309. run->wq,
  310. run->signaled,
  311. msecs_to_jiffies(2000));
  312. if (ret == 0) {
  313. dev_err(dev, "wait SCP initialization timeout!\n");
  314. ret = -ETIME;
  315. goto stop;
  316. }
  317. if (ret == -ERESTARTSYS) {
  318. dev_err(dev, "wait SCP interrupted by a signal!\n");
  319. goto stop;
  320. }
  321. clk_disable_unprepare(scp->clk);
  322. dev_info(dev, "SCP is ready. FW version %s\n", run->fw_ver);
  323. return 0;
  324. stop:
  325. scp->data->scp_reset_assert(scp);
  326. clk_disable_unprepare(scp->clk);
  327. return ret;
  328. }
  329. static void *scp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
  330. {
  331. struct mtk_scp *scp = (struct mtk_scp *)rproc->priv;
  332. int offset;
  333. if (da < scp->sram_size) {
  334. offset = da;
  335. if (offset >= 0 && (offset + len) < scp->sram_size)
  336. return (void __force *)scp->sram_base + offset;
  337. } else if (scp->dram_size) {
  338. offset = da - scp->dma_addr;
  339. if (offset >= 0 && (offset + len) < scp->dram_size)
  340. return (void __force *)scp->cpu_addr + offset;
  341. }
  342. return NULL;
  343. }
  344. static void mt8183_scp_stop(struct mtk_scp *scp)
  345. {
  346. /* Disable SCP watchdog */
  347. writel(0, scp->reg_base + MT8183_WDT_CFG);
  348. }
  349. static void mt8192_scp_stop(struct mtk_scp *scp)
  350. {
  351. /* Disable SRAM clock */
  352. mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_0);
  353. mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_1);
  354. mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_2);
  355. mt8192_power_off_sram(scp->reg_base + MT8192_L1TCM_SRAM_PDN);
  356. mt8192_power_off_sram(scp->reg_base + MT8192_CPU0_SRAM_PD);
  357. /* Disable SCP watchdog */
  358. writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG);
  359. }
  360. static int scp_stop(struct rproc *rproc)
  361. {
  362. struct mtk_scp *scp = (struct mtk_scp *)rproc->priv;
  363. int ret;
  364. ret = clk_prepare_enable(scp->clk);
  365. if (ret) {
  366. dev_err(scp->dev, "failed to enable clocks\n");
  367. return ret;
  368. }
  369. scp->data->scp_reset_assert(scp);
  370. scp->data->scp_stop(scp);
  371. clk_disable_unprepare(scp->clk);
  372. return 0;
  373. }
  374. static const struct rproc_ops scp_ops = {
  375. .start = scp_start,
  376. .stop = scp_stop,
  377. .load = scp_load,
  378. .da_to_va = scp_da_to_va,
  379. };
  380. /**
  381. * scp_get_device() - get device struct of SCP
  382. *
  383. * @scp: mtk_scp structure
  384. **/
  385. struct device *scp_get_device(struct mtk_scp *scp)
  386. {
  387. return scp->dev;
  388. }
  389. EXPORT_SYMBOL_GPL(scp_get_device);
  390. /**
  391. * scp_get_rproc() - get rproc struct of SCP
  392. *
  393. * @scp: mtk_scp structure
  394. **/
  395. struct rproc *scp_get_rproc(struct mtk_scp *scp)
  396. {
  397. return scp->rproc;
  398. }
  399. EXPORT_SYMBOL_GPL(scp_get_rproc);
  400. /**
  401. * scp_get_vdec_hw_capa() - get video decoder hardware capability
  402. *
  403. * @scp: mtk_scp structure
  404. *
  405. * Return: video decoder hardware capability
  406. **/
  407. unsigned int scp_get_vdec_hw_capa(struct mtk_scp *scp)
  408. {
  409. return scp->run.dec_capability;
  410. }
  411. EXPORT_SYMBOL_GPL(scp_get_vdec_hw_capa);
  412. /**
  413. * scp_get_venc_hw_capa() - get video encoder hardware capability
  414. *
  415. * @scp: mtk_scp structure
  416. *
  417. * Return: video encoder hardware capability
  418. **/
  419. unsigned int scp_get_venc_hw_capa(struct mtk_scp *scp)
  420. {
  421. return scp->run.enc_capability;
  422. }
  423. EXPORT_SYMBOL_GPL(scp_get_venc_hw_capa);
  424. /**
  425. * scp_mapping_dm_addr() - Mapping SRAM/DRAM to kernel virtual address
  426. *
  427. * @scp: mtk_scp structure
  428. * @mem_addr: SCP views memory address
  429. *
  430. * Mapping the SCP's SRAM address /
  431. * DMEM (Data Extended Memory) memory address /
  432. * Working buffer memory address to
  433. * kernel virtual address.
  434. *
  435. * Return: Return ERR_PTR(-EINVAL) if mapping failed,
  436. * otherwise the mapped kernel virtual address
  437. **/
  438. void *scp_mapping_dm_addr(struct mtk_scp *scp, u32 mem_addr)
  439. {
  440. void *ptr;
  441. ptr = scp_da_to_va(scp->rproc, mem_addr, 0, NULL);
  442. if (!ptr)
  443. return ERR_PTR(-EINVAL);
  444. return ptr;
  445. }
  446. EXPORT_SYMBOL_GPL(scp_mapping_dm_addr);
  447. static int scp_map_memory_region(struct mtk_scp *scp)
  448. {
  449. int ret;
  450. ret = of_reserved_mem_device_init(scp->dev);
  451. /* reserved memory is optional. */
  452. if (ret == -ENODEV) {
  453. dev_info(scp->dev, "skipping reserved memory initialization.");
  454. return 0;
  455. }
  456. if (ret) {
  457. dev_err(scp->dev, "failed to assign memory-region: %d\n", ret);
  458. return -ENOMEM;
  459. }
  460. /* Reserved SCP code size */
  461. scp->dram_size = MAX_CODE_SIZE;
  462. scp->cpu_addr = dma_alloc_coherent(scp->dev, scp->dram_size,
  463. &scp->dma_addr, GFP_KERNEL);
  464. if (!scp->cpu_addr)
  465. return -ENOMEM;
  466. return 0;
  467. }
  468. static void scp_unmap_memory_region(struct mtk_scp *scp)
  469. {
  470. if (scp->dram_size == 0)
  471. return;
  472. dma_free_coherent(scp->dev, scp->dram_size, scp->cpu_addr,
  473. scp->dma_addr);
  474. of_reserved_mem_device_release(scp->dev);
  475. }
  476. static int scp_register_ipi(struct platform_device *pdev, u32 id,
  477. ipi_handler_t handler, void *priv)
  478. {
  479. struct mtk_scp *scp = platform_get_drvdata(pdev);
  480. return scp_ipi_register(scp, id, handler, priv);
  481. }
  482. static void scp_unregister_ipi(struct platform_device *pdev, u32 id)
  483. {
  484. struct mtk_scp *scp = platform_get_drvdata(pdev);
  485. scp_ipi_unregister(scp, id);
  486. }
  487. static int scp_send_ipi(struct platform_device *pdev, u32 id, void *buf,
  488. unsigned int len, unsigned int wait)
  489. {
  490. struct mtk_scp *scp = platform_get_drvdata(pdev);
  491. return scp_ipi_send(scp, id, buf, len, wait);
  492. }
  493. static struct mtk_rpmsg_info mtk_scp_rpmsg_info = {
  494. .send_ipi = scp_send_ipi,
  495. .register_ipi = scp_register_ipi,
  496. .unregister_ipi = scp_unregister_ipi,
  497. .ns_ipi_id = SCP_IPI_NS_SERVICE,
  498. };
  499. static void scp_add_rpmsg_subdev(struct mtk_scp *scp)
  500. {
  501. scp->rpmsg_subdev =
  502. mtk_rpmsg_create_rproc_subdev(to_platform_device(scp->dev),
  503. &mtk_scp_rpmsg_info);
  504. if (scp->rpmsg_subdev)
  505. rproc_add_subdev(scp->rproc, scp->rpmsg_subdev);
  506. }
  507. static void scp_remove_rpmsg_subdev(struct mtk_scp *scp)
  508. {
  509. if (scp->rpmsg_subdev) {
  510. rproc_remove_subdev(scp->rproc, scp->rpmsg_subdev);
  511. mtk_rpmsg_destroy_rproc_subdev(scp->rpmsg_subdev);
  512. scp->rpmsg_subdev = NULL;
  513. }
  514. }
  515. static int scp_probe(struct platform_device *pdev)
  516. {
  517. struct device *dev = &pdev->dev;
  518. struct device_node *np = dev->of_node;
  519. struct mtk_scp *scp;
  520. struct rproc *rproc;
  521. struct resource *res;
  522. char *fw_name = "scp.img";
  523. int ret, i;
  524. rproc = rproc_alloc(dev,
  525. np->name,
  526. &scp_ops,
  527. fw_name,
  528. sizeof(*scp));
  529. if (!rproc) {
  530. dev_err(dev, "unable to allocate remoteproc\n");
  531. return -ENOMEM;
  532. }
  533. scp = (struct mtk_scp *)rproc->priv;
  534. scp->rproc = rproc;
  535. scp->dev = dev;
  536. scp->data = of_device_get_match_data(dev);
  537. platform_set_drvdata(pdev, scp);
  538. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sram");
  539. scp->sram_base = devm_ioremap_resource(dev, res);
  540. if (IS_ERR((__force void *)scp->sram_base)) {
  541. dev_err(dev, "Failed to parse and map sram memory\n");
  542. ret = PTR_ERR((__force void *)scp->sram_base);
  543. goto free_rproc;
  544. }
  545. scp->sram_size = resource_size(res);
  546. mutex_init(&scp->send_lock);
  547. for (i = 0; i < SCP_IPI_MAX; i++)
  548. mutex_init(&scp->ipi_desc[i].lock);
  549. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg");
  550. scp->reg_base = devm_ioremap_resource(dev, res);
  551. if (IS_ERR((__force void *)scp->reg_base)) {
  552. dev_err(dev, "Failed to parse and map cfg memory\n");
  553. ret = PTR_ERR((__force void *)scp->reg_base);
  554. goto destroy_mutex;
  555. }
  556. ret = scp_map_memory_region(scp);
  557. if (ret)
  558. goto destroy_mutex;
  559. scp->clk = devm_clk_get(dev, "main");
  560. if (IS_ERR(scp->clk)) {
  561. dev_err(dev, "Failed to get clock\n");
  562. ret = PTR_ERR(scp->clk);
  563. goto release_dev_mem;
  564. }
  565. ret = clk_prepare_enable(scp->clk);
  566. if (ret) {
  567. dev_err(dev, "failed to enable clocks\n");
  568. goto release_dev_mem;
  569. }
  570. ret = scp_ipi_init(scp);
  571. clk_disable_unprepare(scp->clk);
  572. if (ret) {
  573. dev_err(dev, "Failed to init ipi\n");
  574. goto release_dev_mem;
  575. }
  576. /* register SCP initialization IPI */
  577. ret = scp_ipi_register(scp, SCP_IPI_INIT, scp_init_ipi_handler, scp);
  578. if (ret) {
  579. dev_err(dev, "Failed to register IPI_SCP_INIT\n");
  580. goto release_dev_mem;
  581. }
  582. init_waitqueue_head(&scp->run.wq);
  583. init_waitqueue_head(&scp->ack_wq);
  584. scp_add_rpmsg_subdev(scp);
  585. ret = devm_request_threaded_irq(dev, platform_get_irq(pdev, 0), NULL,
  586. scp_irq_handler, IRQF_ONESHOT,
  587. pdev->name, scp);
  588. if (ret) {
  589. dev_err(dev, "failed to request irq\n");
  590. goto remove_subdev;
  591. }
  592. ret = rproc_add(rproc);
  593. if (ret)
  594. goto remove_subdev;
  595. return 0;
  596. remove_subdev:
  597. scp_remove_rpmsg_subdev(scp);
  598. scp_ipi_unregister(scp, SCP_IPI_INIT);
  599. release_dev_mem:
  600. scp_unmap_memory_region(scp);
  601. destroy_mutex:
  602. for (i = 0; i < SCP_IPI_MAX; i++)
  603. mutex_destroy(&scp->ipi_desc[i].lock);
  604. mutex_destroy(&scp->send_lock);
  605. free_rproc:
  606. rproc_free(rproc);
  607. return ret;
  608. }
  609. static int scp_remove(struct platform_device *pdev)
  610. {
  611. struct mtk_scp *scp = platform_get_drvdata(pdev);
  612. int i;
  613. rproc_del(scp->rproc);
  614. scp_remove_rpmsg_subdev(scp);
  615. scp_ipi_unregister(scp, SCP_IPI_INIT);
  616. scp_unmap_memory_region(scp);
  617. for (i = 0; i < SCP_IPI_MAX; i++)
  618. mutex_destroy(&scp->ipi_desc[i].lock);
  619. mutex_destroy(&scp->send_lock);
  620. rproc_free(scp->rproc);
  621. return 0;
  622. }
  623. static const struct mtk_scp_of_data mt8183_of_data = {
  624. .scp_before_load = mt8183_scp_before_load,
  625. .scp_irq_handler = mt8183_scp_irq_handler,
  626. .scp_reset_assert = mt8183_scp_reset_assert,
  627. .scp_reset_deassert = mt8183_scp_reset_deassert,
  628. .scp_stop = mt8183_scp_stop,
  629. .host_to_scp_reg = MT8183_HOST_TO_SCP,
  630. .host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT,
  631. };
  632. static const struct mtk_scp_of_data mt8192_of_data = {
  633. .scp_before_load = mt8192_scp_before_load,
  634. .scp_irq_handler = mt8192_scp_irq_handler,
  635. .scp_reset_assert = mt8192_scp_reset_assert,
  636. .scp_reset_deassert = mt8192_scp_reset_deassert,
  637. .scp_stop = mt8192_scp_stop,
  638. .host_to_scp_reg = MT8192_GIPC_IN_SET,
  639. .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
  640. };
  641. static const struct of_device_id mtk_scp_of_match[] = {
  642. { .compatible = "mediatek,mt8183-scp", .data = &mt8183_of_data },
  643. { .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data },
  644. {},
  645. };
  646. MODULE_DEVICE_TABLE(of, mtk_scp_of_match);
  647. static struct platform_driver mtk_scp_driver = {
  648. .probe = scp_probe,
  649. .remove = scp_remove,
  650. .driver = {
  651. .name = "mtk-scp",
  652. .of_match_table = mtk_scp_of_match,
  653. },
  654. };
  655. module_platform_driver(mtk_scp_driver);
  656. MODULE_LICENSE("GPL v2");
  657. MODULE_DESCRIPTION("MediaTek SCP control driver");