mtk_common.h 3.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (c) 2019 MediaTek Inc.
  4. */
  5. #ifndef __RPROC_MTK_COMMON_H
  6. #define __RPROC_MTK_COMMON_H
  7. #include <linux/interrupt.h>
  8. #include <linux/kernel.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/remoteproc.h>
  11. #include <linux/remoteproc/mtk_scp.h>
  12. #define MT8183_SW_RSTN 0x0
  13. #define MT8183_SW_RSTN_BIT BIT(0)
  14. #define MT8183_SCP_TO_HOST 0x1C
  15. #define MT8183_SCP_IPC_INT_BIT BIT(0)
  16. #define MT8183_SCP_WDT_INT_BIT BIT(8)
  17. #define MT8183_HOST_TO_SCP 0x28
  18. #define MT8183_HOST_IPC_INT_BIT BIT(0)
  19. #define MT8183_WDT_CFG 0x84
  20. #define MT8183_SCP_CLK_SW_SEL 0x4000
  21. #define MT8183_SCP_CLK_DIV_SEL 0x4024
  22. #define MT8183_SCP_SRAM_PDN 0x402C
  23. #define MT8183_SCP_L1_SRAM_PD 0x4080
  24. #define MT8183_SCP_TCM_TAIL_SRAM_PD 0x4094
  25. #define MT8183_SCP_CACHE_SEL(x) (0x14000 + (x) * 0x3000)
  26. #define MT8183_SCP_CACHE_CON MT8183_SCP_CACHE_SEL(0)
  27. #define MT8183_SCP_DCACHE_CON MT8183_SCP_CACHE_SEL(1)
  28. #define MT8183_SCP_CACHESIZE_8KB BIT(8)
  29. #define MT8183_SCP_CACHE_CON_WAYEN BIT(10)
  30. #define MT8192_L2TCM_SRAM_PD_0 0x10C0
  31. #define MT8192_L2TCM_SRAM_PD_1 0x10C4
  32. #define MT8192_L2TCM_SRAM_PD_2 0x10C8
  33. #define MT8192_L1TCM_SRAM_PDN 0x102C
  34. #define MT8192_CPU0_SRAM_PD 0x1080
  35. #define MT8192_SCP2APMCU_IPC_SET 0x4080
  36. #define MT8192_SCP2APMCU_IPC_CLR 0x4084
  37. #define MT8192_SCP_IPC_INT_BIT BIT(0)
  38. #define MT8192_SCP2SPM_IPC_CLR 0x4094
  39. #define MT8192_GIPC_IN_SET 0x4098
  40. #define MT8192_HOST_IPC_INT_BIT BIT(0)
  41. #define MT8192_CORE0_SW_RSTN_CLR 0x10000
  42. #define MT8192_CORE0_SW_RSTN_SET 0x10004
  43. #define MT8192_CORE0_WDT_IRQ 0x10030
  44. #define MT8192_CORE0_WDT_CFG 0x10034
  45. #define SCP_FW_VER_LEN 32
  46. #define SCP_SHARE_BUFFER_SIZE 288
  47. struct scp_run {
  48. u32 signaled;
  49. s8 fw_ver[SCP_FW_VER_LEN];
  50. u32 dec_capability;
  51. u32 enc_capability;
  52. wait_queue_head_t wq;
  53. };
  54. struct scp_ipi_desc {
  55. /* For protecting handler. */
  56. struct mutex lock;
  57. scp_ipi_handler_t handler;
  58. void *priv;
  59. };
  60. struct mtk_scp;
  61. struct mtk_scp_of_data {
  62. int (*scp_before_load)(struct mtk_scp *scp);
  63. void (*scp_irq_handler)(struct mtk_scp *scp);
  64. void (*scp_reset_assert)(struct mtk_scp *scp);
  65. void (*scp_reset_deassert)(struct mtk_scp *scp);
  66. void (*scp_stop)(struct mtk_scp *scp);
  67. u32 host_to_scp_reg;
  68. u32 host_to_scp_int_bit;
  69. };
  70. struct mtk_scp {
  71. struct device *dev;
  72. struct rproc *rproc;
  73. struct clk *clk;
  74. void __iomem *reg_base;
  75. void __iomem *sram_base;
  76. size_t sram_size;
  77. const struct mtk_scp_of_data *data;
  78. struct mtk_share_obj __iomem *recv_buf;
  79. struct mtk_share_obj __iomem *send_buf;
  80. struct scp_run run;
  81. /* To prevent multiple ipi_send run concurrently. */
  82. struct mutex send_lock;
  83. struct scp_ipi_desc ipi_desc[SCP_IPI_MAX];
  84. bool ipi_id_ack[SCP_IPI_MAX];
  85. wait_queue_head_t ack_wq;
  86. void __iomem *cpu_addr;
  87. dma_addr_t dma_addr;
  88. size_t dram_size;
  89. struct rproc_subdev *rpmsg_subdev;
  90. };
  91. /**
  92. * struct mtk_share_obj - SRAM buffer shared with AP and SCP
  93. *
  94. * @id: IPI id
  95. * @len: share buffer length
  96. * @share_buf: share buffer data
  97. */
  98. struct mtk_share_obj {
  99. u32 id;
  100. u32 len;
  101. u8 share_buf[SCP_SHARE_BUFFER_SIZE];
  102. };
  103. void scp_memcpy_aligned(void __iomem *dst, const void *src, unsigned int len);
  104. void scp_ipi_lock(struct mtk_scp *scp, u32 id);
  105. void scp_ipi_unlock(struct mtk_scp *scp, u32 id);
  106. #endif