ingenic_rproc.c 5.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Ingenic JZ47xx remoteproc driver
  4. * Copyright 2019, Paul Cercueil <paul@crapouillou.net>
  5. */
  6. #include <linux/bitops.h>
  7. #include <linux/clk.h>
  8. #include <linux/err.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/io.h>
  11. #include <linux/module.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/remoteproc.h>
  14. #include "remoteproc_internal.h"
  15. #define REG_AUX_CTRL 0x0
  16. #define REG_AUX_MSG_ACK 0x10
  17. #define REG_AUX_MSG 0x14
  18. #define REG_CORE_MSG_ACK 0x18
  19. #define REG_CORE_MSG 0x1C
  20. #define AUX_CTRL_SLEEP BIT(31)
  21. #define AUX_CTRL_MSG_IRQ_EN BIT(3)
  22. #define AUX_CTRL_NMI_RESETS BIT(2)
  23. #define AUX_CTRL_NMI BIT(1)
  24. #define AUX_CTRL_SW_RESET BIT(0)
  25. struct vpu_mem_map {
  26. const char *name;
  27. unsigned int da;
  28. };
  29. struct vpu_mem_info {
  30. const struct vpu_mem_map *map;
  31. unsigned long len;
  32. void __iomem *base;
  33. };
  34. static const struct vpu_mem_map vpu_mem_map[] = {
  35. { "tcsm0", 0x132b0000 },
  36. { "tcsm1", 0xf4000000 },
  37. { "sram", 0x132f0000 },
  38. };
  39. /**
  40. * struct vpu - Ingenic VPU remoteproc private structure
  41. * @irq: interrupt number
  42. * @clks: pointers to the VPU and AUX clocks
  43. * @aux_base: raw pointer to the AUX interface registers
  44. * @mem_info: array of struct vpu_mem_info, which contain the mapping info of
  45. * each of the external memories
  46. * @dev: private pointer to the device
  47. */
  48. struct vpu {
  49. int irq;
  50. struct clk_bulk_data clks[2];
  51. void __iomem *aux_base;
  52. struct vpu_mem_info mem_info[ARRAY_SIZE(vpu_mem_map)];
  53. struct device *dev;
  54. };
  55. static int ingenic_rproc_prepare(struct rproc *rproc)
  56. {
  57. struct vpu *vpu = rproc->priv;
  58. int ret;
  59. /* The clocks must be enabled for the firmware to be loaded in TCSM */
  60. ret = clk_bulk_prepare_enable(ARRAY_SIZE(vpu->clks), vpu->clks);
  61. if (ret)
  62. dev_err(vpu->dev, "Unable to start clocks: %d\n", ret);
  63. return ret;
  64. }
  65. static int ingenic_rproc_unprepare(struct rproc *rproc)
  66. {
  67. struct vpu *vpu = rproc->priv;
  68. clk_bulk_disable_unprepare(ARRAY_SIZE(vpu->clks), vpu->clks);
  69. return 0;
  70. }
  71. static int ingenic_rproc_start(struct rproc *rproc)
  72. {
  73. struct vpu *vpu = rproc->priv;
  74. u32 ctrl;
  75. enable_irq(vpu->irq);
  76. /* Reset the AUX and enable message IRQ */
  77. ctrl = AUX_CTRL_NMI_RESETS | AUX_CTRL_NMI | AUX_CTRL_MSG_IRQ_EN;
  78. writel(ctrl, vpu->aux_base + REG_AUX_CTRL);
  79. return 0;
  80. }
  81. static int ingenic_rproc_stop(struct rproc *rproc)
  82. {
  83. struct vpu *vpu = rproc->priv;
  84. disable_irq(vpu->irq);
  85. /* Keep AUX in reset mode */
  86. writel(AUX_CTRL_SW_RESET, vpu->aux_base + REG_AUX_CTRL);
  87. return 0;
  88. }
  89. static void ingenic_rproc_kick(struct rproc *rproc, int vqid)
  90. {
  91. struct vpu *vpu = rproc->priv;
  92. writel(vqid, vpu->aux_base + REG_CORE_MSG);
  93. }
  94. static void *ingenic_rproc_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
  95. {
  96. struct vpu *vpu = rproc->priv;
  97. void __iomem *va = NULL;
  98. unsigned int i;
  99. for (i = 0; i < ARRAY_SIZE(vpu_mem_map); i++) {
  100. const struct vpu_mem_info *info = &vpu->mem_info[i];
  101. const struct vpu_mem_map *map = info->map;
  102. if (da >= map->da && (da + len) < (map->da + info->len)) {
  103. va = info->base + (da - map->da);
  104. break;
  105. }
  106. }
  107. return (__force void *)va;
  108. }
  109. static struct rproc_ops ingenic_rproc_ops = {
  110. .prepare = ingenic_rproc_prepare,
  111. .unprepare = ingenic_rproc_unprepare,
  112. .start = ingenic_rproc_start,
  113. .stop = ingenic_rproc_stop,
  114. .kick = ingenic_rproc_kick,
  115. .da_to_va = ingenic_rproc_da_to_va,
  116. };
  117. static irqreturn_t vpu_interrupt(int irq, void *data)
  118. {
  119. struct rproc *rproc = data;
  120. struct vpu *vpu = rproc->priv;
  121. u32 vring;
  122. vring = readl(vpu->aux_base + REG_AUX_MSG);
  123. /* Ack the interrupt */
  124. writel(0, vpu->aux_base + REG_AUX_MSG_ACK);
  125. return rproc_vq_interrupt(rproc, vring);
  126. }
  127. static int ingenic_rproc_probe(struct platform_device *pdev)
  128. {
  129. struct device *dev = &pdev->dev;
  130. struct resource *mem;
  131. struct rproc *rproc;
  132. struct vpu *vpu;
  133. unsigned int i;
  134. int ret;
  135. rproc = devm_rproc_alloc(dev, "ingenic-vpu",
  136. &ingenic_rproc_ops, NULL, sizeof(*vpu));
  137. if (!rproc)
  138. return -ENOMEM;
  139. vpu = rproc->priv;
  140. vpu->dev = &pdev->dev;
  141. platform_set_drvdata(pdev, vpu);
  142. mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, "aux");
  143. vpu->aux_base = devm_ioremap_resource(dev, mem);
  144. if (IS_ERR(vpu->aux_base)) {
  145. dev_err(dev, "Failed to ioremap\n");
  146. return PTR_ERR(vpu->aux_base);
  147. }
  148. for (i = 0; i < ARRAY_SIZE(vpu_mem_map); i++) {
  149. mem = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  150. vpu_mem_map[i].name);
  151. vpu->mem_info[i].base = devm_ioremap_resource(dev, mem);
  152. if (IS_ERR(vpu->mem_info[i].base)) {
  153. ret = PTR_ERR(vpu->mem_info[i].base);
  154. dev_err(dev, "Failed to ioremap\n");
  155. return ret;
  156. }
  157. vpu->mem_info[i].len = resource_size(mem);
  158. vpu->mem_info[i].map = &vpu_mem_map[i];
  159. }
  160. vpu->clks[0].id = "vpu";
  161. vpu->clks[1].id = "aux";
  162. ret = devm_clk_bulk_get(dev, ARRAY_SIZE(vpu->clks), vpu->clks);
  163. if (ret) {
  164. dev_err(dev, "Failed to get clocks\n");
  165. return ret;
  166. }
  167. vpu->irq = platform_get_irq(pdev, 0);
  168. if (vpu->irq < 0)
  169. return vpu->irq;
  170. ret = devm_request_irq(dev, vpu->irq, vpu_interrupt, 0, "VPU", rproc);
  171. if (ret < 0) {
  172. dev_err(dev, "Failed to request IRQ\n");
  173. return ret;
  174. }
  175. disable_irq(vpu->irq);
  176. ret = devm_rproc_add(dev, rproc);
  177. if (ret) {
  178. dev_err(dev, "Failed to register remote processor\n");
  179. return ret;
  180. }
  181. return 0;
  182. }
  183. static const struct of_device_id ingenic_rproc_of_matches[] = {
  184. { .compatible = "ingenic,jz4770-vpu-rproc", },
  185. {}
  186. };
  187. MODULE_DEVICE_TABLE(of, ingenic_rproc_of_matches);
  188. static struct platform_driver ingenic_rproc_driver = {
  189. .probe = ingenic_rproc_probe,
  190. .driver = {
  191. .name = "ingenic-vpu",
  192. .of_match_table = ingenic_rproc_of_matches,
  193. },
  194. };
  195. module_platform_driver(ingenic_rproc_driver);
  196. MODULE_LICENSE("GPL");
  197. MODULE_AUTHOR("Paul Cercueil <paul@crapouillou.net>");
  198. MODULE_DESCRIPTION("Ingenic JZ47xx Remote Processor control driver");