qcom_smd-regulator.c 43 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015, Sony Mobile Communications AB.
  4. * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/of.h>
  8. #include <linux/of_device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/regulator/driver.h>
  11. #include <linux/regulator/of_regulator.h>
  12. #include <linux/soc/qcom/smd-rpm.h>
  13. struct qcom_rpm_reg {
  14. struct device *dev;
  15. struct qcom_smd_rpm *rpm;
  16. u32 type;
  17. u32 id;
  18. struct regulator_desc desc;
  19. int is_enabled;
  20. int uV;
  21. u32 load;
  22. unsigned int enabled_updated:1;
  23. unsigned int uv_updated:1;
  24. unsigned int load_updated:1;
  25. };
  26. struct rpm_regulator_req {
  27. __le32 key;
  28. __le32 nbytes;
  29. __le32 value;
  30. };
  31. #define RPM_KEY_SWEN 0x6e657773 /* "swen" */
  32. #define RPM_KEY_UV 0x00007675 /* "uv" */
  33. #define RPM_KEY_MA 0x0000616d /* "ma" */
  34. static int rpm_reg_write_active(struct qcom_rpm_reg *vreg)
  35. {
  36. struct rpm_regulator_req req[3];
  37. int reqlen = 0;
  38. int ret;
  39. if (vreg->enabled_updated) {
  40. req[reqlen].key = cpu_to_le32(RPM_KEY_SWEN);
  41. req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  42. req[reqlen].value = cpu_to_le32(vreg->is_enabled);
  43. reqlen++;
  44. }
  45. if (vreg->uv_updated && vreg->is_enabled) {
  46. req[reqlen].key = cpu_to_le32(RPM_KEY_UV);
  47. req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  48. req[reqlen].value = cpu_to_le32(vreg->uV);
  49. reqlen++;
  50. }
  51. if (vreg->load_updated && vreg->is_enabled) {
  52. req[reqlen].key = cpu_to_le32(RPM_KEY_MA);
  53. req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
  54. req[reqlen].value = cpu_to_le32(vreg->load / 1000);
  55. reqlen++;
  56. }
  57. if (!reqlen)
  58. return 0;
  59. ret = qcom_rpm_smd_write(vreg->rpm, QCOM_SMD_RPM_ACTIVE_STATE,
  60. vreg->type, vreg->id,
  61. req, sizeof(req[0]) * reqlen);
  62. if (!ret) {
  63. vreg->enabled_updated = 0;
  64. vreg->uv_updated = 0;
  65. vreg->load_updated = 0;
  66. }
  67. return ret;
  68. }
  69. static int rpm_reg_enable(struct regulator_dev *rdev)
  70. {
  71. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  72. int ret;
  73. vreg->is_enabled = 1;
  74. vreg->enabled_updated = 1;
  75. ret = rpm_reg_write_active(vreg);
  76. if (ret)
  77. vreg->is_enabled = 0;
  78. return ret;
  79. }
  80. static int rpm_reg_is_enabled(struct regulator_dev *rdev)
  81. {
  82. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  83. return vreg->is_enabled;
  84. }
  85. static int rpm_reg_disable(struct regulator_dev *rdev)
  86. {
  87. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  88. int ret;
  89. vreg->is_enabled = 0;
  90. vreg->enabled_updated = 1;
  91. ret = rpm_reg_write_active(vreg);
  92. if (ret)
  93. vreg->is_enabled = 1;
  94. return ret;
  95. }
  96. static int rpm_reg_get_voltage(struct regulator_dev *rdev)
  97. {
  98. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  99. return vreg->uV;
  100. }
  101. static int rpm_reg_set_voltage(struct regulator_dev *rdev,
  102. int min_uV,
  103. int max_uV,
  104. unsigned *selector)
  105. {
  106. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  107. int ret;
  108. int old_uV = vreg->uV;
  109. vreg->uV = min_uV;
  110. vreg->uv_updated = 1;
  111. ret = rpm_reg_write_active(vreg);
  112. if (ret)
  113. vreg->uV = old_uV;
  114. return ret;
  115. }
  116. static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
  117. {
  118. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  119. u32 old_load = vreg->load;
  120. int ret;
  121. vreg->load = load_uA;
  122. vreg->load_updated = 1;
  123. ret = rpm_reg_write_active(vreg);
  124. if (ret)
  125. vreg->load = old_load;
  126. return ret;
  127. }
  128. static const struct regulator_ops rpm_smps_ldo_ops = {
  129. .enable = rpm_reg_enable,
  130. .disable = rpm_reg_disable,
  131. .is_enabled = rpm_reg_is_enabled,
  132. .list_voltage = regulator_list_voltage_linear_range,
  133. .get_voltage = rpm_reg_get_voltage,
  134. .set_voltage = rpm_reg_set_voltage,
  135. .set_load = rpm_reg_set_load,
  136. };
  137. static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
  138. .enable = rpm_reg_enable,
  139. .disable = rpm_reg_disable,
  140. .is_enabled = rpm_reg_is_enabled,
  141. .get_voltage = rpm_reg_get_voltage,
  142. .set_voltage = rpm_reg_set_voltage,
  143. .set_load = rpm_reg_set_load,
  144. };
  145. static const struct regulator_ops rpm_switch_ops = {
  146. .enable = rpm_reg_enable,
  147. .disable = rpm_reg_disable,
  148. .is_enabled = rpm_reg_is_enabled,
  149. };
  150. static const struct regulator_ops rpm_bob_ops = {
  151. .enable = rpm_reg_enable,
  152. .disable = rpm_reg_disable,
  153. .is_enabled = rpm_reg_is_enabled,
  154. .get_voltage = rpm_reg_get_voltage,
  155. .set_voltage = rpm_reg_set_voltage,
  156. };
  157. static const struct regulator_ops rpm_mp5496_ops = {
  158. .enable = rpm_reg_enable,
  159. .disable = rpm_reg_disable,
  160. .is_enabled = rpm_reg_is_enabled,
  161. .list_voltage = regulator_list_voltage_linear_range,
  162. .set_voltage = rpm_reg_set_voltage,
  163. };
  164. static const struct regulator_desc pma8084_hfsmps = {
  165. .linear_ranges = (struct linear_range[]) {
  166. REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
  167. REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
  168. },
  169. .n_linear_ranges = 2,
  170. .n_voltages = 159,
  171. .ops = &rpm_smps_ldo_ops,
  172. };
  173. static const struct regulator_desc pma8084_ftsmps = {
  174. .linear_ranges = (struct linear_range[]) {
  175. REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
  176. REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
  177. },
  178. .n_linear_ranges = 2,
  179. .n_voltages = 262,
  180. .ops = &rpm_smps_ldo_ops,
  181. };
  182. static const struct regulator_desc pma8084_pldo = {
  183. .linear_ranges = (struct linear_range[]) {
  184. REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
  185. REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
  186. REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
  187. },
  188. .n_linear_ranges = 3,
  189. .n_voltages = 164,
  190. .ops = &rpm_smps_ldo_ops,
  191. };
  192. static const struct regulator_desc pma8084_nldo = {
  193. .linear_ranges = (struct linear_range[]) {
  194. REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
  195. },
  196. .n_linear_ranges = 1,
  197. .n_voltages = 64,
  198. .ops = &rpm_smps_ldo_ops,
  199. };
  200. static const struct regulator_desc pma8084_switch = {
  201. .ops = &rpm_switch_ops,
  202. };
  203. static const struct regulator_desc pm8x41_hfsmps = {
  204. .linear_ranges = (struct linear_range[]) {
  205. REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
  206. REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
  207. },
  208. .n_linear_ranges = 2,
  209. .n_voltages = 159,
  210. .ops = &rpm_smps_ldo_ops,
  211. };
  212. static const struct regulator_desc pm8841_ftsmps = {
  213. .linear_ranges = (struct linear_range[]) {
  214. REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000),
  215. REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
  216. },
  217. .n_linear_ranges = 2,
  218. .n_voltages = 262,
  219. .ops = &rpm_smps_ldo_ops,
  220. };
  221. static const struct regulator_desc pm8941_boost = {
  222. .linear_ranges = (struct linear_range[]) {
  223. REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
  224. },
  225. .n_linear_ranges = 1,
  226. .n_voltages = 31,
  227. .ops = &rpm_smps_ldo_ops,
  228. };
  229. static const struct regulator_desc pm8941_pldo = {
  230. .linear_ranges = (struct linear_range[]) {
  231. REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
  232. REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
  233. REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
  234. },
  235. .n_linear_ranges = 3,
  236. .n_voltages = 164,
  237. .ops = &rpm_smps_ldo_ops,
  238. };
  239. static const struct regulator_desc pm8941_nldo = {
  240. .linear_ranges = (struct linear_range[]) {
  241. REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
  242. },
  243. .n_linear_ranges = 1,
  244. .n_voltages = 64,
  245. .ops = &rpm_smps_ldo_ops,
  246. };
  247. static const struct regulator_desc pm8941_lnldo = {
  248. .fixed_uV = 1740000,
  249. .n_voltages = 1,
  250. .ops = &rpm_smps_ldo_ops_fixed,
  251. };
  252. static const struct regulator_desc pm8941_switch = {
  253. .ops = &rpm_switch_ops,
  254. };
  255. static const struct regulator_desc pm8916_pldo = {
  256. .linear_ranges = (struct linear_range[]) {
  257. REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
  258. },
  259. .n_linear_ranges = 1,
  260. .n_voltages = 209,
  261. .ops = &rpm_smps_ldo_ops,
  262. };
  263. static const struct regulator_desc pm8916_nldo = {
  264. .linear_ranges = (struct linear_range[]) {
  265. REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
  266. },
  267. .n_linear_ranges = 1,
  268. .n_voltages = 94,
  269. .ops = &rpm_smps_ldo_ops,
  270. };
  271. static const struct regulator_desc pm8916_buck_lvo_smps = {
  272. .linear_ranges = (struct linear_range[]) {
  273. REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
  274. REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
  275. },
  276. .n_linear_ranges = 2,
  277. .n_voltages = 128,
  278. .ops = &rpm_smps_ldo_ops,
  279. };
  280. static const struct regulator_desc pm8916_buck_hvo_smps = {
  281. .linear_ranges = (struct linear_range[]) {
  282. REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
  283. },
  284. .n_linear_ranges = 1,
  285. .n_voltages = 32,
  286. .ops = &rpm_smps_ldo_ops,
  287. };
  288. static const struct regulator_desc pm8950_hfsmps = {
  289. .linear_ranges = (struct linear_range[]) {
  290. REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
  291. REGULATOR_LINEAR_RANGE(1550000, 96, 127, 25000),
  292. },
  293. .n_linear_ranges = 2,
  294. .n_voltages = 128,
  295. .ops = &rpm_smps_ldo_ops,
  296. };
  297. static const struct regulator_desc pm8950_ftsmps2p5 = {
  298. .linear_ranges = (struct linear_range[]) {
  299. REGULATOR_LINEAR_RANGE(80000, 0, 255, 5000),
  300. REGULATOR_LINEAR_RANGE(160000, 256, 460, 10000),
  301. },
  302. .n_linear_ranges = 2,
  303. .n_voltages = 461,
  304. .ops = &rpm_smps_ldo_ops,
  305. };
  306. static const struct regulator_desc pm8950_ult_nldo = {
  307. .linear_ranges = (struct linear_range[]) {
  308. REGULATOR_LINEAR_RANGE(375000, 0, 202, 12500),
  309. },
  310. .n_linear_ranges = 1,
  311. .n_voltages = 203,
  312. .ops = &rpm_smps_ldo_ops,
  313. };
  314. static const struct regulator_desc pm8950_ult_pldo = {
  315. .linear_ranges = (struct linear_range[]) {
  316. REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500),
  317. },
  318. .n_linear_ranges = 1,
  319. .n_voltages = 128,
  320. .ops = &rpm_smps_ldo_ops,
  321. };
  322. static const struct regulator_desc pm8950_pldo_lv = {
  323. .linear_ranges = (struct linear_range[]) {
  324. REGULATOR_LINEAR_RANGE(1500000, 0, 16, 25000),
  325. },
  326. .n_linear_ranges = 1,
  327. .n_voltages = 17,
  328. .ops = &rpm_smps_ldo_ops,
  329. };
  330. static const struct regulator_desc pm8950_pldo = {
  331. .linear_ranges = (struct linear_range[]) {
  332. REGULATOR_LINEAR_RANGE(975000, 0, 164, 12500),
  333. },
  334. .n_linear_ranges = 1,
  335. .n_voltages = 165,
  336. .ops = &rpm_smps_ldo_ops,
  337. };
  338. static const struct regulator_desc pm8953_lnldo = {
  339. .linear_ranges = (struct linear_range[]) {
  340. REGULATOR_LINEAR_RANGE(1380000, 8, 15, 120000),
  341. REGULATOR_LINEAR_RANGE(690000, 0, 7, 60000),
  342. },
  343. .n_linear_ranges = 2,
  344. .n_voltages = 16,
  345. .ops = &rpm_smps_ldo_ops,
  346. };
  347. static const struct regulator_desc pm8953_ult_nldo = {
  348. .linear_ranges = (struct linear_range[]) {
  349. REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
  350. },
  351. .n_linear_ranges = 1,
  352. .n_voltages = 94,
  353. .ops = &rpm_smps_ldo_ops,
  354. };
  355. static const struct regulator_desc pm8994_hfsmps = {
  356. .linear_ranges = (struct linear_range[]) {
  357. REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500),
  358. REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
  359. },
  360. .n_linear_ranges = 2,
  361. .n_voltages = 159,
  362. .ops = &rpm_smps_ldo_ops,
  363. };
  364. static const struct regulator_desc pm8994_ftsmps = {
  365. .linear_ranges = (struct linear_range[]) {
  366. REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000),
  367. REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
  368. },
  369. .n_linear_ranges = 2,
  370. .n_voltages = 350,
  371. .ops = &rpm_smps_ldo_ops,
  372. };
  373. static const struct regulator_desc pm8994_nldo = {
  374. .linear_ranges = (struct linear_range[]) {
  375. REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
  376. },
  377. .n_linear_ranges = 1,
  378. .n_voltages = 64,
  379. .ops = &rpm_smps_ldo_ops,
  380. };
  381. static const struct regulator_desc pm8994_pldo = {
  382. .linear_ranges = (struct linear_range[]) {
  383. REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
  384. REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
  385. REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
  386. },
  387. .n_linear_ranges = 3,
  388. .n_voltages = 164,
  389. .ops = &rpm_smps_ldo_ops,
  390. };
  391. static const struct regulator_desc pm8994_switch = {
  392. .ops = &rpm_switch_ops,
  393. };
  394. static const struct regulator_desc pm8994_lnldo = {
  395. .fixed_uV = 1740000,
  396. .n_voltages = 1,
  397. .ops = &rpm_smps_ldo_ops_fixed,
  398. };
  399. static const struct regulator_desc pmi8994_ftsmps = {
  400. .linear_ranges = (struct linear_range[]) {
  401. REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000),
  402. REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
  403. },
  404. .n_linear_ranges = 2,
  405. .n_voltages = 350,
  406. .ops = &rpm_smps_ldo_ops,
  407. };
  408. static const struct regulator_desc pmi8994_hfsmps = {
  409. .linear_ranges = (struct linear_range[]) {
  410. REGULATOR_LINEAR_RANGE(350000, 0, 80, 12500),
  411. REGULATOR_LINEAR_RANGE(700000, 81, 141, 25000),
  412. },
  413. .n_linear_ranges = 2,
  414. .n_voltages = 142,
  415. .ops = &rpm_smps_ldo_ops,
  416. };
  417. static const struct regulator_desc pmi8994_bby = {
  418. .linear_ranges = (struct linear_range[]) {
  419. REGULATOR_LINEAR_RANGE(3000000, 0, 44, 50000),
  420. },
  421. .n_linear_ranges = 1,
  422. .n_voltages = 45,
  423. .ops = &rpm_bob_ops,
  424. };
  425. static const struct regulator_desc pm8998_ftsmps = {
  426. .linear_ranges = (struct linear_range[]) {
  427. REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
  428. },
  429. .n_linear_ranges = 1,
  430. .n_voltages = 259,
  431. .ops = &rpm_smps_ldo_ops,
  432. };
  433. static const struct regulator_desc pm8998_hfsmps = {
  434. .linear_ranges = (struct linear_range[]) {
  435. REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
  436. },
  437. .n_linear_ranges = 1,
  438. .n_voltages = 216,
  439. .ops = &rpm_smps_ldo_ops,
  440. };
  441. static const struct regulator_desc pm8998_nldo = {
  442. .linear_ranges = (struct linear_range[]) {
  443. REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
  444. },
  445. .n_linear_ranges = 1,
  446. .n_voltages = 128,
  447. .ops = &rpm_smps_ldo_ops,
  448. };
  449. static const struct regulator_desc pm8998_pldo = {
  450. .linear_ranges = (struct linear_range[]) {
  451. REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
  452. },
  453. .n_linear_ranges = 1,
  454. .n_voltages = 256,
  455. .ops = &rpm_smps_ldo_ops,
  456. };
  457. static const struct regulator_desc pm8998_pldo_lv = {
  458. .linear_ranges = (struct linear_range[]) {
  459. REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
  460. },
  461. .n_linear_ranges = 1,
  462. .n_voltages = 128,
  463. .ops = &rpm_smps_ldo_ops,
  464. };
  465. static const struct regulator_desc pm8998_switch = {
  466. .ops = &rpm_switch_ops,
  467. };
  468. static const struct regulator_desc pmi8998_bob = {
  469. .linear_ranges = (struct linear_range[]) {
  470. REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
  471. },
  472. .n_linear_ranges = 1,
  473. .n_voltages = 84,
  474. .ops = &rpm_bob_ops,
  475. };
  476. static const struct regulator_desc pm660_ftsmps = {
  477. .linear_ranges = (struct linear_range[]) {
  478. REGULATOR_LINEAR_RANGE(355000, 0, 199, 5000),
  479. },
  480. .n_linear_ranges = 1,
  481. .n_voltages = 200,
  482. .ops = &rpm_smps_ldo_ops,
  483. };
  484. static const struct regulator_desc pm660_hfsmps = {
  485. .linear_ranges = (struct linear_range[]) {
  486. REGULATOR_LINEAR_RANGE(320000, 0, 216, 8000),
  487. },
  488. .n_linear_ranges = 1,
  489. .n_voltages = 217,
  490. .ops = &rpm_smps_ldo_ops,
  491. };
  492. static const struct regulator_desc pm660_ht_nldo = {
  493. .linear_ranges = (struct linear_range[]) {
  494. REGULATOR_LINEAR_RANGE(312000, 0, 124, 8000),
  495. },
  496. .n_linear_ranges = 1,
  497. .n_voltages = 125,
  498. .ops = &rpm_smps_ldo_ops,
  499. };
  500. static const struct regulator_desc pm660_ht_lvpldo = {
  501. .linear_ranges = (struct linear_range[]) {
  502. REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
  503. },
  504. .n_linear_ranges = 1,
  505. .n_voltages = 63,
  506. .ops = &rpm_smps_ldo_ops,
  507. };
  508. static const struct regulator_desc pm660_nldo660 = {
  509. .linear_ranges = (struct linear_range[]) {
  510. REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
  511. },
  512. .n_linear_ranges = 1,
  513. .n_voltages = 124,
  514. .ops = &rpm_smps_ldo_ops,
  515. };
  516. static const struct regulator_desc pm660_pldo660 = {
  517. .linear_ranges = (struct linear_range[]) {
  518. REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
  519. },
  520. .n_linear_ranges = 1,
  521. .n_voltages = 256,
  522. .ops = &rpm_smps_ldo_ops,
  523. };
  524. static const struct regulator_desc pm660l_bob = {
  525. .linear_ranges = (struct linear_range[]) {
  526. REGULATOR_LINEAR_RANGE(1800000, 0, 84, 32000),
  527. },
  528. .n_linear_ranges = 1,
  529. .n_voltages = 85,
  530. .ops = &rpm_bob_ops,
  531. };
  532. static const struct regulator_desc pms405_hfsmps3 = {
  533. .linear_ranges = (struct linear_range[]) {
  534. REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
  535. },
  536. .n_linear_ranges = 1,
  537. .n_voltages = 216,
  538. .ops = &rpm_smps_ldo_ops,
  539. };
  540. static const struct regulator_desc pms405_nldo300 = {
  541. .linear_ranges = (struct linear_range[]) {
  542. REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
  543. },
  544. .n_linear_ranges = 1,
  545. .n_voltages = 128,
  546. .ops = &rpm_smps_ldo_ops,
  547. };
  548. static const struct regulator_desc pms405_nldo1200 = {
  549. .linear_ranges = (struct linear_range[]) {
  550. REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
  551. },
  552. .n_linear_ranges = 1,
  553. .n_voltages = 128,
  554. .ops = &rpm_smps_ldo_ops,
  555. };
  556. static const struct regulator_desc pms405_pldo50 = {
  557. .linear_ranges = (struct linear_range[]) {
  558. REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
  559. },
  560. .n_linear_ranges = 1,
  561. .n_voltages = 129,
  562. .ops = &rpm_smps_ldo_ops,
  563. };
  564. static const struct regulator_desc pms405_pldo150 = {
  565. .linear_ranges = (struct linear_range[]) {
  566. REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
  567. },
  568. .n_linear_ranges = 1,
  569. .n_voltages = 129,
  570. .ops = &rpm_smps_ldo_ops,
  571. };
  572. static const struct regulator_desc pms405_pldo600 = {
  573. .linear_ranges = (struct linear_range[]) {
  574. REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000),
  575. },
  576. .n_linear_ranges = 1,
  577. .n_voltages = 99,
  578. .ops = &rpm_smps_ldo_ops,
  579. };
  580. static const struct regulator_desc mp5496_smpa2 = {
  581. .linear_ranges = (struct linear_range[]) {
  582. REGULATOR_LINEAR_RANGE(725000, 0, 27, 12500),
  583. },
  584. .n_linear_ranges = 1,
  585. .n_voltages = 28,
  586. .ops = &rpm_mp5496_ops,
  587. };
  588. static const struct regulator_desc mp5496_ldoa2 = {
  589. .linear_ranges = (struct linear_range[]) {
  590. REGULATOR_LINEAR_RANGE(1800000, 0, 60, 25000),
  591. },
  592. .n_linear_ranges = 1,
  593. .n_voltages = 61,
  594. .ops = &rpm_mp5496_ops,
  595. };
  596. struct rpm_regulator_data {
  597. const char *name;
  598. u32 type;
  599. u32 id;
  600. const struct regulator_desc *desc;
  601. const char *supply;
  602. };
  603. static const struct rpm_regulator_data rpm_mp5496_regulators[] = {
  604. { "s2", QCOM_SMD_RPM_SMPA, 2, &mp5496_smpa2, "s2" },
  605. { "l2", QCOM_SMD_RPM_LDOA, 2, &mp5496_ldoa2, "l2" },
  606. {}
  607. };
  608. static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
  609. { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
  610. { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
  611. { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
  612. { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
  613. { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
  614. { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
  615. { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
  616. { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
  617. {}
  618. };
  619. static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
  620. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
  621. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
  622. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
  623. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
  624. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
  625. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
  626. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
  627. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
  628. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
  629. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
  630. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
  631. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
  632. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
  633. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  634. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  635. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  636. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  637. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  638. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  639. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  640. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  641. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
  642. {}
  643. };
  644. static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
  645. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
  646. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
  647. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
  648. { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
  649. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
  650. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
  651. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
  652. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
  653. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
  654. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
  655. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
  656. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
  657. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
  658. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
  659. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
  660. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
  661. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
  662. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
  663. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
  664. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
  665. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
  666. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
  667. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
  668. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
  669. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
  670. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
  671. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
  672. { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
  673. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
  674. { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
  675. { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
  676. { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
  677. { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
  678. {}
  679. };
  680. static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
  681. { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
  682. { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
  683. { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
  684. { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
  685. { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
  686. { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
  687. { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
  688. { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
  689. { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
  690. { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
  691. { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
  692. { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
  693. { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
  694. { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
  695. { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
  696. { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
  697. { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
  698. { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  699. { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
  700. { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
  701. { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  702. { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  703. { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
  704. { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  705. { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  706. { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  707. { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  708. { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
  709. { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
  710. { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
  711. { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
  712. { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  713. { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
  714. { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
  715. { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  716. { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
  717. { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
  718. { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
  719. { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
  720. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
  721. { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
  722. { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
  723. { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
  724. { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
  725. {}
  726. };
  727. static const struct rpm_regulator_data rpm_pm8950_regulators[] = {
  728. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8950_hfsmps, "vdd_s1" },
  729. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8950_hfsmps, "vdd_s2" },
  730. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8950_hfsmps, "vdd_s3" },
  731. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8950_hfsmps, "vdd_s4" },
  732. { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8950_ftsmps2p5, "vdd_s5" },
  733. { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_hfsmps, "vdd_s6" },
  734. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8950_ult_nldo, "vdd_l1_l19" },
  735. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8950_ult_nldo, "vdd_l2_l23" },
  736. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8950_ult_nldo, "vdd_l3" },
  737. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16" },
  738. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" },
  739. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" },
  740. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" },
  741. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
  742. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
  743. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_nldo, "vdd_l9_l10_l13_l14_l15_l18"},
  744. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"},
  745. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"},
  746. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"},
  747. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"},
  748. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"},
  749. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16"},
  750. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"},
  751. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"},
  752. { "l19", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l1_l19"},
  753. { "l20", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l20"},
  754. { "l21", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l21"},
  755. { "l22", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l8_l11_l12_l17_l22"},
  756. { "l23", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l2_l23"},
  757. {}
  758. };
  759. static const struct rpm_regulator_data rpm_pm8953_regulators[] = {
  760. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_hfsmps, "vdd_s1" },
  761. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_hfsmps, "vdd_s2" },
  762. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" },
  763. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" },
  764. { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8950_ftsmps2p5, "vdd_s5" },
  765. { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_ftsmps2p5, "vdd_s6" },
  766. { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_hfsmps, "vdd_s7" },
  767. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8953_ult_nldo, "vdd_l1" },
  768. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8953_ult_nldo, "vdd_l2_l3" },
  769. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8953_ult_nldo, "vdd_l2_l3" },
  770. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
  771. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
  772. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
  773. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
  774. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
  775. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
  776. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
  777. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
  778. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
  779. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
  780. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
  781. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
  782. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
  783. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
  784. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
  785. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8953_ult_nldo, "vdd_l4_l5_l6_l7_l16_l19" },
  786. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8953_lnldo, "vdd_l20" },
  787. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8953_lnldo, "vdd_l21" },
  788. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
  789. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8953_ult_nldo, "vdd_l23" },
  790. {}
  791. };
  792. static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
  793. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" },
  794. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" },
  795. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" },
  796. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" },
  797. { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" },
  798. { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" },
  799. { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" },
  800. { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" },
  801. { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" },
  802. { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" },
  803. { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" },
  804. { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" },
  805. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" },
  806. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" },
  807. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" },
  808. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" },
  809. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" },
  810. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" },
  811. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" },
  812. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" },
  813. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
  814. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
  815. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" },
  816. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" },
  817. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
  818. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" },
  819. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" },
  820. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" },
  821. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" },
  822. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
  823. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
  824. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" },
  825. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" },
  826. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
  827. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
  828. { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
  829. { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" },
  830. { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" },
  831. { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" },
  832. { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" },
  833. { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" },
  834. { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" },
  835. { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" },
  836. { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" },
  837. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" },
  838. { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" },
  839. {}
  840. };
  841. static const struct rpm_regulator_data rpm_pmi8994_regulators[] = {
  842. { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" },
  843. { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" },
  844. { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" },
  845. { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" },
  846. {}
  847. };
  848. static const struct rpm_regulator_data rpm_pm8998_regulators[] = {
  849. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" },
  850. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" },
  851. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" },
  852. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" },
  853. { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" },
  854. { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" },
  855. { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" },
  856. { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" },
  857. { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" },
  858. { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" },
  859. { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" },
  860. { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" },
  861. { "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" },
  862. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" },
  863. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" },
  864. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" },
  865. { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" },
  866. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" },
  867. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" },
  868. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
  869. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" },
  870. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" },
  871. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" },
  872. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" },
  873. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
  874. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" },
  875. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
  876. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
  877. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" },
  878. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" },
  879. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" },
  880. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" },
  881. { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" },
  882. { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" },
  883. { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" },
  884. { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" },
  885. { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" },
  886. { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" },
  887. { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" },
  888. { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" },
  889. { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" },
  890. { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" },
  891. { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" },
  892. {}
  893. };
  894. static const struct rpm_regulator_data rpm_pmi8998_regulators[] = {
  895. { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" },
  896. {}
  897. };
  898. static const struct rpm_regulator_data rpm_pm660_regulators[] = {
  899. { "s1", QCOM_SMD_RPM_SMPA, 1, &pm660_ftsmps, "vdd_s1" },
  900. { "s2", QCOM_SMD_RPM_SMPA, 2, &pm660_ftsmps, "vdd_s2" },
  901. { "s3", QCOM_SMD_RPM_SMPA, 3, &pm660_ftsmps, "vdd_s3" },
  902. { "s4", QCOM_SMD_RPM_SMPA, 4, &pm660_hfsmps, "vdd_s4" },
  903. { "s5", QCOM_SMD_RPM_SMPA, 5, &pm660_hfsmps, "vdd_s5" },
  904. { "s6", QCOM_SMD_RPM_SMPA, 6, &pm660_hfsmps, "vdd_s6" },
  905. { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l6_l7" },
  906. { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_ht_nldo, "vdd_l2_l3" },
  907. { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3" },
  908. /* l4 is unaccessible on PM660 */
  909. { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_ht_nldo, "vdd_l5" },
  910. { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_ht_nldo, "vdd_l1_l6_l7" },
  911. { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_ht_nldo, "vdd_l1_l6_l7" },
  912. { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
  913. { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
  914. { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
  915. { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
  916. { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
  917. { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
  918. { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
  919. { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
  920. { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
  921. { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
  922. { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
  923. { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
  924. { }
  925. };
  926. static const struct rpm_regulator_data rpm_pm660l_regulators[] = {
  927. { "s1", QCOM_SMD_RPM_SMPB, 1, &pm660_ftsmps, "vdd_s1" },
  928. { "s2", QCOM_SMD_RPM_SMPB, 2, &pm660_ftsmps, "vdd_s2" },
  929. { "s3", QCOM_SMD_RPM_RWCX, 0, &pm660_ftsmps, "vdd_s3_s4" },
  930. { "s5", QCOM_SMD_RPM_RWMX, 0, &pm660_ftsmps, "vdd_s5" },
  931. { "l1", QCOM_SMD_RPM_LDOB, 1, &pm660_nldo660, "vdd_l1_l9_l10" },
  932. { "l2", QCOM_SMD_RPM_LDOB, 2, &pm660_pldo660, "vdd_l2" },
  933. { "l3", QCOM_SMD_RPM_LDOB, 3, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
  934. { "l4", QCOM_SMD_RPM_LDOB, 4, &pm660_pldo660, "vdd_l4_l6" },
  935. { "l5", QCOM_SMD_RPM_LDOB, 5, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
  936. { "l6", QCOM_SMD_RPM_LDOB, 6, &pm660_pldo660, "vdd_l4_l6" },
  937. { "l7", QCOM_SMD_RPM_LDOB, 7, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
  938. { "l8", QCOM_SMD_RPM_LDOB, 8, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
  939. { "l9", QCOM_SMD_RPM_RWLC, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
  940. { "l10", QCOM_SMD_RPM_RWLM, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
  941. { "bob", QCOM_SMD_RPM_BOBB, 1, &pm660l_bob, "vdd_bob", },
  942. { }
  943. };
  944. static const struct rpm_regulator_data rpm_pms405_regulators[] = {
  945. { "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" },
  946. { "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" },
  947. { "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" },
  948. { "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" },
  949. { "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" },
  950. { "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" },
  951. { "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" },
  952. { "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" },
  953. { "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" },
  954. { "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" },
  955. { "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" },
  956. { "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" },
  957. { "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" },
  958. { "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" },
  959. { "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" },
  960. { "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
  961. { "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
  962. { "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
  963. {}
  964. };
  965. static const struct of_device_id rpm_of_match[] = {
  966. { .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators },
  967. { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
  968. { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
  969. { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
  970. { .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators },
  971. { .compatible = "qcom,rpm-pm8953-regulators", .data = &rpm_pm8953_regulators },
  972. { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
  973. { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators },
  974. { .compatible = "qcom,rpm-pm660-regulators", .data = &rpm_pm660_regulators },
  975. { .compatible = "qcom,rpm-pm660l-regulators", .data = &rpm_pm660l_regulators },
  976. { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
  977. { .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators },
  978. { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators },
  979. { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators },
  980. {}
  981. };
  982. MODULE_DEVICE_TABLE(of, rpm_of_match);
  983. /**
  984. * rpm_regulator_init_vreg() - initialize all attributes of a qcom_smd-regulator
  985. * @vreg: Pointer to the individual qcom_smd-regulator resource
  986. * @dev: Pointer to the top level qcom_smd-regulator PMIC device
  987. * @node: Pointer to the individual qcom_smd-regulator resource
  988. * device node
  989. * @rpm: Pointer to the rpm bus node
  990. * @pmic_rpm_data: Pointer to a null-terminated array of qcom_smd-regulator
  991. * resources defined for the top level PMIC device
  992. *
  993. * Return: 0 on success, errno on failure
  994. */
  995. static int rpm_regulator_init_vreg(struct qcom_rpm_reg *vreg, struct device *dev,
  996. struct device_node *node, struct qcom_smd_rpm *rpm,
  997. const struct rpm_regulator_data *pmic_rpm_data)
  998. {
  999. struct regulator_config config = {};
  1000. const struct rpm_regulator_data *rpm_data;
  1001. struct regulator_dev *rdev;
  1002. int ret;
  1003. for (rpm_data = pmic_rpm_data; rpm_data->name; rpm_data++)
  1004. if (of_node_name_eq(node, rpm_data->name))
  1005. break;
  1006. if (!rpm_data->name) {
  1007. dev_err(dev, "Unknown regulator %pOFn\n", node);
  1008. return -EINVAL;
  1009. }
  1010. vreg->dev = dev;
  1011. vreg->rpm = rpm;
  1012. vreg->type = rpm_data->type;
  1013. vreg->id = rpm_data->id;
  1014. memcpy(&vreg->desc, rpm_data->desc, sizeof(vreg->desc));
  1015. vreg->desc.name = rpm_data->name;
  1016. vreg->desc.supply_name = rpm_data->supply;
  1017. vreg->desc.owner = THIS_MODULE;
  1018. vreg->desc.type = REGULATOR_VOLTAGE;
  1019. vreg->desc.of_match = rpm_data->name;
  1020. config.dev = dev;
  1021. config.of_node = node;
  1022. config.driver_data = vreg;
  1023. rdev = devm_regulator_register(dev, &vreg->desc, &config);
  1024. if (IS_ERR(rdev)) {
  1025. ret = PTR_ERR(rdev);
  1026. dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n", node, ret);
  1027. return ret;
  1028. }
  1029. return 0;
  1030. }
  1031. static int rpm_reg_probe(struct platform_device *pdev)
  1032. {
  1033. struct device *dev = &pdev->dev;
  1034. const struct rpm_regulator_data *vreg_data;
  1035. struct device_node *node;
  1036. struct qcom_rpm_reg *vreg;
  1037. struct qcom_smd_rpm *rpm;
  1038. int ret;
  1039. rpm = dev_get_drvdata(pdev->dev.parent);
  1040. if (!rpm) {
  1041. dev_err(&pdev->dev, "Unable to retrieve handle to rpm\n");
  1042. return -ENODEV;
  1043. }
  1044. vreg_data = of_device_get_match_data(dev);
  1045. if (!vreg_data)
  1046. return -ENODEV;
  1047. for_each_available_child_of_node(dev->of_node, node) {
  1048. vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
  1049. if (!vreg) {
  1050. of_node_put(node);
  1051. return -ENOMEM;
  1052. }
  1053. ret = rpm_regulator_init_vreg(vreg, dev, node, rpm, vreg_data);
  1054. if (ret < 0) {
  1055. of_node_put(node);
  1056. return ret;
  1057. }
  1058. }
  1059. return 0;
  1060. }
  1061. static struct platform_driver rpm_reg_driver = {
  1062. .probe = rpm_reg_probe,
  1063. .driver = {
  1064. .name = "qcom_rpm_smd_regulator",
  1065. .of_match_table = rpm_of_match,
  1066. },
  1067. };
  1068. static int __init rpm_reg_init(void)
  1069. {
  1070. return platform_driver_register(&rpm_reg_driver);
  1071. }
  1072. subsys_initcall(rpm_reg_init);
  1073. static void __exit rpm_reg_exit(void)
  1074. {
  1075. platform_driver_unregister(&rpm_reg_driver);
  1076. }
  1077. module_exit(rpm_reg_exit)
  1078. MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
  1079. MODULE_LICENSE("GPL v2");