lp3971.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Regulator driver for National Semiconductors LP3971 PMIC chip
  4. *
  5. * Copyright (C) 2009 Samsung Electronics
  6. * Author: Marek Szyprowski <m.szyprowski@samsung.com>
  7. *
  8. * Based on wm8350.c
  9. */
  10. #include <linux/bug.h>
  11. #include <linux/err.h>
  12. #include <linux/i2c.h>
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/regulator/driver.h>
  16. #include <linux/regulator/lp3971.h>
  17. #include <linux/slab.h>
  18. struct lp3971 {
  19. struct device *dev;
  20. struct mutex io_lock;
  21. struct i2c_client *i2c;
  22. };
  23. static u8 lp3971_reg_read(struct lp3971 *lp3971, u8 reg);
  24. static int lp3971_set_bits(struct lp3971 *lp3971, u8 reg, u16 mask, u16 val);
  25. #define LP3971_SYS_CONTROL1_REG 0x07
  26. /* System control register 1 initial value,
  27. bits 4 and 5 are EPROM programmable */
  28. #define SYS_CONTROL1_INIT_VAL 0x40
  29. #define SYS_CONTROL1_INIT_MASK 0xCF
  30. #define LP3971_BUCK_VOL_ENABLE_REG 0x10
  31. #define LP3971_BUCK_VOL_CHANGE_REG 0x20
  32. /* Voltage control registers shift:
  33. LP3971_BUCK1 -> 0
  34. LP3971_BUCK2 -> 4
  35. LP3971_BUCK3 -> 6
  36. */
  37. #define BUCK_VOL_CHANGE_SHIFT(x) (((!!x) << 2) | (x & ~0x01))
  38. #define BUCK_VOL_CHANGE_FLAG_GO 0x01
  39. #define BUCK_VOL_CHANGE_FLAG_TARGET 0x02
  40. #define BUCK_VOL_CHANGE_FLAG_MASK 0x03
  41. #define LP3971_BUCK1_BASE 0x23
  42. #define LP3971_BUCK2_BASE 0x29
  43. #define LP3971_BUCK3_BASE 0x32
  44. static const int buck_base_addr[] = {
  45. LP3971_BUCK1_BASE,
  46. LP3971_BUCK2_BASE,
  47. LP3971_BUCK3_BASE,
  48. };
  49. #define LP3971_BUCK_TARGET_VOL1_REG(x) (buck_base_addr[x])
  50. #define LP3971_BUCK_TARGET_VOL2_REG(x) (buck_base_addr[x]+1)
  51. static const unsigned int buck_voltage_map[] = {
  52. 0, 800000, 850000, 900000, 950000, 1000000, 1050000, 1100000,
  53. 1150000, 1200000, 1250000, 1300000, 1350000, 1400000, 1450000, 1500000,
  54. 1550000, 1600000, 1650000, 1700000, 1800000, 1900000, 2500000, 2800000,
  55. 3000000, 3300000,
  56. };
  57. #define BUCK_TARGET_VOL_MASK 0x3f
  58. #define LP3971_BUCK_RAMP_REG(x) (buck_base_addr[x]+2)
  59. #define LP3971_LDO_ENABLE_REG 0x12
  60. #define LP3971_LDO_VOL_CONTR_BASE 0x39
  61. /* Voltage control registers:
  62. LP3971_LDO1 -> LP3971_LDO_VOL_CONTR_BASE + 0
  63. LP3971_LDO2 -> LP3971_LDO_VOL_CONTR_BASE + 0
  64. LP3971_LDO3 -> LP3971_LDO_VOL_CONTR_BASE + 1
  65. LP3971_LDO4 -> LP3971_LDO_VOL_CONTR_BASE + 1
  66. LP3971_LDO5 -> LP3971_LDO_VOL_CONTR_BASE + 2
  67. */
  68. #define LP3971_LDO_VOL_CONTR_REG(x) (LP3971_LDO_VOL_CONTR_BASE + (x >> 1))
  69. /* Voltage control registers shift:
  70. LP3971_LDO1 -> 0, LP3971_LDO2 -> 4
  71. LP3971_LDO3 -> 0, LP3971_LDO4 -> 4
  72. LP3971_LDO5 -> 0
  73. */
  74. #define LDO_VOL_CONTR_SHIFT(x) ((x & 1) << 2)
  75. #define LDO_VOL_CONTR_MASK 0x0f
  76. static const unsigned int ldo45_voltage_map[] = {
  77. 1000000, 1050000, 1100000, 1150000, 1200000, 1250000, 1300000, 1350000,
  78. 1400000, 1500000, 1800000, 1900000, 2500000, 2800000, 3000000, 3300000,
  79. };
  80. static const unsigned int ldo123_voltage_map[] = {
  81. 1800000, 1900000, 2000000, 2100000, 2200000, 2300000, 2400000, 2500000,
  82. 2600000, 2700000, 2800000, 2900000, 3000000, 3100000, 3200000, 3300000,
  83. };
  84. #define LDO_VOL_MIN_IDX 0x00
  85. #define LDO_VOL_MAX_IDX 0x0f
  86. static int lp3971_ldo_is_enabled(struct regulator_dev *dev)
  87. {
  88. struct lp3971 *lp3971 = rdev_get_drvdata(dev);
  89. int ldo = rdev_get_id(dev) - LP3971_LDO1;
  90. u16 mask = 1 << (1 + ldo);
  91. u16 val;
  92. val = lp3971_reg_read(lp3971, LP3971_LDO_ENABLE_REG);
  93. return (val & mask) != 0;
  94. }
  95. static int lp3971_ldo_enable(struct regulator_dev *dev)
  96. {
  97. struct lp3971 *lp3971 = rdev_get_drvdata(dev);
  98. int ldo = rdev_get_id(dev) - LP3971_LDO1;
  99. u16 mask = 1 << (1 + ldo);
  100. return lp3971_set_bits(lp3971, LP3971_LDO_ENABLE_REG, mask, mask);
  101. }
  102. static int lp3971_ldo_disable(struct regulator_dev *dev)
  103. {
  104. struct lp3971 *lp3971 = rdev_get_drvdata(dev);
  105. int ldo = rdev_get_id(dev) - LP3971_LDO1;
  106. u16 mask = 1 << (1 + ldo);
  107. return lp3971_set_bits(lp3971, LP3971_LDO_ENABLE_REG, mask, 0);
  108. }
  109. static int lp3971_ldo_get_voltage_sel(struct regulator_dev *dev)
  110. {
  111. struct lp3971 *lp3971 = rdev_get_drvdata(dev);
  112. int ldo = rdev_get_id(dev) - LP3971_LDO1;
  113. u16 val, reg;
  114. reg = lp3971_reg_read(lp3971, LP3971_LDO_VOL_CONTR_REG(ldo));
  115. val = (reg >> LDO_VOL_CONTR_SHIFT(ldo)) & LDO_VOL_CONTR_MASK;
  116. return val;
  117. }
  118. static int lp3971_ldo_set_voltage_sel(struct regulator_dev *dev,
  119. unsigned int selector)
  120. {
  121. struct lp3971 *lp3971 = rdev_get_drvdata(dev);
  122. int ldo = rdev_get_id(dev) - LP3971_LDO1;
  123. return lp3971_set_bits(lp3971, LP3971_LDO_VOL_CONTR_REG(ldo),
  124. LDO_VOL_CONTR_MASK << LDO_VOL_CONTR_SHIFT(ldo),
  125. selector << LDO_VOL_CONTR_SHIFT(ldo));
  126. }
  127. static const struct regulator_ops lp3971_ldo_ops = {
  128. .list_voltage = regulator_list_voltage_table,
  129. .map_voltage = regulator_map_voltage_ascend,
  130. .is_enabled = lp3971_ldo_is_enabled,
  131. .enable = lp3971_ldo_enable,
  132. .disable = lp3971_ldo_disable,
  133. .get_voltage_sel = lp3971_ldo_get_voltage_sel,
  134. .set_voltage_sel = lp3971_ldo_set_voltage_sel,
  135. };
  136. static int lp3971_dcdc_is_enabled(struct regulator_dev *dev)
  137. {
  138. struct lp3971 *lp3971 = rdev_get_drvdata(dev);
  139. int buck = rdev_get_id(dev) - LP3971_DCDC1;
  140. u16 mask = 1 << (buck * 2);
  141. u16 val;
  142. val = lp3971_reg_read(lp3971, LP3971_BUCK_VOL_ENABLE_REG);
  143. return (val & mask) != 0;
  144. }
  145. static int lp3971_dcdc_enable(struct regulator_dev *dev)
  146. {
  147. struct lp3971 *lp3971 = rdev_get_drvdata(dev);
  148. int buck = rdev_get_id(dev) - LP3971_DCDC1;
  149. u16 mask = 1 << (buck * 2);
  150. return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_ENABLE_REG, mask, mask);
  151. }
  152. static int lp3971_dcdc_disable(struct regulator_dev *dev)
  153. {
  154. struct lp3971 *lp3971 = rdev_get_drvdata(dev);
  155. int buck = rdev_get_id(dev) - LP3971_DCDC1;
  156. u16 mask = 1 << (buck * 2);
  157. return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_ENABLE_REG, mask, 0);
  158. }
  159. static int lp3971_dcdc_get_voltage_sel(struct regulator_dev *dev)
  160. {
  161. struct lp3971 *lp3971 = rdev_get_drvdata(dev);
  162. int buck = rdev_get_id(dev) - LP3971_DCDC1;
  163. u16 reg;
  164. reg = lp3971_reg_read(lp3971, LP3971_BUCK_TARGET_VOL1_REG(buck));
  165. reg &= BUCK_TARGET_VOL_MASK;
  166. return reg;
  167. }
  168. static int lp3971_dcdc_set_voltage_sel(struct regulator_dev *dev,
  169. unsigned int selector)
  170. {
  171. struct lp3971 *lp3971 = rdev_get_drvdata(dev);
  172. int buck = rdev_get_id(dev) - LP3971_DCDC1;
  173. int ret;
  174. ret = lp3971_set_bits(lp3971, LP3971_BUCK_TARGET_VOL1_REG(buck),
  175. BUCK_TARGET_VOL_MASK, selector);
  176. if (ret)
  177. return ret;
  178. ret = lp3971_set_bits(lp3971, LP3971_BUCK_VOL_CHANGE_REG,
  179. BUCK_VOL_CHANGE_FLAG_MASK << BUCK_VOL_CHANGE_SHIFT(buck),
  180. BUCK_VOL_CHANGE_FLAG_GO << BUCK_VOL_CHANGE_SHIFT(buck));
  181. if (ret)
  182. return ret;
  183. return lp3971_set_bits(lp3971, LP3971_BUCK_VOL_CHANGE_REG,
  184. BUCK_VOL_CHANGE_FLAG_MASK << BUCK_VOL_CHANGE_SHIFT(buck),
  185. 0 << BUCK_VOL_CHANGE_SHIFT(buck));
  186. }
  187. static const struct regulator_ops lp3971_dcdc_ops = {
  188. .list_voltage = regulator_list_voltage_table,
  189. .map_voltage = regulator_map_voltage_ascend,
  190. .is_enabled = lp3971_dcdc_is_enabled,
  191. .enable = lp3971_dcdc_enable,
  192. .disable = lp3971_dcdc_disable,
  193. .get_voltage_sel = lp3971_dcdc_get_voltage_sel,
  194. .set_voltage_sel = lp3971_dcdc_set_voltage_sel,
  195. };
  196. static const struct regulator_desc regulators[] = {
  197. {
  198. .name = "LDO1",
  199. .id = LP3971_LDO1,
  200. .ops = &lp3971_ldo_ops,
  201. .n_voltages = ARRAY_SIZE(ldo123_voltage_map),
  202. .volt_table = ldo123_voltage_map,
  203. .type = REGULATOR_VOLTAGE,
  204. .owner = THIS_MODULE,
  205. },
  206. {
  207. .name = "LDO2",
  208. .id = LP3971_LDO2,
  209. .ops = &lp3971_ldo_ops,
  210. .n_voltages = ARRAY_SIZE(ldo123_voltage_map),
  211. .volt_table = ldo123_voltage_map,
  212. .type = REGULATOR_VOLTAGE,
  213. .owner = THIS_MODULE,
  214. },
  215. {
  216. .name = "LDO3",
  217. .id = LP3971_LDO3,
  218. .ops = &lp3971_ldo_ops,
  219. .n_voltages = ARRAY_SIZE(ldo123_voltage_map),
  220. .volt_table = ldo123_voltage_map,
  221. .type = REGULATOR_VOLTAGE,
  222. .owner = THIS_MODULE,
  223. },
  224. {
  225. .name = "LDO4",
  226. .id = LP3971_LDO4,
  227. .ops = &lp3971_ldo_ops,
  228. .n_voltages = ARRAY_SIZE(ldo45_voltage_map),
  229. .volt_table = ldo45_voltage_map,
  230. .type = REGULATOR_VOLTAGE,
  231. .owner = THIS_MODULE,
  232. },
  233. {
  234. .name = "LDO5",
  235. .id = LP3971_LDO5,
  236. .ops = &lp3971_ldo_ops,
  237. .n_voltages = ARRAY_SIZE(ldo45_voltage_map),
  238. .volt_table = ldo45_voltage_map,
  239. .type = REGULATOR_VOLTAGE,
  240. .owner = THIS_MODULE,
  241. },
  242. {
  243. .name = "DCDC1",
  244. .id = LP3971_DCDC1,
  245. .ops = &lp3971_dcdc_ops,
  246. .n_voltages = ARRAY_SIZE(buck_voltage_map),
  247. .volt_table = buck_voltage_map,
  248. .type = REGULATOR_VOLTAGE,
  249. .owner = THIS_MODULE,
  250. },
  251. {
  252. .name = "DCDC2",
  253. .id = LP3971_DCDC2,
  254. .ops = &lp3971_dcdc_ops,
  255. .n_voltages = ARRAY_SIZE(buck_voltage_map),
  256. .volt_table = buck_voltage_map,
  257. .type = REGULATOR_VOLTAGE,
  258. .owner = THIS_MODULE,
  259. },
  260. {
  261. .name = "DCDC3",
  262. .id = LP3971_DCDC3,
  263. .ops = &lp3971_dcdc_ops,
  264. .n_voltages = ARRAY_SIZE(buck_voltage_map),
  265. .volt_table = buck_voltage_map,
  266. .type = REGULATOR_VOLTAGE,
  267. .owner = THIS_MODULE,
  268. },
  269. };
  270. static int lp3971_i2c_read(struct i2c_client *i2c, char reg, int count,
  271. u16 *dest)
  272. {
  273. int ret;
  274. if (count != 1)
  275. return -EIO;
  276. ret = i2c_smbus_read_byte_data(i2c, reg);
  277. if (ret < 0)
  278. return ret;
  279. *dest = ret;
  280. return 0;
  281. }
  282. static int lp3971_i2c_write(struct i2c_client *i2c, char reg, int count,
  283. const u16 *src)
  284. {
  285. if (count != 1)
  286. return -EIO;
  287. return i2c_smbus_write_byte_data(i2c, reg, *src);
  288. }
  289. static u8 lp3971_reg_read(struct lp3971 *lp3971, u8 reg)
  290. {
  291. u16 val = 0;
  292. mutex_lock(&lp3971->io_lock);
  293. lp3971_i2c_read(lp3971->i2c, reg, 1, &val);
  294. dev_dbg(lp3971->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg,
  295. (unsigned)val&0xff);
  296. mutex_unlock(&lp3971->io_lock);
  297. return val & 0xff;
  298. }
  299. static int lp3971_set_bits(struct lp3971 *lp3971, u8 reg, u16 mask, u16 val)
  300. {
  301. u16 tmp;
  302. int ret;
  303. mutex_lock(&lp3971->io_lock);
  304. ret = lp3971_i2c_read(lp3971->i2c, reg, 1, &tmp);
  305. if (ret == 0) {
  306. tmp = (tmp & ~mask) | val;
  307. ret = lp3971_i2c_write(lp3971->i2c, reg, 1, &tmp);
  308. dev_dbg(lp3971->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg,
  309. (unsigned)val&0xff);
  310. }
  311. mutex_unlock(&lp3971->io_lock);
  312. return ret;
  313. }
  314. static int setup_regulators(struct lp3971 *lp3971,
  315. struct lp3971_platform_data *pdata)
  316. {
  317. int i, err;
  318. /* Instantiate the regulators */
  319. for (i = 0; i < pdata->num_regulators; i++) {
  320. struct regulator_config config = { };
  321. struct lp3971_regulator_subdev *reg = &pdata->regulators[i];
  322. struct regulator_dev *rdev;
  323. config.dev = lp3971->dev;
  324. config.init_data = reg->initdata;
  325. config.driver_data = lp3971;
  326. rdev = devm_regulator_register(lp3971->dev,
  327. &regulators[reg->id], &config);
  328. if (IS_ERR(rdev)) {
  329. err = PTR_ERR(rdev);
  330. dev_err(lp3971->dev, "regulator init failed: %d\n",
  331. err);
  332. return err;
  333. }
  334. }
  335. return 0;
  336. }
  337. static int lp3971_i2c_probe(struct i2c_client *i2c)
  338. {
  339. struct lp3971 *lp3971;
  340. struct lp3971_platform_data *pdata = dev_get_platdata(&i2c->dev);
  341. int ret;
  342. u16 val;
  343. if (!pdata) {
  344. dev_dbg(&i2c->dev, "No platform init data supplied\n");
  345. return -ENODEV;
  346. }
  347. lp3971 = devm_kzalloc(&i2c->dev, sizeof(struct lp3971), GFP_KERNEL);
  348. if (lp3971 == NULL)
  349. return -ENOMEM;
  350. lp3971->i2c = i2c;
  351. lp3971->dev = &i2c->dev;
  352. mutex_init(&lp3971->io_lock);
  353. /* Detect LP3971 */
  354. ret = lp3971_i2c_read(i2c, LP3971_SYS_CONTROL1_REG, 1, &val);
  355. if (ret == 0 && (val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL)
  356. ret = -ENODEV;
  357. if (ret < 0) {
  358. dev_err(&i2c->dev, "failed to detect device\n");
  359. return ret;
  360. }
  361. ret = setup_regulators(lp3971, pdata);
  362. if (ret < 0)
  363. return ret;
  364. i2c_set_clientdata(i2c, lp3971);
  365. return 0;
  366. }
  367. static const struct i2c_device_id lp3971_i2c_id[] = {
  368. { "lp3971", 0 },
  369. { }
  370. };
  371. MODULE_DEVICE_TABLE(i2c, lp3971_i2c_id);
  372. static struct i2c_driver lp3971_i2c_driver = {
  373. .driver = {
  374. .name = "LP3971",
  375. },
  376. .probe_new = lp3971_i2c_probe,
  377. .id_table = lp3971_i2c_id,
  378. };
  379. module_i2c_driver(lp3971_i2c_driver);
  380. MODULE_LICENSE("GPL");
  381. MODULE_AUTHOR("Marek Szyprowski <m.szyprowski@samsung.com>");
  382. MODULE_DESCRIPTION("LP3971 PMIC driver");