pwm-light.c 7.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * simple driver for PWM (Pulse Width Modulator) controller
  4. *
  5. */
  6. #include <linux/bitfield.h>
  7. #include <linux/bitops.h>
  8. #include <linux/clk.h>
  9. #include <linux/delay.h>
  10. #include <linux/err.h>
  11. #include <linux/io.h>
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/of.h>
  15. #include <linux/of_device.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/pm_runtime.h>
  18. #include <linux/pwm.h>
  19. #include <linux/slab.h>
  20. #define MAX_PWM_NUM 6
  21. #define LIGHT_PWM_CHN_BASE(n) ((n) * 0x20)
  22. #define LIGHT_PWM_CTRL(n) (LIGHT_PWM_CHN_BASE(n) + 0x00)
  23. #define LIGHT_PWM_RPT(n) (LIGHT_PWM_CHN_BASE(n) + 0x04)
  24. #define LIGHT_PWM_PER(n) (LIGHT_PWM_CHN_BASE(n) + 0x08)
  25. #define LIGHT_PWM_FP(n) (LIGHT_PWM_CHN_BASE(n) + 0x0c)
  26. #define LIGHT_PWM_STATUS(n) (LIGHT_PWM_CHN_BASE(n) + 0x10)
  27. /* bit definition PWM_CTRL */
  28. #define PWM_START BIT(0)
  29. #define PWM_SOFT_RST BIT(1)
  30. #define PWM_CFG_UPDATE BIT(2)
  31. #define PWM_INT_EN BIT(3)
  32. #define PWM_ONE_SHOT_MODE BIT(4)
  33. #define PWM_CONTINUOUS_MODE BIT(5)
  34. #define PWM_EVT_RISING_TRIG_UNDER_ONE_SHOT BIT(6)
  35. #define PWM_EVT_FALLING_TRIG_UNDER_ONE_SHOT BIT(7)
  36. #define PWM_FPOUT BIT(8)
  37. #define PWM_INFACTOUT BIT(9)
  38. struct pwm_light_chip {
  39. struct clk *pwm_pclk;
  40. struct clk *pwm_cclk;
  41. void __iomem *mmio_base;
  42. struct pwm_chip chip;
  43. };
  44. #define to_pwm_light_chip(chip) container_of(chip, struct pwm_light_chip, chip)
  45. static int pwm_light_clk_prepare_enable(struct pwm_chip *chip)
  46. {
  47. struct pwm_light_chip *plc = to_pwm_light_chip(chip);
  48. int ret;
  49. ret = clk_prepare_enable(plc->pwm_pclk);
  50. if (ret)
  51. return ret;
  52. ret = clk_prepare_enable(plc->pwm_cclk);
  53. if (ret) {
  54. clk_disable_unprepare(plc->pwm_pclk);
  55. return ret;
  56. }
  57. return 0;
  58. }
  59. static void pwm_light_clk_disable_unprepare(struct pwm_chip *chip)
  60. {
  61. struct pwm_light_chip *plc = to_pwm_light_chip(chip);
  62. clk_disable_unprepare(plc->pwm_pclk);
  63. clk_disable_unprepare(plc->pwm_cclk);
  64. }
  65. static int pwm_light_enable(struct pwm_chip *chip, struct pwm_device *pwm)
  66. {
  67. struct pwm_light_chip *plc = to_pwm_light_chip(chip);
  68. u32 value;
  69. int ret;
  70. ret = pm_runtime_get_sync(chip->dev);
  71. if (ret < 0) {
  72. dev_err(chip->dev, "failed to clock on the pwm device(%d)\n", ret);
  73. pm_runtime_put_noidle(chip->dev);
  74. return ret;
  75. }
  76. value = readl(plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm));
  77. value |= PWM_START;
  78. writel(value, plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm));
  79. return 0;
  80. }
  81. static void pwm_light_disable(struct pwm_chip *chip, struct pwm_device *pwm)
  82. {
  83. struct pwm_light_chip *plc = to_pwm_light_chip(chip);
  84. u32 value;
  85. int ret;
  86. ret = pm_runtime_get_sync(chip->dev);
  87. if (ret < 0) {
  88. dev_err(chip->dev, "failed to clock on the pwm device(%d)\n", ret);
  89. pm_runtime_put_noidle(chip->dev);
  90. return;
  91. }
  92. value = readl(plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm));
  93. value &= ~PWM_START;
  94. writel(value, plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm));
  95. pm_runtime_put_sync(chip->dev);
  96. }
  97. static int pwm_light_config(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns)
  98. {
  99. struct pwm_light_chip *plc = to_pwm_light_chip(chip);
  100. unsigned long rate = clk_get_rate(plc->pwm_cclk);
  101. unsigned long duty_cycle, period_cycle;
  102. u32 pwm_cfg = PWM_INFACTOUT | PWM_FPOUT | PWM_CONTINUOUS_MODE | PWM_INT_EN;
  103. int ret;
  104. if (duty_ns > period_ns) {
  105. dev_err(chip->dev, "invalid pwm configure\n");
  106. return -EINVAL;
  107. }
  108. ret = pm_runtime_get_sync(chip->dev);
  109. if (ret < 0) {
  110. dev_err(chip->dev, "failed to clock on the pwm device(%d)\n", ret);
  111. pm_runtime_put_noidle(chip->dev);
  112. return ret;
  113. }
  114. writel(pwm_cfg, plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm)); //0x328
  115. period_cycle = period_ns * rate;
  116. pr_debug("[%s,%d]pwm cclock = %ldHZ, period_ns = %d, period_cycle = %ld, pwm id = %d\n", __func__, __LINE__,
  117. rate, period_ns, period_cycle, pwm->hwpwm);
  118. do_div(period_cycle, NSEC_PER_SEC);
  119. pr_debug("[%s,%d]pwm cclock = %ldHZ, period_ns = %d, period_cycle = %ld, pwm_id = %d\n", __func__, __LINE__,
  120. rate, period_ns, period_cycle, pwm->hwpwm);
  121. writel(period_cycle, plc->mmio_base + LIGHT_PWM_PER(pwm->hwpwm));
  122. duty_cycle = duty_ns * rate;
  123. do_div(duty_cycle, NSEC_PER_SEC);
  124. pr_debug("[%s, %d]duty_cycle = %ld\n", __func__, __LINE__, duty_cycle);
  125. writel(duty_cycle, plc->mmio_base + LIGHT_PWM_FP(pwm->hwpwm));
  126. pwm_cfg = readl(plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm));
  127. writel(pwm_cfg | PWM_CFG_UPDATE, plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm)); //0x32c
  128. pm_runtime_put_sync(chip->dev);
  129. return 0;
  130. }
  131. static int pwm_light_set_polarity(struct pwm_chip *chip, struct pwm_device *pwm, enum pwm_polarity polarity)
  132. {
  133. struct pwm_light_chip *plc = to_pwm_light_chip(chip);
  134. u32 value = readl(plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm));
  135. int ret;
  136. ret = pm_runtime_get_sync(chip->dev);
  137. if (ret < 0) {
  138. dev_err(chip->dev, "failed to clock on the pwm device(%d)\n", ret);
  139. pm_runtime_put_noidle(chip->dev);
  140. return ret;
  141. }
  142. if (polarity == PWM_POLARITY_INVERSED)
  143. /* Duty cycle defines LOW period of PWM */
  144. value |= PWM_FPOUT;
  145. else
  146. /* Duty cycle defines HIGH period of PWM */
  147. value &= ~PWM_FPOUT;
  148. writel(value, plc->mmio_base + LIGHT_PWM_CTRL(pwm->hwpwm));
  149. pm_runtime_put_sync(chip->dev);
  150. return 0;
  151. }
  152. static const struct pwm_ops pwm_light_ops = {
  153. .enable = pwm_light_enable,
  154. .disable = pwm_light_disable,
  155. .config = pwm_light_config,
  156. .set_polarity = pwm_light_set_polarity,
  157. .owner = THIS_MODULE,
  158. };
  159. static int __maybe_unused light_pwm_runtime_suspend(struct device *dev)
  160. {
  161. struct pwm_light_chip *plc = dev_get_drvdata(dev);
  162. pwm_light_clk_disable_unprepare(&plc->chip);
  163. return 0;
  164. }
  165. static int __maybe_unused light_pwm_runtime_resume(struct device *dev)
  166. {
  167. struct pwm_light_chip *plc = dev_get_drvdata(dev);
  168. int ret;
  169. ret = pwm_light_clk_prepare_enable(&plc->chip);
  170. if (ret) {
  171. dev_err(dev, "failed to enable pwm clock(%d)\n", ret);
  172. return ret;
  173. }
  174. return 0;
  175. }
  176. static int pwm_light_probe(struct platform_device *pdev)
  177. {
  178. struct pwm_light_chip *plc;
  179. struct resource *res;
  180. int ret;
  181. plc = devm_kzalloc(&pdev->dev, sizeof(*plc), GFP_KERNEL);
  182. if (!plc)
  183. return -ENOMEM;
  184. platform_set_drvdata(pdev, plc);
  185. /* optional clock, default open */
  186. plc->pwm_pclk = devm_clk_get(&pdev->dev, "pclk");
  187. if (IS_ERR(plc->pwm_pclk)) {
  188. if (PTR_ERR(plc->pwm_pclk) != -EPROBE_DEFER)
  189. dev_err(&pdev->dev, "failed to get pwm pclk");
  190. return PTR_ERR(plc->pwm_pclk);
  191. }
  192. plc->pwm_cclk = devm_clk_get(&pdev->dev, "cclk");
  193. if (IS_ERR(plc->pwm_cclk)) {
  194. if (PTR_ERR(plc->pwm_cclk) != -EPROBE_DEFER)
  195. dev_err(&pdev->dev, "failed to get pwm cclk");
  196. return PTR_ERR(plc->pwm_cclk);
  197. }
  198. #ifndef CONFIG_PM
  199. ret = pwm_light_clk_prepare_enable(&plc->chip);
  200. if (ret) {
  201. dev_err(&pdev->dev, "failed to enable pwm clock(%d)\n", ret);
  202. return ret;
  203. }
  204. #endif
  205. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  206. plc->mmio_base = devm_ioremap_resource(&pdev->dev, res);
  207. if (IS_ERR(plc->mmio_base))
  208. return PTR_ERR(plc->mmio_base);
  209. plc->chip.ops = &pwm_light_ops;
  210. plc->chip.dev = &pdev->dev;
  211. plc->chip.npwm = MAX_PWM_NUM;
  212. ret = pwmchip_add(&plc->chip);
  213. if (ret)
  214. return ret;
  215. pm_runtime_enable(&pdev->dev);
  216. dev_info(&pdev->dev, "succeed to add a pwm chip\n");
  217. return 0;
  218. }
  219. static int pwm_light_remove(struct platform_device *pdev)
  220. {
  221. struct pwm_light_chip *plc = platform_get_drvdata(pdev);
  222. pwm_light_clk_disable_unprepare(&plc->chip);
  223. pm_runtime_disable(&pdev->dev);
  224. return pwmchip_remove(&plc->chip);
  225. }
  226. static const struct of_device_id pwm_light_dt_ids[] = {
  227. {.compatible = "thead,pwm-light",},
  228. {/* sentinel */}
  229. };
  230. static const struct dev_pm_ops pwm_runtime_pm_ops = {
  231. SET_RUNTIME_PM_OPS(light_pwm_runtime_suspend, light_pwm_runtime_resume, NULL)
  232. };
  233. static struct platform_driver pwm_light_driver = {
  234. .driver = {
  235. .name = "pwm-light",
  236. .of_match_table = pwm_light_dt_ids,
  237. .pm = &pwm_runtime_pm_ops,
  238. },
  239. .probe = pwm_light_probe,
  240. .remove = pwm_light_remove,
  241. };
  242. module_platform_driver(pwm_light_driver);
  243. MODULE_AUTHOR("wei.liu <lw312886@linux.alibaba.com>");
  244. MODULE_DESCRIPTION("Thead light pwm driver");
  245. MODULE_LICENSE("GPL v2");