intel_rapl_msr.c 5.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Intel Running Average Power Limit (RAPL) Driver via MSR interface
  4. * Copyright (c) 2019, Intel Corporation.
  5. */
  6. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  7. #include <linux/kernel.h>
  8. #include <linux/module.h>
  9. #include <linux/list.h>
  10. #include <linux/types.h>
  11. #include <linux/device.h>
  12. #include <linux/slab.h>
  13. #include <linux/log2.h>
  14. #include <linux/bitmap.h>
  15. #include <linux/delay.h>
  16. #include <linux/sysfs.h>
  17. #include <linux/cpu.h>
  18. #include <linux/powercap.h>
  19. #include <linux/suspend.h>
  20. #include <linux/intel_rapl.h>
  21. #include <linux/processor.h>
  22. #include <linux/platform_device.h>
  23. #include <asm/iosf_mbi.h>
  24. #include <asm/cpu_device_id.h>
  25. #include <asm/intel-family.h>
  26. /* Local defines */
  27. #define MSR_PLATFORM_POWER_LIMIT 0x0000065C
  28. #define MSR_VR_CURRENT_CONFIG 0x00000601
  29. /* private data for RAPL MSR Interface */
  30. static struct rapl_if_priv rapl_msr_priv = {
  31. .reg_unit = MSR_RAPL_POWER_UNIT,
  32. .regs[RAPL_DOMAIN_PACKAGE] = {
  33. MSR_PKG_POWER_LIMIT, MSR_PKG_ENERGY_STATUS, MSR_PKG_PERF_STATUS, 0, MSR_PKG_POWER_INFO },
  34. .regs[RAPL_DOMAIN_PP0] = {
  35. MSR_PP0_POWER_LIMIT, MSR_PP0_ENERGY_STATUS, 0, MSR_PP0_POLICY, 0 },
  36. .regs[RAPL_DOMAIN_PP1] = {
  37. MSR_PP1_POWER_LIMIT, MSR_PP1_ENERGY_STATUS, 0, MSR_PP1_POLICY, 0 },
  38. .regs[RAPL_DOMAIN_DRAM] = {
  39. MSR_DRAM_POWER_LIMIT, MSR_DRAM_ENERGY_STATUS, MSR_DRAM_PERF_STATUS, 0, MSR_DRAM_POWER_INFO },
  40. .regs[RAPL_DOMAIN_PLATFORM] = {
  41. MSR_PLATFORM_POWER_LIMIT, MSR_PLATFORM_ENERGY_STATUS, 0, 0, 0},
  42. .limits[RAPL_DOMAIN_PACKAGE] = 2,
  43. .limits[RAPL_DOMAIN_PLATFORM] = 2,
  44. };
  45. /* Handles CPU hotplug on multi-socket systems.
  46. * If a CPU goes online as the first CPU of the physical package
  47. * we add the RAPL package to the system. Similarly, when the last
  48. * CPU of the package is removed, we remove the RAPL package and its
  49. * associated domains. Cooling devices are handled accordingly at
  50. * per-domain level.
  51. */
  52. static int rapl_cpu_online(unsigned int cpu)
  53. {
  54. struct rapl_package *rp;
  55. rp = rapl_find_package_domain(cpu, &rapl_msr_priv);
  56. if (!rp) {
  57. rp = rapl_add_package(cpu, &rapl_msr_priv);
  58. if (IS_ERR(rp))
  59. return PTR_ERR(rp);
  60. }
  61. cpumask_set_cpu(cpu, &rp->cpumask);
  62. return 0;
  63. }
  64. static int rapl_cpu_down_prep(unsigned int cpu)
  65. {
  66. struct rapl_package *rp;
  67. int lead_cpu;
  68. rp = rapl_find_package_domain(cpu, &rapl_msr_priv);
  69. if (!rp)
  70. return 0;
  71. cpumask_clear_cpu(cpu, &rp->cpumask);
  72. lead_cpu = cpumask_first(&rp->cpumask);
  73. if (lead_cpu >= nr_cpu_ids)
  74. rapl_remove_package(rp);
  75. else if (rp->lead_cpu == cpu)
  76. rp->lead_cpu = lead_cpu;
  77. return 0;
  78. }
  79. static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
  80. {
  81. u32 msr = (u32)ra->reg;
  82. if (rdmsrl_safe_on_cpu(cpu, msr, &ra->value)) {
  83. pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu);
  84. return -EIO;
  85. }
  86. ra->value &= ra->mask;
  87. return 0;
  88. }
  89. static void rapl_msr_update_func(void *info)
  90. {
  91. struct reg_action *ra = info;
  92. u32 msr = (u32)ra->reg;
  93. u64 val;
  94. ra->err = rdmsrl_safe(msr, &val);
  95. if (ra->err)
  96. return;
  97. val &= ~ra->mask;
  98. val |= ra->value;
  99. ra->err = wrmsrl_safe(msr, val);
  100. }
  101. static int rapl_msr_write_raw(int cpu, struct reg_action *ra)
  102. {
  103. int ret;
  104. ret = smp_call_function_single(cpu, rapl_msr_update_func, ra, 1);
  105. if (WARN_ON_ONCE(ret))
  106. return ret;
  107. return ra->err;
  108. }
  109. /* List of verified CPUs. */
  110. static const struct x86_cpu_id pl4_support_ids[] = {
  111. { X86_VENDOR_INTEL, 6, INTEL_FAM6_TIGERLAKE_L, X86_FEATURE_ANY },
  112. {}
  113. };
  114. static int rapl_msr_probe(struct platform_device *pdev)
  115. {
  116. const struct x86_cpu_id *id = x86_match_cpu(pl4_support_ids);
  117. int ret;
  118. rapl_msr_priv.read_raw = rapl_msr_read_raw;
  119. rapl_msr_priv.write_raw = rapl_msr_write_raw;
  120. if (id) {
  121. rapl_msr_priv.limits[RAPL_DOMAIN_PACKAGE] = 3;
  122. rapl_msr_priv.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_PL4] =
  123. MSR_VR_CURRENT_CONFIG;
  124. pr_info("PL4 support detected.\n");
  125. }
  126. rapl_msr_priv.control_type = powercap_register_control_type(NULL, "intel-rapl", NULL);
  127. if (IS_ERR(rapl_msr_priv.control_type)) {
  128. pr_debug("failed to register powercap control_type.\n");
  129. return PTR_ERR(rapl_msr_priv.control_type);
  130. }
  131. ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "powercap/rapl:online",
  132. rapl_cpu_online, rapl_cpu_down_prep);
  133. if (ret < 0)
  134. goto out;
  135. rapl_msr_priv.pcap_rapl_online = ret;
  136. return 0;
  137. out:
  138. if (ret)
  139. powercap_unregister_control_type(rapl_msr_priv.control_type);
  140. return ret;
  141. }
  142. static int rapl_msr_remove(struct platform_device *pdev)
  143. {
  144. cpuhp_remove_state(rapl_msr_priv.pcap_rapl_online);
  145. powercap_unregister_control_type(rapl_msr_priv.control_type);
  146. return 0;
  147. }
  148. static const struct platform_device_id rapl_msr_ids[] = {
  149. { .name = "intel_rapl_msr", },
  150. {}
  151. };
  152. MODULE_DEVICE_TABLE(platform, rapl_msr_ids);
  153. static struct platform_driver intel_rapl_msr_driver = {
  154. .probe = rapl_msr_probe,
  155. .remove = rapl_msr_remove,
  156. .id_table = rapl_msr_ids,
  157. .driver = {
  158. .name = "intel_rapl_msr",
  159. },
  160. };
  161. module_platform_driver(intel_rapl_msr_driver);
  162. MODULE_DESCRIPTION("Driver for Intel RAPL (Running Average Power Limit) control via MSR interface");
  163. MODULE_AUTHOR("Zhang Rui <rui.zhang@intel.com>");
  164. MODULE_LICENSE("GPL v2");