pinctrl-wmt.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Pinctrl driver for the Wondermedia SoC's
  4. *
  5. * Copyright (c) 2013 Tony Prisk <linux@prisktech.co.nz>
  6. */
  7. #include <linux/err.h>
  8. #include <linux/gpio/driver.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/io.h>
  11. #include <linux/irq.h>
  12. #include <linux/of.h>
  13. #include <linux/of_irq.h>
  14. #include <linux/pinctrl/consumer.h>
  15. #include <linux/pinctrl/machine.h>
  16. #include <linux/pinctrl/pinconf.h>
  17. #include <linux/pinctrl/pinconf-generic.h>
  18. #include <linux/pinctrl/pinctrl.h>
  19. #include <linux/pinctrl/pinmux.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/slab.h>
  22. #include "pinctrl-wmt.h"
  23. static inline void wmt_setbits(struct wmt_pinctrl_data *data, u32 reg,
  24. u32 mask)
  25. {
  26. u32 val;
  27. val = readl_relaxed(data->base + reg);
  28. val |= mask;
  29. writel_relaxed(val, data->base + reg);
  30. }
  31. static inline void wmt_clearbits(struct wmt_pinctrl_data *data, u32 reg,
  32. u32 mask)
  33. {
  34. u32 val;
  35. val = readl_relaxed(data->base + reg);
  36. val &= ~mask;
  37. writel_relaxed(val, data->base + reg);
  38. }
  39. enum wmt_func_sel {
  40. WMT_FSEL_GPIO_IN = 0,
  41. WMT_FSEL_GPIO_OUT = 1,
  42. WMT_FSEL_ALT = 2,
  43. WMT_FSEL_COUNT = 3,
  44. };
  45. static const char * const wmt_functions[WMT_FSEL_COUNT] = {
  46. [WMT_FSEL_GPIO_IN] = "gpio_in",
  47. [WMT_FSEL_GPIO_OUT] = "gpio_out",
  48. [WMT_FSEL_ALT] = "alt",
  49. };
  50. static int wmt_pmx_get_functions_count(struct pinctrl_dev *pctldev)
  51. {
  52. return WMT_FSEL_COUNT;
  53. }
  54. static const char *wmt_pmx_get_function_name(struct pinctrl_dev *pctldev,
  55. unsigned selector)
  56. {
  57. return wmt_functions[selector];
  58. }
  59. static int wmt_pmx_get_function_groups(struct pinctrl_dev *pctldev,
  60. unsigned selector,
  61. const char * const **groups,
  62. unsigned * const num_groups)
  63. {
  64. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  65. /* every pin does every function */
  66. *groups = data->groups;
  67. *num_groups = data->ngroups;
  68. return 0;
  69. }
  70. static int wmt_set_pinmux(struct wmt_pinctrl_data *data, unsigned func,
  71. unsigned pin)
  72. {
  73. u32 bank = WMT_BANK_FROM_PIN(pin);
  74. u32 bit = WMT_BIT_FROM_PIN(pin);
  75. u32 reg_en = data->banks[bank].reg_en;
  76. u32 reg_dir = data->banks[bank].reg_dir;
  77. if (reg_dir == NO_REG) {
  78. dev_err(data->dev, "pin:%d no direction register defined\n",
  79. pin);
  80. return -EINVAL;
  81. }
  82. /*
  83. * If reg_en == NO_REG, we assume it is a dedicated GPIO and cannot be
  84. * disabled (as on VT8500) and that no alternate function is available.
  85. */
  86. switch (func) {
  87. case WMT_FSEL_GPIO_IN:
  88. if (reg_en != NO_REG)
  89. wmt_setbits(data, reg_en, BIT(bit));
  90. wmt_clearbits(data, reg_dir, BIT(bit));
  91. break;
  92. case WMT_FSEL_GPIO_OUT:
  93. if (reg_en != NO_REG)
  94. wmt_setbits(data, reg_en, BIT(bit));
  95. wmt_setbits(data, reg_dir, BIT(bit));
  96. break;
  97. case WMT_FSEL_ALT:
  98. if (reg_en == NO_REG) {
  99. dev_err(data->dev, "pin:%d no alt function available\n",
  100. pin);
  101. return -EINVAL;
  102. }
  103. wmt_clearbits(data, reg_en, BIT(bit));
  104. }
  105. return 0;
  106. }
  107. static int wmt_pmx_set_mux(struct pinctrl_dev *pctldev,
  108. unsigned func_selector,
  109. unsigned group_selector)
  110. {
  111. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  112. u32 pinnum = data->pins[group_selector].number;
  113. return wmt_set_pinmux(data, func_selector, pinnum);
  114. }
  115. static void wmt_pmx_gpio_disable_free(struct pinctrl_dev *pctldev,
  116. struct pinctrl_gpio_range *range,
  117. unsigned offset)
  118. {
  119. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  120. /* disable by setting GPIO_IN */
  121. wmt_set_pinmux(data, WMT_FSEL_GPIO_IN, offset);
  122. }
  123. static int wmt_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
  124. struct pinctrl_gpio_range *range,
  125. unsigned offset,
  126. bool input)
  127. {
  128. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  129. wmt_set_pinmux(data, (input ? WMT_FSEL_GPIO_IN : WMT_FSEL_GPIO_OUT),
  130. offset);
  131. return 0;
  132. }
  133. static const struct pinmux_ops wmt_pinmux_ops = {
  134. .get_functions_count = wmt_pmx_get_functions_count,
  135. .get_function_name = wmt_pmx_get_function_name,
  136. .get_function_groups = wmt_pmx_get_function_groups,
  137. .set_mux = wmt_pmx_set_mux,
  138. .gpio_disable_free = wmt_pmx_gpio_disable_free,
  139. .gpio_set_direction = wmt_pmx_gpio_set_direction,
  140. };
  141. static int wmt_get_groups_count(struct pinctrl_dev *pctldev)
  142. {
  143. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  144. return data->ngroups;
  145. }
  146. static const char *wmt_get_group_name(struct pinctrl_dev *pctldev,
  147. unsigned selector)
  148. {
  149. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  150. return data->groups[selector];
  151. }
  152. static int wmt_get_group_pins(struct pinctrl_dev *pctldev,
  153. unsigned selector,
  154. const unsigned **pins,
  155. unsigned *num_pins)
  156. {
  157. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  158. *pins = &data->pins[selector].number;
  159. *num_pins = 1;
  160. return 0;
  161. }
  162. static int wmt_pctl_find_group_by_pin(struct wmt_pinctrl_data *data, u32 pin)
  163. {
  164. int i;
  165. for (i = 0; i < data->npins; i++) {
  166. if (data->pins[i].number == pin)
  167. return i;
  168. }
  169. return -EINVAL;
  170. }
  171. static int wmt_pctl_dt_node_to_map_func(struct wmt_pinctrl_data *data,
  172. struct device_node *np,
  173. u32 pin, u32 fnum,
  174. struct pinctrl_map **maps)
  175. {
  176. int group;
  177. struct pinctrl_map *map = *maps;
  178. if (fnum >= ARRAY_SIZE(wmt_functions)) {
  179. dev_err(data->dev, "invalid wm,function %d\n", fnum);
  180. return -EINVAL;
  181. }
  182. group = wmt_pctl_find_group_by_pin(data, pin);
  183. if (group < 0) {
  184. dev_err(data->dev, "unable to match pin %d to group\n", pin);
  185. return group;
  186. }
  187. map->type = PIN_MAP_TYPE_MUX_GROUP;
  188. map->data.mux.group = data->groups[group];
  189. map->data.mux.function = wmt_functions[fnum];
  190. (*maps)++;
  191. return 0;
  192. }
  193. static int wmt_pctl_dt_node_to_map_pull(struct wmt_pinctrl_data *data,
  194. struct device_node *np,
  195. u32 pin, u32 pull,
  196. struct pinctrl_map **maps)
  197. {
  198. int group;
  199. unsigned long *configs;
  200. struct pinctrl_map *map = *maps;
  201. if (pull > 2) {
  202. dev_err(data->dev, "invalid wm,pull %d\n", pull);
  203. return -EINVAL;
  204. }
  205. group = wmt_pctl_find_group_by_pin(data, pin);
  206. if (group < 0) {
  207. dev_err(data->dev, "unable to match pin %d to group\n", pin);
  208. return group;
  209. }
  210. configs = kzalloc(sizeof(*configs), GFP_KERNEL);
  211. if (!configs)
  212. return -ENOMEM;
  213. switch (pull) {
  214. case 0:
  215. configs[0] = PIN_CONFIG_BIAS_DISABLE;
  216. break;
  217. case 1:
  218. configs[0] = PIN_CONFIG_BIAS_PULL_DOWN;
  219. break;
  220. case 2:
  221. configs[0] = PIN_CONFIG_BIAS_PULL_UP;
  222. break;
  223. default:
  224. configs[0] = PIN_CONFIG_BIAS_DISABLE;
  225. dev_err(data->dev, "invalid pull state %d - disabling\n", pull);
  226. }
  227. map->type = PIN_MAP_TYPE_CONFIGS_PIN;
  228. map->data.configs.group_or_pin = data->groups[group];
  229. map->data.configs.configs = configs;
  230. map->data.configs.num_configs = 1;
  231. (*maps)++;
  232. return 0;
  233. }
  234. static void wmt_pctl_dt_free_map(struct pinctrl_dev *pctldev,
  235. struct pinctrl_map *maps,
  236. unsigned num_maps)
  237. {
  238. int i;
  239. for (i = 0; i < num_maps; i++)
  240. if (maps[i].type == PIN_MAP_TYPE_CONFIGS_PIN)
  241. kfree(maps[i].data.configs.configs);
  242. kfree(maps);
  243. }
  244. static int wmt_pctl_dt_node_to_map(struct pinctrl_dev *pctldev,
  245. struct device_node *np,
  246. struct pinctrl_map **map,
  247. unsigned *num_maps)
  248. {
  249. struct pinctrl_map *maps, *cur_map;
  250. struct property *pins, *funcs, *pulls;
  251. u32 pin, func, pull;
  252. int num_pins, num_funcs, num_pulls, maps_per_pin;
  253. int i, err;
  254. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  255. pins = of_find_property(np, "wm,pins", NULL);
  256. if (!pins) {
  257. dev_err(data->dev, "missing wmt,pins property\n");
  258. return -EINVAL;
  259. }
  260. funcs = of_find_property(np, "wm,function", NULL);
  261. pulls = of_find_property(np, "wm,pull", NULL);
  262. if (!funcs && !pulls) {
  263. dev_err(data->dev, "neither wm,function nor wm,pull specified\n");
  264. return -EINVAL;
  265. }
  266. /*
  267. * The following lines calculate how many values are defined for each
  268. * of the properties.
  269. */
  270. num_pins = pins->length / sizeof(u32);
  271. num_funcs = funcs ? (funcs->length / sizeof(u32)) : 0;
  272. num_pulls = pulls ? (pulls->length / sizeof(u32)) : 0;
  273. if (num_funcs > 1 && num_funcs != num_pins) {
  274. dev_err(data->dev, "wm,function must have 1 or %d entries\n",
  275. num_pins);
  276. return -EINVAL;
  277. }
  278. if (num_pulls > 1 && num_pulls != num_pins) {
  279. dev_err(data->dev, "wm,pull must have 1 or %d entries\n",
  280. num_pins);
  281. return -EINVAL;
  282. }
  283. maps_per_pin = 0;
  284. if (num_funcs)
  285. maps_per_pin++;
  286. if (num_pulls)
  287. maps_per_pin++;
  288. cur_map = maps = kcalloc(num_pins * maps_per_pin, sizeof(*maps),
  289. GFP_KERNEL);
  290. if (!maps)
  291. return -ENOMEM;
  292. for (i = 0; i < num_pins; i++) {
  293. err = of_property_read_u32_index(np, "wm,pins", i, &pin);
  294. if (err)
  295. goto fail;
  296. if (pin >= (data->nbanks * 32)) {
  297. dev_err(data->dev, "invalid wm,pins value\n");
  298. err = -EINVAL;
  299. goto fail;
  300. }
  301. if (num_funcs) {
  302. err = of_property_read_u32_index(np, "wm,function",
  303. (num_funcs > 1 ? i : 0), &func);
  304. if (err)
  305. goto fail;
  306. err = wmt_pctl_dt_node_to_map_func(data, np, pin, func,
  307. &cur_map);
  308. if (err)
  309. goto fail;
  310. }
  311. if (num_pulls) {
  312. err = of_property_read_u32_index(np, "wm,pull",
  313. (num_pulls > 1 ? i : 0), &pull);
  314. if (err)
  315. goto fail;
  316. err = wmt_pctl_dt_node_to_map_pull(data, np, pin, pull,
  317. &cur_map);
  318. if (err)
  319. goto fail;
  320. }
  321. }
  322. *map = maps;
  323. *num_maps = num_pins * maps_per_pin;
  324. return 0;
  325. /*
  326. * The fail path removes any maps that have been allocated. The fail path is
  327. * only called from code after maps has been kzalloc'd. It is also safe to
  328. * pass 'num_pins * maps_per_pin' as the map count even though we probably
  329. * failed before all the mappings were read as all maps are allocated at once,
  330. * and configs are only allocated for .type = PIN_MAP_TYPE_CONFIGS_PIN - there
  331. * is no failpath where a config can be allocated without .type being set.
  332. */
  333. fail:
  334. wmt_pctl_dt_free_map(pctldev, maps, num_pins * maps_per_pin);
  335. return err;
  336. }
  337. static const struct pinctrl_ops wmt_pctl_ops = {
  338. .get_groups_count = wmt_get_groups_count,
  339. .get_group_name = wmt_get_group_name,
  340. .get_group_pins = wmt_get_group_pins,
  341. .dt_node_to_map = wmt_pctl_dt_node_to_map,
  342. .dt_free_map = wmt_pctl_dt_free_map,
  343. };
  344. static int wmt_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
  345. unsigned long *config)
  346. {
  347. return -ENOTSUPP;
  348. }
  349. static int wmt_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
  350. unsigned long *configs, unsigned num_configs)
  351. {
  352. struct wmt_pinctrl_data *data = pinctrl_dev_get_drvdata(pctldev);
  353. enum pin_config_param param;
  354. u32 arg;
  355. u32 bank = WMT_BANK_FROM_PIN(pin);
  356. u32 bit = WMT_BIT_FROM_PIN(pin);
  357. u32 reg_pull_en = data->banks[bank].reg_pull_en;
  358. u32 reg_pull_cfg = data->banks[bank].reg_pull_cfg;
  359. int i;
  360. if ((reg_pull_en == NO_REG) || (reg_pull_cfg == NO_REG)) {
  361. dev_err(data->dev, "bias functions not supported on pin %d\n",
  362. pin);
  363. return -EINVAL;
  364. }
  365. for (i = 0; i < num_configs; i++) {
  366. param = pinconf_to_config_param(configs[i]);
  367. arg = pinconf_to_config_argument(configs[i]);
  368. if ((param == PIN_CONFIG_BIAS_PULL_DOWN) ||
  369. (param == PIN_CONFIG_BIAS_PULL_UP)) {
  370. if (arg == 0)
  371. param = PIN_CONFIG_BIAS_DISABLE;
  372. }
  373. switch (param) {
  374. case PIN_CONFIG_BIAS_DISABLE:
  375. wmt_clearbits(data, reg_pull_en, BIT(bit));
  376. break;
  377. case PIN_CONFIG_BIAS_PULL_DOWN:
  378. wmt_clearbits(data, reg_pull_cfg, BIT(bit));
  379. wmt_setbits(data, reg_pull_en, BIT(bit));
  380. break;
  381. case PIN_CONFIG_BIAS_PULL_UP:
  382. wmt_setbits(data, reg_pull_cfg, BIT(bit));
  383. wmt_setbits(data, reg_pull_en, BIT(bit));
  384. break;
  385. default:
  386. dev_err(data->dev, "unknown pinconf param\n");
  387. return -EINVAL;
  388. }
  389. } /* for each config */
  390. return 0;
  391. }
  392. static const struct pinconf_ops wmt_pinconf_ops = {
  393. .pin_config_get = wmt_pinconf_get,
  394. .pin_config_set = wmt_pinconf_set,
  395. };
  396. static struct pinctrl_desc wmt_desc = {
  397. .owner = THIS_MODULE,
  398. .name = "pinctrl-wmt",
  399. .pctlops = &wmt_pctl_ops,
  400. .pmxops = &wmt_pinmux_ops,
  401. .confops = &wmt_pinconf_ops,
  402. };
  403. static int wmt_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
  404. {
  405. struct wmt_pinctrl_data *data = gpiochip_get_data(chip);
  406. u32 bank = WMT_BANK_FROM_PIN(offset);
  407. u32 bit = WMT_BIT_FROM_PIN(offset);
  408. u32 reg_dir = data->banks[bank].reg_dir;
  409. u32 val;
  410. val = readl_relaxed(data->base + reg_dir);
  411. if (val & BIT(bit))
  412. return GPIO_LINE_DIRECTION_OUT;
  413. return GPIO_LINE_DIRECTION_IN;
  414. }
  415. static int wmt_gpio_get_value(struct gpio_chip *chip, unsigned offset)
  416. {
  417. struct wmt_pinctrl_data *data = gpiochip_get_data(chip);
  418. u32 bank = WMT_BANK_FROM_PIN(offset);
  419. u32 bit = WMT_BIT_FROM_PIN(offset);
  420. u32 reg_data_in = data->banks[bank].reg_data_in;
  421. if (reg_data_in == NO_REG) {
  422. dev_err(data->dev, "no data in register defined\n");
  423. return -EINVAL;
  424. }
  425. return !!(readl_relaxed(data->base + reg_data_in) & BIT(bit));
  426. }
  427. static void wmt_gpio_set_value(struct gpio_chip *chip, unsigned offset,
  428. int val)
  429. {
  430. struct wmt_pinctrl_data *data = gpiochip_get_data(chip);
  431. u32 bank = WMT_BANK_FROM_PIN(offset);
  432. u32 bit = WMT_BIT_FROM_PIN(offset);
  433. u32 reg_data_out = data->banks[bank].reg_data_out;
  434. if (reg_data_out == NO_REG) {
  435. dev_err(data->dev, "no data out register defined\n");
  436. return;
  437. }
  438. if (val)
  439. wmt_setbits(data, reg_data_out, BIT(bit));
  440. else
  441. wmt_clearbits(data, reg_data_out, BIT(bit));
  442. }
  443. static int wmt_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
  444. {
  445. return pinctrl_gpio_direction_input(chip->base + offset);
  446. }
  447. static int wmt_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
  448. int value)
  449. {
  450. wmt_gpio_set_value(chip, offset, value);
  451. return pinctrl_gpio_direction_output(chip->base + offset);
  452. }
  453. static const struct gpio_chip wmt_gpio_chip = {
  454. .label = "gpio-wmt",
  455. .owner = THIS_MODULE,
  456. .request = gpiochip_generic_request,
  457. .free = gpiochip_generic_free,
  458. .get_direction = wmt_gpio_get_direction,
  459. .direction_input = wmt_gpio_direction_input,
  460. .direction_output = wmt_gpio_direction_output,
  461. .get = wmt_gpio_get_value,
  462. .set = wmt_gpio_set_value,
  463. .can_sleep = false,
  464. };
  465. int wmt_pinctrl_probe(struct platform_device *pdev,
  466. struct wmt_pinctrl_data *data)
  467. {
  468. int err;
  469. data->base = devm_platform_ioremap_resource(pdev, 0);
  470. if (IS_ERR(data->base))
  471. return PTR_ERR(data->base);
  472. wmt_desc.pins = data->pins;
  473. wmt_desc.npins = data->npins;
  474. data->gpio_chip = wmt_gpio_chip;
  475. data->gpio_chip.parent = &pdev->dev;
  476. data->gpio_chip.of_node = pdev->dev.of_node;
  477. data->gpio_chip.ngpio = data->nbanks * 32;
  478. platform_set_drvdata(pdev, data);
  479. data->dev = &pdev->dev;
  480. data->pctl_dev = devm_pinctrl_register(&pdev->dev, &wmt_desc, data);
  481. if (IS_ERR(data->pctl_dev)) {
  482. dev_err(&pdev->dev, "Failed to register pinctrl\n");
  483. return PTR_ERR(data->pctl_dev);
  484. }
  485. err = gpiochip_add_data(&data->gpio_chip, data);
  486. if (err) {
  487. dev_err(&pdev->dev, "could not add GPIO chip\n");
  488. return err;
  489. }
  490. err = gpiochip_add_pin_range(&data->gpio_chip, dev_name(data->dev),
  491. 0, 0, data->nbanks * 32);
  492. if (err)
  493. goto fail_range;
  494. dev_info(&pdev->dev, "Pin controller initialized\n");
  495. return 0;
  496. fail_range:
  497. gpiochip_remove(&data->gpio_chip);
  498. return err;
  499. }