pinctrl-light.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (C) 2021 Alibaba Group Holding Limited.
  4. *
  5. */
  6. #include <linux/err.h>
  7. #include <linux/init.h>
  8. #include <linux/io.h>
  9. #include <linux/module.h>
  10. #include <linux/of.h>
  11. #include <linux/of_device.h>
  12. #include <linux/pinctrl/machine.h>
  13. #include <linux/pinctrl/pinconf.h>
  14. #include <linux/pinctrl/pinctrl.h>
  15. #include <linux/pinctrl/pinmux.h>
  16. #include <linux/slab.h>
  17. #include <dt-bindings/pinctrl/light-mpw-pinctrl.h>
  18. #include <dt-bindings/pinctrl/light-fm-right-pinctrl.h>
  19. #include <dt-bindings/pinctrl/light-fm-left-pinctrl.h>
  20. #include <dt-bindings/pinctrl/light-fm-aon-pinctrl.h>
  21. #include "../core.h"
  22. struct light_pin {
  23. unsigned int pin_id;
  24. unsigned int mux_mode;
  25. unsigned long config;
  26. };
  27. struct light_pin_group {
  28. const char *name;
  29. unsigned int npins;
  30. unsigned int *pin_ids;
  31. struct light_pin *pins;
  32. };
  33. struct light_pmx_func {
  34. const char *name;
  35. const char **groups;
  36. unsigned int num_groups;
  37. };
  38. struct light_pinctrl_soc_info {
  39. struct device *dev;
  40. struct pinctrl_desc *desc;
  41. const struct pinctrl_pin_desc *pins;
  42. unsigned int npins;
  43. struct light_pin_group *groups;
  44. unsigned int ngroups;
  45. unsigned int grp_index;
  46. struct light_pmx_func *functions;
  47. unsigned int nfunctions;
  48. unsigned int cfg_off;
  49. unsigned int mux_off;
  50. int (*covert_pin_off)(const unsigned int pin_id);
  51. };
  52. struct light_pinctrl {
  53. struct device *dev;
  54. struct pinctrl_dev *pctl;
  55. void __iomem *base;
  56. const struct light_pinctrl_soc_info *info;
  57. };
  58. #define LIGHT_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin)
  59. #define LIGHT_PAD_CONFIG(idx) (priv->info->cfg_off + (idx >> 1) * 4)
  60. #define LIGHT_PAD_MUX(idx) (priv->info->mux_off + ((idx >> 3) * 4))
  61. static const char *pin_get_name_from_info(struct light_pinctrl_soc_info *info,
  62. const unsigned int pin_id)
  63. {
  64. int i;
  65. for (i = 0; i < info->npins; i++) {
  66. if (info->pins[i].number == pin_id)
  67. return info->pins[i].name;
  68. }
  69. return NULL;
  70. }
  71. static inline const struct light_pin_group *light_pinctrl_find_group_by_name(
  72. const struct light_pinctrl_soc_info *info,
  73. const char *name)
  74. {
  75. const struct light_pin_group *grp = NULL;
  76. unsigned int i;
  77. for (i = 0; i < info->ngroups; i++) {
  78. if (!strcmp(info->groups[i].name, name)) {
  79. grp = &info->groups[i];
  80. break;
  81. }
  82. }
  83. return grp;
  84. }
  85. static int light_get_groups_count(struct pinctrl_dev *pctldev)
  86. {
  87. struct light_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
  88. const struct light_pinctrl_soc_info *info = priv->info;
  89. return info->ngroups;
  90. }
  91. static const char *light_get_group_name(struct pinctrl_dev *pctldev,
  92. unsigned int selector)
  93. {
  94. struct light_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
  95. const struct light_pinctrl_soc_info *info = priv->info;
  96. return info->groups[selector].name;
  97. }
  98. static int light_get_group_pins(struct pinctrl_dev *pctldev,
  99. unsigned int selector, const unsigned int **pins,
  100. unsigned int *npins)
  101. {
  102. struct light_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
  103. const struct light_pinctrl_soc_info *info = priv->info;
  104. if (selector >= info->ngroups)
  105. return -EINVAL;
  106. *pins = info->groups[selector].pin_ids;
  107. *npins = info->groups[selector].npins;
  108. return 0;
  109. }
  110. static void light_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
  111. unsigned int offset)
  112. {
  113. seq_printf(s, "%s", dev_name(pctldev->dev));
  114. }
  115. static int light_dt_node_to_map(struct pinctrl_dev *pctldev,
  116. struct device_node *np,
  117. struct pinctrl_map **map, unsigned int *num_maps)
  118. {
  119. struct light_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
  120. const struct light_pinctrl_soc_info *info = priv->info;
  121. const struct light_pin_group *grp;
  122. struct pinctrl_map *new_map;
  123. struct device_node *parent;
  124. int map_num = 1;
  125. int i, j;
  126. /*
  127. * first find the group of this node and check if we need create
  128. * config maps for pins
  129. */
  130. grp = light_pinctrl_find_group_by_name(info, np->name);
  131. if (!grp) {
  132. dev_err(info->dev, "unable to find group for node %s\n",
  133. np->name);
  134. return -EINVAL;
  135. }
  136. for (i = 0; i < grp->npins; i++)
  137. map_num++;
  138. new_map = kmalloc_array(map_num, sizeof(struct pinctrl_map),
  139. GFP_KERNEL);
  140. if (!new_map)
  141. return -ENOMEM;
  142. *map = new_map;
  143. *num_maps = map_num;
  144. /* create mux map */
  145. parent = of_get_parent(np);
  146. if (!parent) {
  147. kfree(new_map);
  148. return -EINVAL;
  149. }
  150. new_map[0].type = PIN_MAP_TYPE_MUX_GROUP;
  151. new_map[0].data.mux.function = parent->name;
  152. new_map[0].data.mux.group = np->name;
  153. of_node_put(parent);
  154. /* create config map */
  155. new_map++;
  156. for (i = j = 0; i < grp->npins; i++) {
  157. new_map[j].type = PIN_MAP_TYPE_CONFIGS_PIN;
  158. new_map[j].data.configs.group_or_pin =
  159. pin_get_name(pctldev, grp->pins[i].pin_id);
  160. new_map[j].data.configs.configs = &grp->pins[i].config;
  161. new_map[j].data.configs.num_configs = 1;
  162. j++;
  163. }
  164. dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n",
  165. (*map)->data.mux.function, (*map)->data.mux.group, map_num);
  166. return 0;
  167. }
  168. static void light_dt_free_map(struct pinctrl_dev *pctldev,
  169. struct pinctrl_map *map, unsigned int num_maps)
  170. {
  171. kfree(map);
  172. }
  173. static const struct pinctrl_ops light_pctrl_ops = {
  174. .get_groups_count = light_get_groups_count,
  175. .get_group_name = light_get_group_name,
  176. .get_group_pins = light_get_group_pins,
  177. .pin_dbg_show = light_pin_dbg_show,
  178. .dt_node_to_map = light_dt_node_to_map,
  179. .dt_free_map = light_dt_free_map,
  180. };
  181. static int light_pmx_set(struct pinctrl_dev *pctldev, unsigned int selector,
  182. unsigned int group)
  183. {
  184. struct light_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
  185. const struct light_pinctrl_soc_info *info = priv->info;
  186. unsigned int npins, pin_id;
  187. int i;
  188. struct light_pin_group *grp;
  189. /*
  190. * Configure the mux mode for each pin in the group for a specific
  191. * function.
  192. */
  193. grp = &info->groups[group];
  194. npins = grp->npins;
  195. dev_dbg(priv->dev, "enable function %s group %s\n",
  196. info->functions[selector].name, grp->name);
  197. for (i = 0; i < npins; i++) {
  198. struct light_pin *pin = &grp->pins[i];
  199. unsigned int mux, shift;
  200. dev_dbg(priv->dev, "pinmux set pin %s\n",
  201. pin_get_name(pctldev, pin->pin_id));
  202. pin_id = pin->pin_id;
  203. if (info->covert_pin_off) {
  204. pin_id = info->covert_pin_off(pin_id);
  205. if (pin_id < 0) /* no need to configure mux */
  206. continue;
  207. }
  208. mux = readl(priv->base + LIGHT_PAD_MUX(pin_id));
  209. shift = ((pin_id % 8) << 2);
  210. mux &= ~(0xF << shift); /* 4 mux bits for one pad */
  211. mux |= (pin->mux_mode << shift);
  212. writel(mux, priv->base + LIGHT_PAD_MUX(pin_id));
  213. dev_dbg(priv->dev, "write: offset 0x%x val 0x%x\n",
  214. LIGHT_PAD_MUX(pin_id), mux);
  215. }
  216. return 0;
  217. }
  218. static int light_pmx_get_funcs_count(struct pinctrl_dev *pctldev)
  219. {
  220. struct light_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
  221. const struct light_pinctrl_soc_info *info = priv->info;
  222. return info->nfunctions;
  223. }
  224. static const char *light_pmx_get_func_name(struct pinctrl_dev *pctldev,
  225. unsigned int selector)
  226. {
  227. struct light_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
  228. const struct light_pinctrl_soc_info *info = priv->info;
  229. return info->functions[selector].name;
  230. }
  231. static int light_pmx_get_groups(struct pinctrl_dev *pctldev,
  232. unsigned int selector,
  233. const char * const **groups,
  234. unsigned int * const num_groups)
  235. {
  236. struct light_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
  237. const struct light_pinctrl_soc_info *info = priv->info;
  238. *groups = info->functions[selector].groups;
  239. *num_groups = info->functions[selector].num_groups;
  240. return 0;
  241. }
  242. static const struct pinmux_ops light_pmx_ops = {
  243. .get_functions_count = light_pmx_get_funcs_count,
  244. .get_function_name = light_pmx_get_func_name,
  245. .get_function_groups = light_pmx_get_groups,
  246. .set_mux = light_pmx_set,
  247. };
  248. static int light_pinconf_get(struct pinctrl_dev *pctldev,
  249. unsigned int pin_id, unsigned long *config)
  250. {
  251. struct light_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
  252. *config = readl(priv->base + LIGHT_PAD_CONFIG(pin_id));
  253. return 0;
  254. }
  255. static int light_pinconf_set(struct pinctrl_dev *pctldev,
  256. unsigned int pin_id, unsigned long *configs,
  257. unsigned int num_configs)
  258. {
  259. struct light_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
  260. int i;
  261. dev_dbg(priv->dev, "pinconf set pin %s\n",
  262. pin_get_name(pctldev, pin_id));
  263. for (i = 0; i < num_configs; i++) {
  264. unsigned long config;
  265. unsigned int shift;
  266. config = readl(priv->base + LIGHT_PAD_CONFIG(pin_id));
  267. shift = ((pin_id % 2) << 4);
  268. config &= ~(0xFFFF << shift); /* 16 cfg bits for one pad */
  269. config |= (configs[i] << shift);
  270. writel(config, priv->base + LIGHT_PAD_CONFIG(pin_id));
  271. dev_dbg(priv->dev, "write: offset 0x%x val 0x%lx\n",
  272. LIGHT_PAD_CONFIG(pin_id), config);
  273. } /* for each config */
  274. return 0;
  275. }
  276. static void light_pinconf_dbg_show(struct pinctrl_dev *pctldev,
  277. struct seq_file *s, unsigned int pin_id)
  278. {
  279. struct light_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
  280. unsigned long config;
  281. config = readl(priv->base + LIGHT_PAD_CONFIG(pin_id));
  282. seq_printf(s, "0x%lx", config);
  283. }
  284. static void light_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
  285. struct seq_file *s, unsigned int group)
  286. {
  287. struct light_pinctrl *priv = pinctrl_dev_get_drvdata(pctldev);
  288. const struct light_pinctrl_soc_info *info = priv->info;
  289. struct light_pin_group *grp;
  290. unsigned long config;
  291. const char *name;
  292. int i, ret;
  293. if (group > info->ngroups)
  294. return;
  295. seq_puts(s, "\n");
  296. grp = &info->groups[group];
  297. for (i = 0; i < grp->npins; i++) {
  298. struct light_pin *pin = &grp->pins[i];
  299. name = pin_get_name(pctldev, pin->pin_id);
  300. ret = light_pinconf_get(pctldev, pin->pin_id, &config);
  301. if (ret)
  302. return;
  303. seq_printf(s, "%s: 0x%lx", name, config);
  304. }
  305. }
  306. static const struct pinconf_ops light_pinconf_ops = {
  307. .pin_config_get = light_pinconf_get,
  308. .pin_config_set = light_pinconf_set,
  309. .pin_config_dbg_show = light_pinconf_dbg_show,
  310. .pin_config_group_dbg_show = light_pinconf_group_dbg_show,
  311. };
  312. /*
  313. * Each pin represented in thead,pins consists:
  314. * - u32 PIN_FUNC_ID
  315. * - u32 pin mux_mode
  316. * - u32 pin config
  317. * so 12 bytes in total for each pin.
  318. */
  319. #define LIGHT_PIN_SIZE 12
  320. static int light_pinctrl_parse_groups(struct device_node *np,
  321. struct light_pin_group *grp,
  322. struct light_pinctrl_soc_info *info,
  323. u32 index)
  324. {
  325. int size, i;
  326. const __be32 *list;
  327. dev_dbg(info->dev, "group(%d): %s\n", index, np->name);
  328. /* Initialise group */
  329. grp->name = np->name;
  330. /*
  331. * the binding format is thead,pins = <PIN MUX CONFIG>,
  332. * do sanity check and calculate pins number
  333. */
  334. list = of_get_property(np, "thead,pins", &size);
  335. if (!list) {
  336. dev_err(info->dev, "no thead,pins property in node %s\n",
  337. np->full_name);
  338. return -EINVAL;
  339. }
  340. /* we do not check return since it's safe node passed down */
  341. if (!size || size % LIGHT_PIN_SIZE) {
  342. dev_err(info->dev, "Invalid thead,pins property in node %s\n",
  343. np->full_name);
  344. return -EINVAL;
  345. }
  346. grp->npins = size / LIGHT_PIN_SIZE;
  347. grp->pins = devm_kzalloc(info->dev,
  348. grp->npins * sizeof(struct light_pin),
  349. GFP_KERNEL);
  350. grp->pin_ids = devm_kzalloc(info->dev,
  351. grp->npins * sizeof(unsigned int),
  352. GFP_KERNEL);
  353. if (!grp->pins || !grp->pin_ids)
  354. return -ENOMEM;
  355. for (i = 0; i < grp->npins; i++) {
  356. struct light_pin *pin = &grp->pins[i];
  357. pin->pin_id = be32_to_cpu(*list++);
  358. pin->mux_mode = be32_to_cpu(*list++) & 0xF;
  359. pin->config = be32_to_cpu(*list++) & 0xFFFF;
  360. grp->pin_ids[i] = grp->pins[i].pin_id;
  361. dev_dbg(info->dev, "%s: 0x%04x 0x%04lx",
  362. pin_get_name_from_info(info, pin->pin_id), pin->mux_mode, pin->config);
  363. }
  364. return 0;
  365. }
  366. static int light_pinctrl_parse_functions(struct device_node *np,
  367. struct light_pinctrl_soc_info *info,
  368. u32 index)
  369. {
  370. struct device_node *child;
  371. struct light_pmx_func *func;
  372. struct light_pin_group *grp;
  373. u32 i = 0;
  374. dev_dbg(info->dev, "parse function(%d): %s\n", index, np->name);
  375. func = &info->functions[index];
  376. /* Initialise function */
  377. func->name = np->name;
  378. func->num_groups = of_get_child_count(np);
  379. if (func->num_groups == 0) {
  380. dev_err(info->dev, "no groups defined in %s\n", np->full_name);
  381. return -EINVAL;
  382. }
  383. func->groups = devm_kzalloc(info->dev,
  384. func->num_groups * sizeof(char *),
  385. GFP_KERNEL);
  386. if (!func->groups)
  387. return -ENOMEM;
  388. for_each_child_of_node(np, child) {
  389. func->groups[i] = child->name;
  390. grp = &info->groups[info->grp_index++];
  391. light_pinctrl_parse_groups(child, grp, info, i++);
  392. }
  393. return 0;
  394. }
  395. static int light_pinctrl_probe_dt(struct platform_device *pdev,
  396. struct light_pinctrl_soc_info *info)
  397. {
  398. struct device_node *np = pdev->dev.of_node;
  399. struct device_node *child;
  400. u32 nfuncs = 0;
  401. u32 i = 0;
  402. if (!np)
  403. return -ENODEV;
  404. nfuncs = of_get_child_count(np);
  405. if (nfuncs <= 0) {
  406. dev_err(&pdev->dev, "no functions defined\n");
  407. return -EINVAL;
  408. }
  409. info->nfunctions = nfuncs;
  410. info->functions = devm_kzalloc(&pdev->dev,
  411. nfuncs * sizeof(struct light_pmx_func),
  412. GFP_KERNEL);
  413. if (!info->functions)
  414. return -ENOMEM;
  415. info->ngroups = 0;
  416. for_each_child_of_node(np, child)
  417. info->ngroups += of_get_child_count(child);
  418. info->groups = devm_kzalloc(&pdev->dev, info->ngroups *
  419. sizeof(struct light_pin_group),
  420. GFP_KERNEL);
  421. if (!info->groups)
  422. return -ENOMEM;
  423. for_each_child_of_node(np, child)
  424. light_pinctrl_parse_functions(child, info, i++);
  425. return 0;
  426. }
  427. static int light_pinctrl_probe(struct platform_device *pdev)
  428. {
  429. struct light_pinctrl *priv;
  430. struct light_pinctrl_soc_info *info;
  431. struct resource *res;
  432. int ret;
  433. info = (struct light_pinctrl_soc_info *)of_device_get_match_data(&pdev->dev);
  434. if (!info || !info->pins || !info->npins) {
  435. dev_err(&pdev->dev, "wrong pinctrl info\n");
  436. return -EINVAL;
  437. }
  438. info->dev = &pdev->dev;
  439. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  440. if (!priv)
  441. return -ENOMEM;
  442. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  443. priv->base = devm_ioremap_resource(&pdev->dev, res);
  444. if (IS_ERR(priv->base))
  445. return PTR_ERR(priv->base);
  446. info->desc = devm_kzalloc(&pdev->dev, sizeof(*info->desc), GFP_KERNEL);
  447. if (!info->desc)
  448. return -ENOMEM;
  449. info->desc->name = dev_name(&pdev->dev);
  450. info->desc->pins = info->pins;
  451. info->desc->npins = info->npins;
  452. info->desc->pctlops = &light_pctrl_ops;
  453. info->desc->pmxops = &light_pmx_ops;
  454. info->desc->confops = &light_pinconf_ops;
  455. info->desc->owner = THIS_MODULE;
  456. ret = light_pinctrl_probe_dt(pdev, info);
  457. if (ret) {
  458. dev_err(&pdev->dev, "fail to probe dt properties\n");
  459. return ret;
  460. }
  461. priv->info = info;
  462. priv->dev = info->dev;
  463. platform_set_drvdata(pdev, priv);
  464. priv->pctl = pinctrl_register(info->desc, &pdev->dev, priv);
  465. if (!priv->pctl) {
  466. dev_err(&pdev->dev, "could not register light pinctrl driver\n");
  467. return -EINVAL;
  468. }
  469. dev_info(&pdev->dev, "initialized light pinctrl driver\n");
  470. return 0;
  471. }
  472. /* Pad names for the pinmux subsystem */
  473. static const struct pinctrl_pin_desc light_mpw_pinctrl_pads[] = {
  474. LIGHT_PINCTRL_PIN(BOOT_SEL0),
  475. LIGHT_PINCTRL_PIN(BOOT_SEL1),
  476. LIGHT_PINCTRL_PIN(BOOT_SEL2),
  477. LIGHT_PINCTRL_PIN(OSC_BOOT),
  478. LIGHT_PINCTRL_PIN(QSPI0_SCK),
  479. LIGHT_PINCTRL_PIN(QSPI0_SSN0),
  480. LIGHT_PINCTRL_PIN(QSPI0_M0_MOSI),
  481. LIGHT_PINCTRL_PIN(QSPI0_M1_MISO),
  482. LIGHT_PINCTRL_PIN(QSPI0_M2_WP),
  483. LIGHT_PINCTRL_PIN(QSPI0_M3_HOLD),
  484. LIGHT_PINCTRL_PIN(QSPI1_SCK),
  485. LIGHT_PINCTRL_PIN(QSPI1_SSN0),
  486. LIGHT_PINCTRL_PIN(QSPI1_M0_MOSI),
  487. LIGHT_PINCTRL_PIN(QSPI1_M1_MISO),
  488. LIGHT_PINCTRL_PIN(QSPI1_M2_WP),
  489. LIGHT_PINCTRL_PIN(QSPI1_M3_HOLD),
  490. LIGHT_PINCTRL_PIN(SPI_SCK),
  491. LIGHT_PINCTRL_PIN(SPI_SSN0),
  492. LIGHT_PINCTRL_PIN(SPI_SSN1),
  493. LIGHT_PINCTRL_PIN(SPI_MOSI),
  494. LIGHT_PINCTRL_PIN(SPI_MISO),
  495. LIGHT_PINCTRL_PIN(I2C0_SCL),
  496. LIGHT_PINCTRL_PIN(I2C0_SDA),
  497. LIGHT_PINCTRL_PIN(I2C1_SCL),
  498. LIGHT_PINCTRL_PIN(I2C1_SDA),
  499. LIGHT_PINCTRL_PIN(I2C2_SCL),
  500. LIGHT_PINCTRL_PIN(I2C2_SDA),
  501. LIGHT_PINCTRL_PIN(I2C3_SCL),
  502. LIGHT_PINCTRL_PIN(I2C3_SDA),
  503. LIGHT_PINCTRL_PIN(UART0_RXD),
  504. LIGHT_PINCTRL_PIN(UART0_TXD),
  505. LIGHT_PINCTRL_PIN(UART1_RXD),
  506. LIGHT_PINCTRL_PIN(UART1_TXD),
  507. LIGHT_PINCTRL_PIN(UART3_RXD),
  508. LIGHT_PINCTRL_PIN(UART3_TXD),
  509. LIGHT_PINCTRL_PIN(UART4_RXD),
  510. LIGHT_PINCTRL_PIN(UART4_TXD),
  511. LIGHT_PINCTRL_PIN(UART4_CTSN),
  512. LIGHT_PINCTRL_PIN(UART4_RTSN),
  513. LIGHT_PINCTRL_PIN(GPIO1_DATA7),
  514. LIGHT_PINCTRL_PIN(GPIO1_DATA8),
  515. LIGHT_PINCTRL_PIN(GPIO1_DATA9),
  516. LIGHT_PINCTRL_PIN(GPIO1_DATA10),
  517. LIGHT_PINCTRL_PIN(GPIO1_DATA11),
  518. LIGHT_PINCTRL_PIN(GPIO1_DATA12),
  519. LIGHT_PINCTRL_PIN(GPIO1_DATA13),
  520. LIGHT_PINCTRL_PIN(GPIO1_DATA14),
  521. LIGHT_PINCTRL_PIN(GPIO1_DATA15),
  522. LIGHT_PINCTRL_PIN(GPIO1_DATA16),
  523. LIGHT_PINCTRL_PIN(GPIO1_DATA17),
  524. LIGHT_PINCTRL_PIN(GPIO1_DATA18),
  525. LIGHT_PINCTRL_PIN(GPIO1_DATA19),
  526. LIGHT_PINCTRL_PIN(GPIO1_DATA20),
  527. LIGHT_PINCTRL_PIN(GPIO1_DATA21),
  528. LIGHT_PINCTRL_PIN(GPIO1_DATA22),
  529. LIGHT_PINCTRL_PIN(GPIO1_DATA23),
  530. LIGHT_PINCTRL_PIN(GPIO1_DATA24),
  531. LIGHT_PINCTRL_PIN(GPIO1_DATA25),
  532. LIGHT_PINCTRL_PIN(GPIO1_DATA26),
  533. LIGHT_PINCTRL_PIN(EMMC0_DETN),
  534. LIGHT_PINCTRL_PIN(EMMC0_PWRON),
  535. LIGHT_PINCTRL_PIN(EMMC0_WPRTN),
  536. LIGHT_PINCTRL_PIN(EMMC0_VOL_STB),
  537. LIGHT_PINCTRL_PIN(EMMC1_DETN),
  538. LIGHT_PINCTRL_PIN(EMMC1_PWRON),
  539. LIGHT_PINCTRL_PIN(EMMC1_WPRTN),
  540. LIGHT_PINCTRL_PIN(EMMC1_VOL_STB),
  541. LIGHT_PINCTRL_PIN(C910_JTG_TCLK),
  542. LIGHT_PINCTRL_PIN(C910_JTG_TRST),
  543. LIGHT_PINCTRL_PIN(C910_JTG_TDI),
  544. LIGHT_PINCTRL_PIN(C910_JTG_TMS),
  545. LIGHT_PINCTRL_PIN(C910_JTG_TDO),
  546. LIGHT_PINCTRL_PIN(GPIO2_DATA8),
  547. LIGHT_PINCTRL_PIN(GPIO2_DATA9),
  548. LIGHT_PINCTRL_PIN(GPIO2_DATA10),
  549. LIGHT_PINCTRL_PIN(GPIO2_DATA11),
  550. LIGHT_PINCTRL_PIN(GPIO2_DATA12),
  551. LIGHT_PINCTRL_PIN(GPIO2_DATA13),
  552. LIGHT_PINCTRL_PIN(GPIO2_DATA14),
  553. LIGHT_PINCTRL_PIN(RGM_PAD_MS_RTE),
  554. LIGHT_PINCTRL_PIN(GMAC_EPHY_CLK),
  555. LIGHT_PINCTRL_PIN(GMAC_TX_CLK),
  556. LIGHT_PINCTRL_PIN(GMAC_RX_CLK),
  557. LIGHT_PINCTRL_PIN(GMAC_TXEN),
  558. LIGHT_PINCTRL_PIN(GMAC_TXD0),
  559. LIGHT_PINCTRL_PIN(GMAC_TXD1),
  560. LIGHT_PINCTRL_PIN(GMAC_TXD2),
  561. LIGHT_PINCTRL_PIN(GMAC_TXD3),
  562. LIGHT_PINCTRL_PIN(GMAC_RXDV),
  563. LIGHT_PINCTRL_PIN(GMAC_RXD0),
  564. LIGHT_PINCTRL_PIN(GMAC_RXD1),
  565. LIGHT_PINCTRL_PIN(GMAC_RXD2),
  566. LIGHT_PINCTRL_PIN(GMAC_RXD3),
  567. LIGHT_PINCTRL_PIN(GMAC_MDC),
  568. LIGHT_PINCTRL_PIN(GMAC_MDIO),
  569. LIGHT_PINCTRL_PIN(GMAC_COL),
  570. LIGHT_PINCTRL_PIN(GMAC_CRS),
  571. };
  572. static const struct pinctrl_pin_desc light_fm_right_pinctrl_pads[] = {
  573. LIGHT_PINCTRL_PIN(FM_UART0_TXD),
  574. LIGHT_PINCTRL_PIN(FM_UART0_RXD),
  575. LIGHT_PINCTRL_PIN(FM_QSPI0_SCLK),
  576. LIGHT_PINCTRL_PIN(FM_QSPI0_CSN0),
  577. LIGHT_PINCTRL_PIN(FM_QSPI0_CSN1),
  578. LIGHT_PINCTRL_PIN(FM_QSPI0_D0_MOSI),
  579. LIGHT_PINCTRL_PIN(FM_QSPI0_D1_MISO),
  580. LIGHT_PINCTRL_PIN(FM_QSPI0_D2_WP),
  581. LIGHT_PINCTRL_PIN(FM_QSPI0_D3_HOLD),
  582. LIGHT_PINCTRL_PIN(FM_I2C2_SCL),
  583. LIGHT_PINCTRL_PIN(FM_I2C2_SDA),
  584. LIGHT_PINCTRL_PIN(FM_I2C3_SCL),
  585. LIGHT_PINCTRL_PIN(FM_I2C3_SDA),
  586. LIGHT_PINCTRL_PIN(FM_GPIO2_13),
  587. LIGHT_PINCTRL_PIN(FM_SPI_SCLK),
  588. LIGHT_PINCTRL_PIN(FM_SPI_CSN),
  589. LIGHT_PINCTRL_PIN(FM_SPI_MOSI),
  590. LIGHT_PINCTRL_PIN(FM_SPI_MISO),
  591. LIGHT_PINCTRL_PIN(FM_GPIO2_18),
  592. LIGHT_PINCTRL_PIN(FM_GPIO2_19),
  593. LIGHT_PINCTRL_PIN(FM_GPIO2_20),
  594. LIGHT_PINCTRL_PIN(FM_GPIO2_21),
  595. LIGHT_PINCTRL_PIN(FM_GPIO2_22),
  596. LIGHT_PINCTRL_PIN(FM_GPIO2_23),
  597. LIGHT_PINCTRL_PIN(FM_GPIO2_24),
  598. LIGHT_PINCTRL_PIN(FM_GPIO2_25),
  599. LIGHT_PINCTRL_PIN(FM_SDIO0_WPRTN),
  600. LIGHT_PINCTRL_PIN(FM_SDIO0_DETN),
  601. LIGHT_PINCTRL_PIN(FM_SDIO1_WPRTN),
  602. LIGHT_PINCTRL_PIN(FM_SDIO1_DETN),
  603. LIGHT_PINCTRL_PIN(FM_GPIO2_30),
  604. LIGHT_PINCTRL_PIN(FM_GPIO2_31),
  605. LIGHT_PINCTRL_PIN(FM_GPIO3_0),
  606. LIGHT_PINCTRL_PIN(FM_GPIO3_1),
  607. LIGHT_PINCTRL_PIN(FM_GPIO3_2),
  608. LIGHT_PINCTRL_PIN(FM_GPIO3_3),
  609. LIGHT_PINCTRL_PIN(FM_HDMI_SCL),
  610. LIGHT_PINCTRL_PIN(FM_HDMI_SDA),
  611. LIGHT_PINCTRL_PIN(FM_HDMI_CEC),
  612. LIGHT_PINCTRL_PIN(FM_GMAC0_TX_CLK),
  613. LIGHT_PINCTRL_PIN(FM_GMAC0_RX_CLK),
  614. LIGHT_PINCTRL_PIN(FM_GMAC0_TXEN),
  615. LIGHT_PINCTRL_PIN(FM_GMAC0_TXD0),
  616. LIGHT_PINCTRL_PIN(FM_GMAC0_TXD1),
  617. LIGHT_PINCTRL_PIN(FM_GMAC0_TXD2),
  618. LIGHT_PINCTRL_PIN(FM_GMAC0_TXD3),
  619. LIGHT_PINCTRL_PIN(FM_GMAC0_RXDV),
  620. LIGHT_PINCTRL_PIN(FM_GMAC0_RXD0),
  621. LIGHT_PINCTRL_PIN(FM_GMAC0_RXD1),
  622. LIGHT_PINCTRL_PIN(FM_GMAC0_RXD2),
  623. LIGHT_PINCTRL_PIN(FM_GMAC0_RXD3),
  624. LIGHT_PINCTRL_PIN(FM_GMAC0_MDC),
  625. LIGHT_PINCTRL_PIN(FM_GMAC0_MDIO),
  626. LIGHT_PINCTRL_PIN(FM_GMAC0_COL),
  627. LIGHT_PINCTRL_PIN(FM_GMAC0_CRS),
  628. };
  629. static const struct pinctrl_pin_desc light_fm_left_pinctrl_pads[] = {
  630. LIGHT_PINCTRL_PIN(FM_QSPI1_SCLK),
  631. LIGHT_PINCTRL_PIN(FM_QSPI1_CSN0),
  632. LIGHT_PINCTRL_PIN(FM_QSPI1_D0_MOSI),
  633. LIGHT_PINCTRL_PIN(FM_QSPI1_D1_MISO),
  634. LIGHT_PINCTRL_PIN(FM_QSPI1_D2_WP ),
  635. LIGHT_PINCTRL_PIN(FM_QSPI1_D3_HOLD),
  636. LIGHT_PINCTRL_PIN(FM_I2C0_SCL),
  637. LIGHT_PINCTRL_PIN(FM_I2C0_SDA),
  638. LIGHT_PINCTRL_PIN(FM_I2C1_SCL),
  639. LIGHT_PINCTRL_PIN(FM_I2C1_SDA),
  640. LIGHT_PINCTRL_PIN(FM_UART1_TXD),
  641. LIGHT_PINCTRL_PIN(FM_UART1_RXD),
  642. LIGHT_PINCTRL_PIN(FM_UART4_TXD),
  643. LIGHT_PINCTRL_PIN(FM_UART4_RXD),
  644. LIGHT_PINCTRL_PIN(FM_UART4_CTSN),
  645. LIGHT_PINCTRL_PIN(FM_UART4_RTSN),
  646. LIGHT_PINCTRL_PIN(FM_UART3_TXD),
  647. LIGHT_PINCTRL_PIN(FM_UART3_RXD),
  648. LIGHT_PINCTRL_PIN(FM_GPIO0_18),
  649. LIGHT_PINCTRL_PIN(FM_GPIO0_19),
  650. LIGHT_PINCTRL_PIN(FM_GPIO0_20),
  651. LIGHT_PINCTRL_PIN(FM_GPIO0_21),
  652. LIGHT_PINCTRL_PIN(FM_GPIO0_22),
  653. LIGHT_PINCTRL_PIN(FM_GPIO0_23),
  654. LIGHT_PINCTRL_PIN(FM_GPIO0_24),
  655. LIGHT_PINCTRL_PIN(FM_GPIO0_25),
  656. LIGHT_PINCTRL_PIN(FM_GPIO0_26),
  657. LIGHT_PINCTRL_PIN(FM_GPIO0_27),
  658. LIGHT_PINCTRL_PIN(FM_GPIO0_28),
  659. LIGHT_PINCTRL_PIN(FM_GPIO0_29),
  660. LIGHT_PINCTRL_PIN(FM_GPIO0_30),
  661. LIGHT_PINCTRL_PIN(FM_GPIO0_31),
  662. LIGHT_PINCTRL_PIN(FM_GPIO1_0),
  663. LIGHT_PINCTRL_PIN(FM_GPIO1_1),
  664. LIGHT_PINCTRL_PIN(FM_GPIO1_2),
  665. LIGHT_PINCTRL_PIN(FM_GPIO1_3),
  666. LIGHT_PINCTRL_PIN(FM_GPIO1_4),
  667. LIGHT_PINCTRL_PIN(FM_GPIO1_5),
  668. LIGHT_PINCTRL_PIN(FM_GPIO1_6),
  669. LIGHT_PINCTRL_PIN(FM_GPIO1_7),
  670. LIGHT_PINCTRL_PIN(FM_GPIO1_8),
  671. LIGHT_PINCTRL_PIN(FM_GPIO1_9),
  672. LIGHT_PINCTRL_PIN(FM_GPIO1_10),
  673. LIGHT_PINCTRL_PIN(FM_GPIO1_11),
  674. LIGHT_PINCTRL_PIN(FM_GPIO1_12),
  675. LIGHT_PINCTRL_PIN(FM_GPIO1_13),
  676. LIGHT_PINCTRL_PIN(FM_GPIO1_14),
  677. LIGHT_PINCTRL_PIN(FM_GPIO1_15),
  678. LIGHT_PINCTRL_PIN(FM_GPIO1_16),
  679. LIGHT_PINCTRL_PIN(FM_CLK_OUT_0),
  680. LIGHT_PINCTRL_PIN(FM_CLK_OUT_1),
  681. LIGHT_PINCTRL_PIN(FM_CLK_OUT_2),
  682. LIGHT_PINCTRL_PIN(FM_CLK_OUT_3),
  683. LIGHT_PINCTRL_PIN(FM_GPIO1_21),
  684. LIGHT_PINCTRL_PIN(FM_GPIO1_22),
  685. LIGHT_PINCTRL_PIN(FM_GPIO1_23),
  686. LIGHT_PINCTRL_PIN(FM_GPIO1_24),
  687. LIGHT_PINCTRL_PIN(FM_GPIO1_25),
  688. LIGHT_PINCTRL_PIN(FM_GPIO1_26),
  689. LIGHT_PINCTRL_PIN(FM_GPIO1_27),
  690. LIGHT_PINCTRL_PIN(FM_GPIO1_28),
  691. LIGHT_PINCTRL_PIN(FM_GPIO1_29),
  692. LIGHT_PINCTRL_PIN(FM_GPIO1_30),
  693. };
  694. static const struct pinctrl_pin_desc light_fm_aon_pinctrl_pads[] = {
  695. LIGHT_PINCTRL_PIN(FM_OSC_CLK_IN),
  696. LIGHT_PINCTRL_PIN(FM_RTC_CLK_IN),
  697. LIGHT_PINCTRL_PIN(FM_DEBUG_MODE),
  698. LIGHT_PINCTRL_PIN(FM_I2C_AON_SCL),
  699. LIGHT_PINCTRL_PIN(FM_I2C_AON_SDA),
  700. LIGHT_PINCTRL_PIN(FM_CPU_JTG_TCLK),
  701. LIGHT_PINCTRL_PIN(FM_CPU_JTG_TMS),
  702. LIGHT_PINCTRL_PIN(FM_CPU_JTG_TDI),
  703. LIGHT_PINCTRL_PIN(FM_CPU_JTG_TDO),
  704. LIGHT_PINCTRL_PIN(FM_CPU_JTG_TRST),
  705. LIGHT_PINCTRL_PIN(FM_AOGPIO_7),
  706. LIGHT_PINCTRL_PIN(FM_AOGPIO_8),
  707. LIGHT_PINCTRL_PIN(FM_AOGPIO_9),
  708. LIGHT_PINCTRL_PIN(FM_AOGPIO_10),
  709. LIGHT_PINCTRL_PIN(FM_AOGPIO_11),
  710. LIGHT_PINCTRL_PIN(FM_AOGPIO_12),
  711. LIGHT_PINCTRL_PIN(FM_AOGPIO_13),
  712. LIGHT_PINCTRL_PIN(FM_AOGPIO_14),
  713. LIGHT_PINCTRL_PIN(FM_AOGPIO_15),
  714. LIGHT_PINCTRL_PIN(FM_AUDIO_PA0),
  715. LIGHT_PINCTRL_PIN(FM_AUDIO_PA1),
  716. LIGHT_PINCTRL_PIN(FM_AUDIO_PA2),
  717. LIGHT_PINCTRL_PIN(FM_AUDIO_PA3),
  718. LIGHT_PINCTRL_PIN(FM_AUDIO_PA4),
  719. LIGHT_PINCTRL_PIN(FM_AUDIO_PA5),
  720. LIGHT_PINCTRL_PIN(FM_AUDIO_PA6),
  721. LIGHT_PINCTRL_PIN(FM_AUDIO_PA7),
  722. LIGHT_PINCTRL_PIN(FM_AUDIO_PA8),
  723. LIGHT_PINCTRL_PIN(FM_AUDIO_PA9),
  724. LIGHT_PINCTRL_PIN(FM_AUDIO_PA10),
  725. LIGHT_PINCTRL_PIN(FM_AUDIO_PA11),
  726. LIGHT_PINCTRL_PIN(FM_AUDIO_PA12),
  727. LIGHT_PINCTRL_PIN(FM_AUDIO_PA13),
  728. LIGHT_PINCTRL_PIN(FM_AUDIO_PA14),
  729. LIGHT_PINCTRL_PIN(FM_AUDIO_PA15),
  730. LIGHT_PINCTRL_PIN(FM_AUDIO_PA16),
  731. LIGHT_PINCTRL_PIN(FM_AUDIO_PA17),
  732. LIGHT_PINCTRL_PIN(FM_AUDIO_PA27),
  733. LIGHT_PINCTRL_PIN(FM_AUDIO_PA28),
  734. LIGHT_PINCTRL_PIN(FM_AUDIO_PA29),
  735. LIGHT_PINCTRL_PIN(FM_AUDIO_PA30),
  736. };
  737. static int light_pinctrl_mpw_convert_pin_off(const unsigned int pin_id)
  738. {
  739. unsigned int cov_pin_id = pin_id;
  740. if (cov_pin_id >= RGM_PAD_MS_RTE)
  741. cov_pin_id -= 9;
  742. return cov_pin_id;
  743. }
  744. static int light_pinctrl_fm_aon_covert_pin_off(const unsigned int pin_id)
  745. {
  746. int cov_pin_id = pin_id;
  747. /* no need to configure mux according to spec */
  748. if ((pin_id >= 0 && pin_id <=6) || pin_id == 8)
  749. cov_pin_id = -1;
  750. return cov_pin_id;
  751. }
  752. static struct light_pinctrl_soc_info light_mpw_pinctrl_info = {
  753. .pins = light_mpw_pinctrl_pads,
  754. .npins = ARRAY_SIZE(light_mpw_pinctrl_pads),
  755. .cfg_off = 0x4c,
  756. .mux_off = 0x404,
  757. .covert_pin_off = light_pinctrl_mpw_convert_pin_off,
  758. };
  759. static struct light_pinctrl_soc_info light_fm_right_pinctrl_info = {
  760. .pins = light_fm_right_pinctrl_pads,
  761. .npins = ARRAY_SIZE(light_fm_right_pinctrl_pads),
  762. .cfg_off = 0x0,
  763. .mux_off = 0x400,
  764. };
  765. static struct light_pinctrl_soc_info light_fm_left_pinctrl_info = {
  766. .pins = light_fm_left_pinctrl_pads,
  767. .npins = ARRAY_SIZE(light_fm_left_pinctrl_pads),
  768. .cfg_off = 0x0,
  769. .mux_off = 0x400,
  770. };
  771. static struct light_pinctrl_soc_info light_fm_aon_pinctrl_info = {
  772. .pins = light_fm_aon_pinctrl_pads,
  773. .npins = ARRAY_SIZE(light_fm_aon_pinctrl_pads),
  774. .cfg_off = 0x0,
  775. .mux_off = 0x400,
  776. .covert_pin_off = light_pinctrl_fm_aon_covert_pin_off,
  777. };
  778. static const struct of_device_id light_pinctrl_of_match[] = {
  779. { .compatible = "thead,light-mpw-pinctrl", .data = &light_mpw_pinctrl_info},
  780. { .compatible = "thead,light-fm-right-pinctrl", .data = &light_fm_right_pinctrl_info},
  781. { .compatible = "thead,light-fm-left-pinctrl", .data = &light_fm_left_pinctrl_info},
  782. { .compatible = "thead,light-fm-aon-pinctrl", .data = &light_fm_aon_pinctrl_info},
  783. { /* sentinel */ }
  784. };
  785. MODULE_DEVICE_TABLE(of, light_pinctrl_of_match);
  786. static struct platform_driver light_pinctrl_driver = {
  787. .driver = {
  788. .name = "light-pinctrl",
  789. .owner = THIS_MODULE,
  790. .of_match_table = light_pinctrl_of_match,
  791. .suppress_bind_attrs = true,
  792. },
  793. .probe = light_pinctrl_probe,
  794. };
  795. module_platform_driver(light_pinctrl_driver);
  796. MODULE_AUTHOR("fugang.duan <duanfugang.dfg@linux.alibaba.com>");
  797. MODULE_DESCRIPTION("Thead light pinctrl driver");
  798. MODULE_LICENSE("GPL v2");