pinctrl-spear.c 9.7 KB

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  1. /*
  2. * Driver for the ST Microelectronics SPEAr pinmux
  3. *
  4. * Copyright (C) 2012 ST Microelectronics
  5. * Viresh Kumar <vireshk@kernel.org>
  6. *
  7. * Inspired from:
  8. * - U300 Pinctl drivers
  9. * - Tegra Pinctl drivers
  10. *
  11. * This file is licensed under the terms of the GNU General Public
  12. * License version 2. This program is licensed "as is" without any
  13. * warranty of any kind, whether express or implied.
  14. */
  15. #include <linux/err.h>
  16. #include <linux/module.h>
  17. #include <linux/of.h>
  18. #include <linux/of_address.h>
  19. #include <linux/of_gpio.h>
  20. #include <linux/pinctrl/machine.h>
  21. #include <linux/pinctrl/pinctrl.h>
  22. #include <linux/pinctrl/pinmux.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/slab.h>
  25. #include "pinctrl-spear.h"
  26. #define DRIVER_NAME "spear-pinmux"
  27. static void muxregs_endisable(struct spear_pmx *pmx,
  28. struct spear_muxreg *muxregs, u8 count, bool enable)
  29. {
  30. struct spear_muxreg *muxreg;
  31. u32 val, temp, j;
  32. for (j = 0; j < count; j++) {
  33. muxreg = &muxregs[j];
  34. val = pmx_readl(pmx, muxreg->reg);
  35. val &= ~muxreg->mask;
  36. if (enable)
  37. temp = muxreg->val;
  38. else
  39. temp = ~muxreg->val;
  40. val |= muxreg->mask & temp;
  41. pmx_writel(pmx, val, muxreg->reg);
  42. }
  43. }
  44. static int set_mode(struct spear_pmx *pmx, int mode)
  45. {
  46. struct spear_pmx_mode *pmx_mode = NULL;
  47. int i;
  48. u32 val;
  49. if (!pmx->machdata->pmx_modes || !pmx->machdata->npmx_modes)
  50. return -EINVAL;
  51. for (i = 0; i < pmx->machdata->npmx_modes; i++) {
  52. if (pmx->machdata->pmx_modes[i]->mode == (1 << mode)) {
  53. pmx_mode = pmx->machdata->pmx_modes[i];
  54. break;
  55. }
  56. }
  57. if (!pmx_mode)
  58. return -EINVAL;
  59. val = pmx_readl(pmx, pmx_mode->reg);
  60. val &= ~pmx_mode->mask;
  61. val |= pmx_mode->val;
  62. pmx_writel(pmx, val, pmx_mode->reg);
  63. pmx->machdata->mode = pmx_mode->mode;
  64. dev_info(pmx->dev, "Configured Mode: %s with id: %x\n\n",
  65. pmx_mode->name ? pmx_mode->name : "no_name",
  66. pmx_mode->reg);
  67. return 0;
  68. }
  69. void pmx_init_gpio_pingroup_addr(struct spear_gpio_pingroup *gpio_pingroup,
  70. unsigned count, u16 reg)
  71. {
  72. int i, j;
  73. for (i = 0; i < count; i++)
  74. for (j = 0; j < gpio_pingroup[i].nmuxregs; j++)
  75. gpio_pingroup[i].muxregs[j].reg = reg;
  76. }
  77. void pmx_init_addr(struct spear_pinctrl_machdata *machdata, u16 reg)
  78. {
  79. struct spear_pingroup *pgroup;
  80. struct spear_modemux *modemux;
  81. int i, j, group;
  82. for (group = 0; group < machdata->ngroups; group++) {
  83. pgroup = machdata->groups[group];
  84. for (i = 0; i < pgroup->nmodemuxs; i++) {
  85. modemux = &pgroup->modemuxs[i];
  86. for (j = 0; j < modemux->nmuxregs; j++)
  87. if (modemux->muxregs[j].reg == 0xFFFF)
  88. modemux->muxregs[j].reg = reg;
  89. }
  90. }
  91. }
  92. static int spear_pinctrl_get_groups_cnt(struct pinctrl_dev *pctldev)
  93. {
  94. struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
  95. return pmx->machdata->ngroups;
  96. }
  97. static const char *spear_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
  98. unsigned group)
  99. {
  100. struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
  101. return pmx->machdata->groups[group]->name;
  102. }
  103. static int spear_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
  104. unsigned group, const unsigned **pins, unsigned *num_pins)
  105. {
  106. struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
  107. *pins = pmx->machdata->groups[group]->pins;
  108. *num_pins = pmx->machdata->groups[group]->npins;
  109. return 0;
  110. }
  111. static void spear_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
  112. struct seq_file *s, unsigned offset)
  113. {
  114. seq_printf(s, " " DRIVER_NAME);
  115. }
  116. static int spear_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
  117. struct device_node *np_config,
  118. struct pinctrl_map **map,
  119. unsigned *num_maps)
  120. {
  121. struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
  122. struct device_node *np;
  123. struct property *prop;
  124. const char *function, *group;
  125. int ret, index = 0, count = 0;
  126. /* calculate number of maps required */
  127. for_each_child_of_node(np_config, np) {
  128. ret = of_property_read_string(np, "st,function", &function);
  129. if (ret < 0) {
  130. of_node_put(np);
  131. return ret;
  132. }
  133. ret = of_property_count_strings(np, "st,pins");
  134. if (ret < 0) {
  135. of_node_put(np);
  136. return ret;
  137. }
  138. count += ret;
  139. }
  140. if (!count) {
  141. dev_err(pmx->dev, "No child nodes passed via DT\n");
  142. return -ENODEV;
  143. }
  144. *map = kcalloc(count, sizeof(**map), GFP_KERNEL);
  145. if (!*map)
  146. return -ENOMEM;
  147. for_each_child_of_node(np_config, np) {
  148. of_property_read_string(np, "st,function", &function);
  149. of_property_for_each_string(np, "st,pins", prop, group) {
  150. (*map)[index].type = PIN_MAP_TYPE_MUX_GROUP;
  151. (*map)[index].data.mux.group = group;
  152. (*map)[index].data.mux.function = function;
  153. index++;
  154. }
  155. }
  156. *num_maps = count;
  157. return 0;
  158. }
  159. static void spear_pinctrl_dt_free_map(struct pinctrl_dev *pctldev,
  160. struct pinctrl_map *map,
  161. unsigned num_maps)
  162. {
  163. kfree(map);
  164. }
  165. static const struct pinctrl_ops spear_pinctrl_ops = {
  166. .get_groups_count = spear_pinctrl_get_groups_cnt,
  167. .get_group_name = spear_pinctrl_get_group_name,
  168. .get_group_pins = spear_pinctrl_get_group_pins,
  169. .pin_dbg_show = spear_pinctrl_pin_dbg_show,
  170. .dt_node_to_map = spear_pinctrl_dt_node_to_map,
  171. .dt_free_map = spear_pinctrl_dt_free_map,
  172. };
  173. static int spear_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
  174. {
  175. struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
  176. return pmx->machdata->nfunctions;
  177. }
  178. static const char *spear_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
  179. unsigned function)
  180. {
  181. struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
  182. return pmx->machdata->functions[function]->name;
  183. }
  184. static int spear_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
  185. unsigned function, const char *const **groups,
  186. unsigned * const ngroups)
  187. {
  188. struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
  189. *groups = pmx->machdata->functions[function]->groups;
  190. *ngroups = pmx->machdata->functions[function]->ngroups;
  191. return 0;
  192. }
  193. static int spear_pinctrl_endisable(struct pinctrl_dev *pctldev,
  194. unsigned function, unsigned group, bool enable)
  195. {
  196. struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
  197. const struct spear_pingroup *pgroup;
  198. const struct spear_modemux *modemux;
  199. int i;
  200. bool found = false;
  201. pgroup = pmx->machdata->groups[group];
  202. for (i = 0; i < pgroup->nmodemuxs; i++) {
  203. modemux = &pgroup->modemuxs[i];
  204. /* SoC have any modes */
  205. if (pmx->machdata->modes_supported) {
  206. if (!(pmx->machdata->mode & modemux->modes))
  207. continue;
  208. }
  209. found = true;
  210. muxregs_endisable(pmx, modemux->muxregs, modemux->nmuxregs,
  211. enable);
  212. }
  213. if (!found) {
  214. dev_err(pmx->dev, "pinmux group: %s not supported\n",
  215. pgroup->name);
  216. return -ENODEV;
  217. }
  218. return 0;
  219. }
  220. static int spear_pinctrl_set_mux(struct pinctrl_dev *pctldev, unsigned function,
  221. unsigned group)
  222. {
  223. return spear_pinctrl_endisable(pctldev, function, group, true);
  224. }
  225. /* gpio with pinmux */
  226. static struct spear_gpio_pingroup *get_gpio_pingroup(struct spear_pmx *pmx,
  227. unsigned pin)
  228. {
  229. struct spear_gpio_pingroup *gpio_pingroup;
  230. int i, j;
  231. if (!pmx->machdata->gpio_pingroups)
  232. return NULL;
  233. for (i = 0; i < pmx->machdata->ngpio_pingroups; i++) {
  234. gpio_pingroup = &pmx->machdata->gpio_pingroups[i];
  235. for (j = 0; j < gpio_pingroup->npins; j++) {
  236. if (gpio_pingroup->pins[j] == pin)
  237. return gpio_pingroup;
  238. }
  239. }
  240. return NULL;
  241. }
  242. static int gpio_request_endisable(struct pinctrl_dev *pctldev,
  243. struct pinctrl_gpio_range *range, unsigned offset, bool enable)
  244. {
  245. struct spear_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
  246. struct spear_pinctrl_machdata *machdata = pmx->machdata;
  247. struct spear_gpio_pingroup *gpio_pingroup;
  248. /*
  249. * Some SoC have configuration options applicable to group of pins,
  250. * rather than a single pin.
  251. */
  252. gpio_pingroup = get_gpio_pingroup(pmx, offset);
  253. if (gpio_pingroup)
  254. muxregs_endisable(pmx, gpio_pingroup->muxregs,
  255. gpio_pingroup->nmuxregs, enable);
  256. /*
  257. * SoC may need some extra configurations, or configurations for single
  258. * pin
  259. */
  260. if (machdata->gpio_request_endisable)
  261. machdata->gpio_request_endisable(pmx, offset, enable);
  262. return 0;
  263. }
  264. static int gpio_request_enable(struct pinctrl_dev *pctldev,
  265. struct pinctrl_gpio_range *range, unsigned offset)
  266. {
  267. return gpio_request_endisable(pctldev, range, offset, true);
  268. }
  269. static void gpio_disable_free(struct pinctrl_dev *pctldev,
  270. struct pinctrl_gpio_range *range, unsigned offset)
  271. {
  272. gpio_request_endisable(pctldev, range, offset, false);
  273. }
  274. static const struct pinmux_ops spear_pinmux_ops = {
  275. .get_functions_count = spear_pinctrl_get_funcs_count,
  276. .get_function_name = spear_pinctrl_get_func_name,
  277. .get_function_groups = spear_pinctrl_get_func_groups,
  278. .set_mux = spear_pinctrl_set_mux,
  279. .gpio_request_enable = gpio_request_enable,
  280. .gpio_disable_free = gpio_disable_free,
  281. };
  282. static struct pinctrl_desc spear_pinctrl_desc = {
  283. .name = DRIVER_NAME,
  284. .pctlops = &spear_pinctrl_ops,
  285. .pmxops = &spear_pinmux_ops,
  286. .owner = THIS_MODULE,
  287. };
  288. int spear_pinctrl_probe(struct platform_device *pdev,
  289. struct spear_pinctrl_machdata *machdata)
  290. {
  291. struct device_node *np = pdev->dev.of_node;
  292. struct spear_pmx *pmx;
  293. if (!machdata)
  294. return -ENODEV;
  295. pmx = devm_kzalloc(&pdev->dev, sizeof(*pmx), GFP_KERNEL);
  296. if (!pmx)
  297. return -ENOMEM;
  298. pmx->vbase = devm_platform_ioremap_resource(pdev, 0);
  299. if (IS_ERR(pmx->vbase))
  300. return PTR_ERR(pmx->vbase);
  301. pmx->dev = &pdev->dev;
  302. pmx->machdata = machdata;
  303. /* configure mode, if supported by SoC */
  304. if (machdata->modes_supported) {
  305. int mode = 0;
  306. if (of_property_read_u32(np, "st,pinmux-mode", &mode)) {
  307. dev_err(&pdev->dev, "OF: pinmux mode not passed\n");
  308. return -EINVAL;
  309. }
  310. if (set_mode(pmx, mode)) {
  311. dev_err(&pdev->dev, "OF: Couldn't configure mode: %x\n",
  312. mode);
  313. return -EINVAL;
  314. }
  315. }
  316. platform_set_drvdata(pdev, pmx);
  317. spear_pinctrl_desc.pins = machdata->pins;
  318. spear_pinctrl_desc.npins = machdata->npins;
  319. pmx->pctl = devm_pinctrl_register(&pdev->dev, &spear_pinctrl_desc, pmx);
  320. if (IS_ERR(pmx->pctl)) {
  321. dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
  322. return PTR_ERR(pmx->pctl);
  323. }
  324. return 0;
  325. }