pinctrl-rk805.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Pinctrl driver for Rockchip RK805 PMIC
  4. *
  5. * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
  6. *
  7. * Author: Joseph Chen <chenjh@rock-chips.com>
  8. *
  9. * Based on the pinctrl-as3722 driver
  10. */
  11. #include <linux/gpio/driver.h>
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/mfd/rk808.h>
  15. #include <linux/of.h>
  16. #include <linux/of_device.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/pinctrl/consumer.h>
  19. #include <linux/pinctrl/machine.h>
  20. #include <linux/pinctrl/pinctrl.h>
  21. #include <linux/pinctrl/pinconf-generic.h>
  22. #include <linux/pinctrl/pinconf.h>
  23. #include <linux/pinctrl/pinmux.h>
  24. #include <linux/pm.h>
  25. #include <linux/slab.h>
  26. #include "core.h"
  27. #include "pinconf.h"
  28. #include "pinctrl-utils.h"
  29. struct rk805_pin_function {
  30. const char *name;
  31. const char *const *groups;
  32. unsigned int ngroups;
  33. int mux_option;
  34. };
  35. struct rk805_pin_group {
  36. const char *name;
  37. const unsigned int pins[1];
  38. unsigned int npins;
  39. };
  40. /*
  41. * @reg: gpio setting register;
  42. * @fun_mask: functions select mask value, when set is gpio;
  43. * @dir_mask: input or output mask value, when set is output, otherwise input;
  44. * @val_mask: gpio set value, when set is level high, otherwise low;
  45. *
  46. * Different PMIC has different pin features, belowing 3 mask members are not
  47. * all necessary for every PMIC. For example, RK805 has 2 pins that can be used
  48. * as output only GPIOs, so func_mask and dir_mask are not needed. RK816 has 1
  49. * pin that can be used as TS/GPIO, so fun_mask, dir_mask and val_mask are all
  50. * necessary.
  51. */
  52. struct rk805_pin_config {
  53. u8 reg;
  54. u8 fun_msk;
  55. u8 dir_msk;
  56. u8 val_msk;
  57. };
  58. struct rk805_pctrl_info {
  59. struct rk808 *rk808;
  60. struct device *dev;
  61. struct pinctrl_dev *pctl;
  62. struct gpio_chip gpio_chip;
  63. struct pinctrl_desc pinctrl_desc;
  64. const struct rk805_pin_function *functions;
  65. unsigned int num_functions;
  66. const struct rk805_pin_group *groups;
  67. int num_pin_groups;
  68. const struct pinctrl_pin_desc *pins;
  69. unsigned int num_pins;
  70. const struct rk805_pin_config *pin_cfg;
  71. };
  72. enum rk805_pinmux_option {
  73. RK805_PINMUX_GPIO,
  74. };
  75. enum {
  76. RK805_GPIO0,
  77. RK805_GPIO1,
  78. };
  79. static const char *const rk805_gpio_groups[] = {
  80. "gpio0",
  81. "gpio1",
  82. };
  83. /* RK805: 2 output only GPIOs */
  84. static const struct pinctrl_pin_desc rk805_pins_desc[] = {
  85. PINCTRL_PIN(RK805_GPIO0, "gpio0"),
  86. PINCTRL_PIN(RK805_GPIO1, "gpio1"),
  87. };
  88. static const struct rk805_pin_function rk805_pin_functions[] = {
  89. {
  90. .name = "gpio",
  91. .groups = rk805_gpio_groups,
  92. .ngroups = ARRAY_SIZE(rk805_gpio_groups),
  93. .mux_option = RK805_PINMUX_GPIO,
  94. },
  95. };
  96. static const struct rk805_pin_group rk805_pin_groups[] = {
  97. {
  98. .name = "gpio0",
  99. .pins = { RK805_GPIO0 },
  100. .npins = 1,
  101. },
  102. {
  103. .name = "gpio1",
  104. .pins = { RK805_GPIO1 },
  105. .npins = 1,
  106. },
  107. };
  108. #define RK805_GPIO0_VAL_MSK BIT(0)
  109. #define RK805_GPIO1_VAL_MSK BIT(1)
  110. static const struct rk805_pin_config rk805_gpio_cfgs[] = {
  111. {
  112. .reg = RK805_OUT_REG,
  113. .val_msk = RK805_GPIO0_VAL_MSK,
  114. },
  115. {
  116. .reg = RK805_OUT_REG,
  117. .val_msk = RK805_GPIO1_VAL_MSK,
  118. },
  119. };
  120. /* generic gpio chip */
  121. static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset)
  122. {
  123. struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
  124. int ret, val;
  125. ret = regmap_read(pci->rk808->regmap, pci->pin_cfg[offset].reg, &val);
  126. if (ret) {
  127. dev_err(pci->dev, "get gpio%d value failed\n", offset);
  128. return ret;
  129. }
  130. return !!(val & pci->pin_cfg[offset].val_msk);
  131. }
  132. static void rk805_gpio_set(struct gpio_chip *chip,
  133. unsigned int offset,
  134. int value)
  135. {
  136. struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
  137. int ret;
  138. ret = regmap_update_bits(pci->rk808->regmap,
  139. pci->pin_cfg[offset].reg,
  140. pci->pin_cfg[offset].val_msk,
  141. value ? pci->pin_cfg[offset].val_msk : 0);
  142. if (ret)
  143. dev_err(pci->dev, "set gpio%d value %d failed\n",
  144. offset, value);
  145. }
  146. static int rk805_gpio_direction_input(struct gpio_chip *chip,
  147. unsigned int offset)
  148. {
  149. return pinctrl_gpio_direction_input(chip->base + offset);
  150. }
  151. static int rk805_gpio_direction_output(struct gpio_chip *chip,
  152. unsigned int offset, int value)
  153. {
  154. rk805_gpio_set(chip, offset, value);
  155. return pinctrl_gpio_direction_output(chip->base + offset);
  156. }
  157. static int rk805_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
  158. {
  159. struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
  160. unsigned int val;
  161. int ret;
  162. /* default output*/
  163. if (!pci->pin_cfg[offset].dir_msk)
  164. return GPIO_LINE_DIRECTION_OUT;
  165. ret = regmap_read(pci->rk808->regmap,
  166. pci->pin_cfg[offset].reg,
  167. &val);
  168. if (ret) {
  169. dev_err(pci->dev, "get gpio%d direction failed\n", offset);
  170. return ret;
  171. }
  172. if (val & pci->pin_cfg[offset].dir_msk)
  173. return GPIO_LINE_DIRECTION_OUT;
  174. return GPIO_LINE_DIRECTION_IN;
  175. }
  176. static const struct gpio_chip rk805_gpio_chip = {
  177. .label = "rk805-gpio",
  178. .request = gpiochip_generic_request,
  179. .free = gpiochip_generic_free,
  180. .get_direction = rk805_gpio_get_direction,
  181. .get = rk805_gpio_get,
  182. .set = rk805_gpio_set,
  183. .direction_input = rk805_gpio_direction_input,
  184. .direction_output = rk805_gpio_direction_output,
  185. .can_sleep = true,
  186. .base = -1,
  187. .owner = THIS_MODULE,
  188. };
  189. /* generic pinctrl */
  190. static int rk805_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
  191. {
  192. struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
  193. return pci->num_pin_groups;
  194. }
  195. static const char *rk805_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
  196. unsigned int group)
  197. {
  198. struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
  199. return pci->groups[group].name;
  200. }
  201. static int rk805_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
  202. unsigned int group,
  203. const unsigned int **pins,
  204. unsigned int *num_pins)
  205. {
  206. struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
  207. *pins = pci->groups[group].pins;
  208. *num_pins = pci->groups[group].npins;
  209. return 0;
  210. }
  211. static const struct pinctrl_ops rk805_pinctrl_ops = {
  212. .get_groups_count = rk805_pinctrl_get_groups_count,
  213. .get_group_name = rk805_pinctrl_get_group_name,
  214. .get_group_pins = rk805_pinctrl_get_group_pins,
  215. .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
  216. .dt_free_map = pinctrl_utils_free_map,
  217. };
  218. static int rk805_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
  219. {
  220. struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
  221. return pci->num_functions;
  222. }
  223. static const char *rk805_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
  224. unsigned int function)
  225. {
  226. struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
  227. return pci->functions[function].name;
  228. }
  229. static int rk805_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
  230. unsigned int function,
  231. const char *const **groups,
  232. unsigned int *const num_groups)
  233. {
  234. struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
  235. *groups = pci->functions[function].groups;
  236. *num_groups = pci->functions[function].ngroups;
  237. return 0;
  238. }
  239. static int _rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev,
  240. unsigned int offset,
  241. int mux)
  242. {
  243. struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
  244. int ret;
  245. if (!pci->pin_cfg[offset].fun_msk)
  246. return 0;
  247. if (mux == RK805_PINMUX_GPIO) {
  248. ret = regmap_update_bits(pci->rk808->regmap,
  249. pci->pin_cfg[offset].reg,
  250. pci->pin_cfg[offset].fun_msk,
  251. pci->pin_cfg[offset].fun_msk);
  252. if (ret) {
  253. dev_err(pci->dev, "set gpio%d GPIO failed\n", offset);
  254. return ret;
  255. }
  256. } else {
  257. dev_err(pci->dev, "Couldn't find function mux %d\n", mux);
  258. return -EINVAL;
  259. }
  260. return 0;
  261. }
  262. static int rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev,
  263. unsigned int function,
  264. unsigned int group)
  265. {
  266. struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
  267. int mux = pci->functions[function].mux_option;
  268. int offset = group;
  269. return _rk805_pinctrl_set_mux(pctldev, offset, mux);
  270. }
  271. static int rk805_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
  272. struct pinctrl_gpio_range *range,
  273. unsigned int offset, bool input)
  274. {
  275. struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
  276. int ret;
  277. /* switch to gpio function */
  278. ret = _rk805_pinctrl_set_mux(pctldev, offset, RK805_PINMUX_GPIO);
  279. if (ret) {
  280. dev_err(pci->dev, "set gpio%d mux failed\n", offset);
  281. return ret;
  282. }
  283. /* set direction */
  284. if (!pci->pin_cfg[offset].dir_msk)
  285. return 0;
  286. ret = regmap_update_bits(pci->rk808->regmap,
  287. pci->pin_cfg[offset].reg,
  288. pci->pin_cfg[offset].dir_msk,
  289. input ? 0 : pci->pin_cfg[offset].dir_msk);
  290. if (ret) {
  291. dev_err(pci->dev, "set gpio%d direction failed\n", offset);
  292. return ret;
  293. }
  294. return ret;
  295. }
  296. static const struct pinmux_ops rk805_pinmux_ops = {
  297. .get_functions_count = rk805_pinctrl_get_funcs_count,
  298. .get_function_name = rk805_pinctrl_get_func_name,
  299. .get_function_groups = rk805_pinctrl_get_func_groups,
  300. .set_mux = rk805_pinctrl_set_mux,
  301. .gpio_set_direction = rk805_pmx_gpio_set_direction,
  302. };
  303. static int rk805_pinconf_get(struct pinctrl_dev *pctldev,
  304. unsigned int pin, unsigned long *config)
  305. {
  306. struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
  307. enum pin_config_param param = pinconf_to_config_param(*config);
  308. u32 arg = 0;
  309. switch (param) {
  310. case PIN_CONFIG_OUTPUT:
  311. arg = rk805_gpio_get(&pci->gpio_chip, pin);
  312. break;
  313. default:
  314. dev_err(pci->dev, "Properties not supported\n");
  315. return -ENOTSUPP;
  316. }
  317. *config = pinconf_to_config_packed(param, (u16)arg);
  318. return 0;
  319. }
  320. static int rk805_pinconf_set(struct pinctrl_dev *pctldev,
  321. unsigned int pin, unsigned long *configs,
  322. unsigned int num_configs)
  323. {
  324. struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
  325. enum pin_config_param param;
  326. u32 i, arg = 0;
  327. for (i = 0; i < num_configs; i++) {
  328. param = pinconf_to_config_param(configs[i]);
  329. arg = pinconf_to_config_argument(configs[i]);
  330. switch (param) {
  331. case PIN_CONFIG_OUTPUT:
  332. rk805_gpio_set(&pci->gpio_chip, pin, arg);
  333. rk805_pmx_gpio_set_direction(pctldev, NULL, pin, false);
  334. break;
  335. default:
  336. dev_err(pci->dev, "Properties not supported\n");
  337. return -ENOTSUPP;
  338. }
  339. }
  340. return 0;
  341. }
  342. static const struct pinconf_ops rk805_pinconf_ops = {
  343. .pin_config_get = rk805_pinconf_get,
  344. .pin_config_set = rk805_pinconf_set,
  345. };
  346. static const struct pinctrl_desc rk805_pinctrl_desc = {
  347. .name = "rk805-pinctrl",
  348. .pctlops = &rk805_pinctrl_ops,
  349. .pmxops = &rk805_pinmux_ops,
  350. .confops = &rk805_pinconf_ops,
  351. .owner = THIS_MODULE,
  352. };
  353. static int rk805_pinctrl_probe(struct platform_device *pdev)
  354. {
  355. struct rk805_pctrl_info *pci;
  356. int ret;
  357. pci = devm_kzalloc(&pdev->dev, sizeof(*pci), GFP_KERNEL);
  358. if (!pci)
  359. return -ENOMEM;
  360. pci->dev = &pdev->dev;
  361. pci->dev->of_node = pdev->dev.parent->of_node;
  362. pci->rk808 = dev_get_drvdata(pdev->dev.parent);
  363. pci->pinctrl_desc = rk805_pinctrl_desc;
  364. pci->gpio_chip = rk805_gpio_chip;
  365. pci->gpio_chip.parent = &pdev->dev;
  366. pci->gpio_chip.of_node = pdev->dev.parent->of_node;
  367. platform_set_drvdata(pdev, pci);
  368. switch (pci->rk808->variant) {
  369. case RK805_ID:
  370. pci->pins = rk805_pins_desc;
  371. pci->num_pins = ARRAY_SIZE(rk805_pins_desc);
  372. pci->functions = rk805_pin_functions;
  373. pci->num_functions = ARRAY_SIZE(rk805_pin_functions);
  374. pci->groups = rk805_pin_groups;
  375. pci->num_pin_groups = ARRAY_SIZE(rk805_pin_groups);
  376. pci->pinctrl_desc.pins = rk805_pins_desc;
  377. pci->pinctrl_desc.npins = ARRAY_SIZE(rk805_pins_desc);
  378. pci->pin_cfg = rk805_gpio_cfgs;
  379. pci->gpio_chip.ngpio = ARRAY_SIZE(rk805_gpio_cfgs);
  380. break;
  381. default:
  382. dev_err(&pdev->dev, "unsupported RK805 ID %lu\n",
  383. pci->rk808->variant);
  384. return -EINVAL;
  385. }
  386. /* Add gpio chip */
  387. ret = devm_gpiochip_add_data(&pdev->dev, &pci->gpio_chip, pci);
  388. if (ret < 0) {
  389. dev_err(&pdev->dev, "Couldn't add gpiochip\n");
  390. return ret;
  391. }
  392. /* Add pinctrl */
  393. pci->pctl = devm_pinctrl_register(&pdev->dev, &pci->pinctrl_desc, pci);
  394. if (IS_ERR(pci->pctl)) {
  395. dev_err(&pdev->dev, "Couldn't add pinctrl\n");
  396. return PTR_ERR(pci->pctl);
  397. }
  398. /* Add pin range */
  399. ret = gpiochip_add_pin_range(&pci->gpio_chip, dev_name(&pdev->dev),
  400. 0, 0, pci->gpio_chip.ngpio);
  401. if (ret < 0) {
  402. dev_err(&pdev->dev, "Couldn't add gpiochip pin range\n");
  403. return ret;
  404. }
  405. return 0;
  406. }
  407. static struct platform_driver rk805_pinctrl_driver = {
  408. .probe = rk805_pinctrl_probe,
  409. .driver = {
  410. .name = "rk805-pinctrl",
  411. },
  412. };
  413. module_platform_driver(rk805_pinctrl_driver);
  414. MODULE_DESCRIPTION("RK805 pin control and GPIO driver");
  415. MODULE_AUTHOR("Joseph Chen <chenjh@rock-chips.com>");
  416. MODULE_LICENSE("GPL v2");