pinctrl-meson8b.c 30 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Pin controller and GPIO driver for Amlogic Meson8b.
  4. *
  5. * Copyright (C) 2015 Endless Mobile, Inc.
  6. * Author: Carlo Caione <carlo@endlessm.com>
  7. */
  8. #include <dt-bindings/gpio/meson8b-gpio.h>
  9. #include "pinctrl-meson.h"
  10. #include "pinctrl-meson8-pmx.h"
  11. static const struct pinctrl_pin_desc meson8b_cbus_pins[] = {
  12. MESON_PIN(GPIOX_0),
  13. MESON_PIN(GPIOX_1),
  14. MESON_PIN(GPIOX_2),
  15. MESON_PIN(GPIOX_3),
  16. MESON_PIN(GPIOX_4),
  17. MESON_PIN(GPIOX_5),
  18. MESON_PIN(GPIOX_6),
  19. MESON_PIN(GPIOX_7),
  20. MESON_PIN(GPIOX_8),
  21. MESON_PIN(GPIOX_9),
  22. MESON_PIN(GPIOX_10),
  23. MESON_PIN(GPIOX_11),
  24. MESON_PIN(GPIOX_16),
  25. MESON_PIN(GPIOX_17),
  26. MESON_PIN(GPIOX_18),
  27. MESON_PIN(GPIOX_19),
  28. MESON_PIN(GPIOX_20),
  29. MESON_PIN(GPIOX_21),
  30. MESON_PIN(GPIOY_0),
  31. MESON_PIN(GPIOY_1),
  32. MESON_PIN(GPIOY_3),
  33. MESON_PIN(GPIOY_6),
  34. MESON_PIN(GPIOY_7),
  35. MESON_PIN(GPIOY_8),
  36. MESON_PIN(GPIOY_9),
  37. MESON_PIN(GPIOY_10),
  38. MESON_PIN(GPIOY_11),
  39. MESON_PIN(GPIOY_12),
  40. MESON_PIN(GPIOY_13),
  41. MESON_PIN(GPIOY_14),
  42. MESON_PIN(GPIODV_9),
  43. MESON_PIN(GPIODV_24),
  44. MESON_PIN(GPIODV_25),
  45. MESON_PIN(GPIODV_26),
  46. MESON_PIN(GPIODV_27),
  47. MESON_PIN(GPIODV_28),
  48. MESON_PIN(GPIODV_29),
  49. MESON_PIN(GPIOH_0),
  50. MESON_PIN(GPIOH_1),
  51. MESON_PIN(GPIOH_2),
  52. MESON_PIN(GPIOH_3),
  53. MESON_PIN(GPIOH_4),
  54. MESON_PIN(GPIOH_5),
  55. MESON_PIN(GPIOH_6),
  56. MESON_PIN(GPIOH_7),
  57. MESON_PIN(GPIOH_8),
  58. MESON_PIN(GPIOH_9),
  59. MESON_PIN(CARD_0),
  60. MESON_PIN(CARD_1),
  61. MESON_PIN(CARD_2),
  62. MESON_PIN(CARD_3),
  63. MESON_PIN(CARD_4),
  64. MESON_PIN(CARD_5),
  65. MESON_PIN(CARD_6),
  66. MESON_PIN(BOOT_0),
  67. MESON_PIN(BOOT_1),
  68. MESON_PIN(BOOT_2),
  69. MESON_PIN(BOOT_3),
  70. MESON_PIN(BOOT_4),
  71. MESON_PIN(BOOT_5),
  72. MESON_PIN(BOOT_6),
  73. MESON_PIN(BOOT_7),
  74. MESON_PIN(BOOT_8),
  75. MESON_PIN(BOOT_9),
  76. MESON_PIN(BOOT_10),
  77. MESON_PIN(BOOT_11),
  78. MESON_PIN(BOOT_12),
  79. MESON_PIN(BOOT_13),
  80. MESON_PIN(BOOT_14),
  81. MESON_PIN(BOOT_15),
  82. MESON_PIN(BOOT_16),
  83. MESON_PIN(BOOT_17),
  84. MESON_PIN(BOOT_18),
  85. MESON_PIN(DIF_0_P),
  86. MESON_PIN(DIF_0_N),
  87. MESON_PIN(DIF_1_P),
  88. MESON_PIN(DIF_1_N),
  89. MESON_PIN(DIF_2_P),
  90. MESON_PIN(DIF_2_N),
  91. MESON_PIN(DIF_3_P),
  92. MESON_PIN(DIF_3_N),
  93. MESON_PIN(DIF_4_P),
  94. MESON_PIN(DIF_4_N),
  95. };
  96. static const struct pinctrl_pin_desc meson8b_aobus_pins[] = {
  97. MESON_PIN(GPIOAO_0),
  98. MESON_PIN(GPIOAO_1),
  99. MESON_PIN(GPIOAO_2),
  100. MESON_PIN(GPIOAO_3),
  101. MESON_PIN(GPIOAO_4),
  102. MESON_PIN(GPIOAO_5),
  103. MESON_PIN(GPIOAO_6),
  104. MESON_PIN(GPIOAO_7),
  105. MESON_PIN(GPIOAO_8),
  106. MESON_PIN(GPIOAO_9),
  107. MESON_PIN(GPIOAO_10),
  108. MESON_PIN(GPIOAO_11),
  109. MESON_PIN(GPIOAO_12),
  110. MESON_PIN(GPIOAO_13),
  111. /*
  112. * The following 2 pins are not mentionned in the public datasheet
  113. * According to this datasheet, they can't be used with the gpio
  114. * interrupt controller
  115. */
  116. MESON_PIN(GPIO_BSD_EN),
  117. MESON_PIN(GPIO_TEST_N),
  118. };
  119. /* bank X */
  120. static const unsigned int sd_d0_a_pins[] = { GPIOX_0 };
  121. static const unsigned int sd_d1_a_pins[] = { GPIOX_1 };
  122. static const unsigned int sd_d2_a_pins[] = { GPIOX_2 };
  123. static const unsigned int sd_d3_a_pins[] = { GPIOX_3 };
  124. static const unsigned int sdxc_d0_0_a_pins[] = { GPIOX_4 };
  125. static const unsigned int sdxc_d47_a_pins[] = { GPIOX_4, GPIOX_5,
  126. GPIOX_6, GPIOX_7 };
  127. static const unsigned int sdxc_d13_0_a_pins[] = { GPIOX_5, GPIOX_6,
  128. GPIOX_7 };
  129. static const unsigned int sd_clk_a_pins[] = { GPIOX_8 };
  130. static const unsigned int sd_cmd_a_pins[] = { GPIOX_9 };
  131. static const unsigned int xtal_32k_out_pins[] = { GPIOX_10 };
  132. static const unsigned int xtal_24m_out_pins[] = { GPIOX_11 };
  133. static const unsigned int uart_tx_b0_pins[] = { GPIOX_16 };
  134. static const unsigned int uart_rx_b0_pins[] = { GPIOX_17 };
  135. static const unsigned int uart_cts_b0_pins[] = { GPIOX_18 };
  136. static const unsigned int uart_rts_b0_pins[] = { GPIOX_19 };
  137. static const unsigned int sdxc_d0_1_a_pins[] = { GPIOX_0 };
  138. static const unsigned int sdxc_d13_1_a_pins[] = { GPIOX_1, GPIOX_2,
  139. GPIOX_3 };
  140. static const unsigned int pcm_out_a_pins[] = { GPIOX_4 };
  141. static const unsigned int pcm_in_a_pins[] = { GPIOX_5 };
  142. static const unsigned int pcm_fs_a_pins[] = { GPIOX_6 };
  143. static const unsigned int pcm_clk_a_pins[] = { GPIOX_7 };
  144. static const unsigned int sdxc_clk_a_pins[] = { GPIOX_8 };
  145. static const unsigned int sdxc_cmd_a_pins[] = { GPIOX_9 };
  146. static const unsigned int pwm_vs_0_pins[] = { GPIOX_10 };
  147. static const unsigned int pwm_e_pins[] = { GPIOX_10 };
  148. static const unsigned int pwm_vs_1_pins[] = { GPIOX_11 };
  149. static const unsigned int uart_tx_a_pins[] = { GPIOX_4 };
  150. static const unsigned int uart_rx_a_pins[] = { GPIOX_5 };
  151. static const unsigned int uart_cts_a_pins[] = { GPIOX_6 };
  152. static const unsigned int uart_rts_a_pins[] = { GPIOX_7 };
  153. static const unsigned int uart_tx_b1_pins[] = { GPIOX_8 };
  154. static const unsigned int uart_rx_b1_pins[] = { GPIOX_9 };
  155. static const unsigned int uart_cts_b1_pins[] = { GPIOX_10 };
  156. static const unsigned int uart_rts_b1_pins[] = { GPIOX_20 };
  157. static const unsigned int iso7816_0_clk_pins[] = { GPIOX_6 };
  158. static const unsigned int iso7816_0_data_pins[] = { GPIOX_7 };
  159. static const unsigned int spi_sclk_0_pins[] = { GPIOX_8 };
  160. static const unsigned int spi_miso_0_pins[] = { GPIOX_9 };
  161. static const unsigned int spi_mosi_0_pins[] = { GPIOX_10 };
  162. static const unsigned int iso7816_det_pins[] = { GPIOX_16 };
  163. static const unsigned int iso7816_reset_pins[] = { GPIOX_17 };
  164. static const unsigned int iso7816_1_clk_pins[] = { GPIOX_18 };
  165. static const unsigned int iso7816_1_data_pins[] = { GPIOX_19 };
  166. static const unsigned int spi_ss0_0_pins[] = { GPIOX_20 };
  167. static const unsigned int tsin_clk_b_pins[] = { GPIOX_8 };
  168. static const unsigned int tsin_sop_b_pins[] = { GPIOX_9 };
  169. static const unsigned int tsin_d0_b_pins[] = { GPIOX_10 };
  170. static const unsigned int pwm_b_pins[] = { GPIOX_11 };
  171. static const unsigned int i2c_sda_d0_pins[] = { GPIOX_16 };
  172. static const unsigned int i2c_sck_d0_pins[] = { GPIOX_17 };
  173. static const unsigned int tsin_d_valid_b_pins[] = { GPIOX_20 };
  174. /* bank Y */
  175. static const unsigned int tsin_d_valid_a_pins[] = { GPIOY_0 };
  176. static const unsigned int tsin_sop_a_pins[] = { GPIOY_1 };
  177. static const unsigned int tsin_d17_a_pins[] = {
  178. GPIOY_6, GPIOY_7, GPIOY_10, GPIOY_11, GPIOY_12, GPIOY_13, GPIOY_14,
  179. };
  180. static const unsigned int tsin_clk_a_pins[] = { GPIOY_8 };
  181. static const unsigned int tsin_d0_a_pins[] = { GPIOY_9 };
  182. static const unsigned int spdif_out_0_pins[] = { GPIOY_3 };
  183. static const unsigned int xtal_24m_pins[] = { GPIOY_3 };
  184. static const unsigned int iso7816_2_clk_pins[] = { GPIOY_13 };
  185. static const unsigned int iso7816_2_data_pins[] = { GPIOY_14 };
  186. /* bank DV */
  187. static const unsigned int pwm_d_pins[] = { GPIODV_28 };
  188. static const unsigned int pwm_c0_pins[] = { GPIODV_29 };
  189. static const unsigned int pwm_vs_2_pins[] = { GPIODV_9 };
  190. static const unsigned int pwm_vs_3_pins[] = { GPIODV_28 };
  191. static const unsigned int pwm_vs_4_pins[] = { GPIODV_29 };
  192. static const unsigned int xtal24_out_pins[] = { GPIODV_29 };
  193. static const unsigned int uart_tx_c_pins[] = { GPIODV_24 };
  194. static const unsigned int uart_rx_c_pins[] = { GPIODV_25 };
  195. static const unsigned int uart_cts_c_pins[] = { GPIODV_26 };
  196. static const unsigned int uart_rts_c_pins[] = { GPIODV_27 };
  197. static const unsigned int pwm_c1_pins[] = { GPIODV_9 };
  198. static const unsigned int i2c_sda_a_pins[] = { GPIODV_24 };
  199. static const unsigned int i2c_sck_a_pins[] = { GPIODV_25 };
  200. static const unsigned int i2c_sda_b0_pins[] = { GPIODV_26 };
  201. static const unsigned int i2c_sck_b0_pins[] = { GPIODV_27 };
  202. static const unsigned int i2c_sda_c0_pins[] = { GPIODV_28 };
  203. static const unsigned int i2c_sck_c0_pins[] = { GPIODV_29 };
  204. /* bank H */
  205. static const unsigned int hdmi_hpd_pins[] = { GPIOH_0 };
  206. static const unsigned int hdmi_sda_pins[] = { GPIOH_1 };
  207. static const unsigned int hdmi_scl_pins[] = { GPIOH_2 };
  208. static const unsigned int hdmi_cec_0_pins[] = { GPIOH_3 };
  209. static const unsigned int eth_txd1_0_pins[] = { GPIOH_5 };
  210. static const unsigned int eth_txd0_0_pins[] = { GPIOH_6 };
  211. static const unsigned int eth_rxd3_h_pins[] = { GPIOH_5 };
  212. static const unsigned int eth_rxd2_h_pins[] = { GPIOH_6 };
  213. static const unsigned int clk_24m_out_pins[] = { GPIOH_9 };
  214. static const unsigned int spi_ss1_pins[] = { GPIOH_0 };
  215. static const unsigned int spi_ss2_pins[] = { GPIOH_1 };
  216. static const unsigned int spi_ss0_1_pins[] = { GPIOH_3 };
  217. static const unsigned int spi_miso_1_pins[] = { GPIOH_4 };
  218. static const unsigned int spi_mosi_1_pins[] = { GPIOH_5 };
  219. static const unsigned int spi_sclk_1_pins[] = { GPIOH_6 };
  220. static const unsigned int eth_txd3_pins[] = { GPIOH_7 };
  221. static const unsigned int eth_txd2_pins[] = { GPIOH_8 };
  222. static const unsigned int eth_tx_clk_pins[] = { GPIOH_9 };
  223. static const unsigned int i2c_sda_b1_pins[] = { GPIOH_3 };
  224. static const unsigned int i2c_sck_b1_pins[] = { GPIOH_4 };
  225. static const unsigned int i2c_sda_c1_pins[] = { GPIOH_5 };
  226. static const unsigned int i2c_sck_c1_pins[] = { GPIOH_6 };
  227. static const unsigned int i2c_sda_d1_pins[] = { GPIOH_7 };
  228. static const unsigned int i2c_sck_d1_pins[] = { GPIOH_8 };
  229. /* bank BOOT */
  230. static const unsigned int nand_io_pins[] = {
  231. BOOT_0, BOOT_1, BOOT_2, BOOT_3, BOOT_4, BOOT_5, BOOT_6, BOOT_7
  232. };
  233. static const unsigned int nand_io_ce0_pins[] = { BOOT_8 };
  234. static const unsigned int nand_io_ce1_pins[] = { BOOT_9 };
  235. static const unsigned int nand_io_rb0_pins[] = { BOOT_10 };
  236. static const unsigned int nand_ale_pins[] = { BOOT_11 };
  237. static const unsigned int nand_cle_pins[] = { BOOT_12 };
  238. static const unsigned int nand_wen_clk_pins[] = { BOOT_13 };
  239. static const unsigned int nand_ren_clk_pins[] = { BOOT_14 };
  240. static const unsigned int nand_dqs_15_pins[] = { BOOT_15 };
  241. static const unsigned int nand_dqs_18_pins[] = { BOOT_18 };
  242. static const unsigned int sdxc_d0_c_pins[] = { BOOT_0};
  243. static const unsigned int sdxc_d13_c_pins[] = { BOOT_1, BOOT_2,
  244. BOOT_3 };
  245. static const unsigned int sdxc_d47_c_pins[] = { BOOT_4, BOOT_5,
  246. BOOT_6, BOOT_7 };
  247. static const unsigned int sdxc_clk_c_pins[] = { BOOT_8 };
  248. static const unsigned int sdxc_cmd_c_pins[] = { BOOT_10 };
  249. static const unsigned int nor_d_pins[] = { BOOT_11 };
  250. static const unsigned int nor_q_pins[] = { BOOT_12 };
  251. static const unsigned int nor_c_pins[] = { BOOT_13 };
  252. static const unsigned int nor_cs_pins[] = { BOOT_18 };
  253. static const unsigned int sd_d0_c_pins[] = { BOOT_0 };
  254. static const unsigned int sd_d1_c_pins[] = { BOOT_1 };
  255. static const unsigned int sd_d2_c_pins[] = { BOOT_2 };
  256. static const unsigned int sd_d3_c_pins[] = { BOOT_3 };
  257. static const unsigned int sd_cmd_c_pins[] = { BOOT_8 };
  258. static const unsigned int sd_clk_c_pins[] = { BOOT_10 };
  259. /* bank CARD */
  260. static const unsigned int sd_d1_b_pins[] = { CARD_0 };
  261. static const unsigned int sd_d0_b_pins[] = { CARD_1 };
  262. static const unsigned int sd_clk_b_pins[] = { CARD_2 };
  263. static const unsigned int sd_cmd_b_pins[] = { CARD_3 };
  264. static const unsigned int sd_d3_b_pins[] = { CARD_4 };
  265. static const unsigned int sd_d2_b_pins[] = { CARD_5 };
  266. static const unsigned int sdxc_d13_b_pins[] = { CARD_0, CARD_4,
  267. CARD_5 };
  268. static const unsigned int sdxc_d0_b_pins[] = { CARD_1 };
  269. static const unsigned int sdxc_clk_b_pins[] = { CARD_2 };
  270. static const unsigned int sdxc_cmd_b_pins[] = { CARD_3 };
  271. /* bank AO */
  272. static const unsigned int uart_tx_ao_a_pins[] = { GPIOAO_0 };
  273. static const unsigned int uart_rx_ao_a_pins[] = { GPIOAO_1 };
  274. static const unsigned int uart_cts_ao_a_pins[] = { GPIOAO_2 };
  275. static const unsigned int uart_rts_ao_a_pins[] = { GPIOAO_3 };
  276. static const unsigned int i2c_mst_sck_ao_pins[] = { GPIOAO_4 };
  277. static const unsigned int i2c_mst_sda_ao_pins[] = { GPIOAO_5 };
  278. static const unsigned int clk_32k_in_out_pins[] = { GPIOAO_6 };
  279. static const unsigned int remote_input_pins[] = { GPIOAO_7 };
  280. static const unsigned int hdmi_cec_1_pins[] = { GPIOAO_12 };
  281. static const unsigned int ir_blaster_pins[] = { GPIOAO_13 };
  282. static const unsigned int pwm_c2_pins[] = { GPIOAO_3 };
  283. static const unsigned int i2c_sck_ao_pins[] = { GPIOAO_4 };
  284. static const unsigned int i2c_sda_ao_pins[] = { GPIOAO_5 };
  285. static const unsigned int ir_remote_out_pins[] = { GPIOAO_7 };
  286. static const unsigned int i2s_am_clk_out_pins[] = { GPIOAO_8 };
  287. static const unsigned int i2s_ao_clk_out_pins[] = { GPIOAO_9 };
  288. static const unsigned int i2s_lr_clk_out_pins[] = { GPIOAO_10 };
  289. static const unsigned int i2s_out_01_pins[] = { GPIOAO_11 };
  290. static const unsigned int uart_tx_ao_b0_pins[] = { GPIOAO_0 };
  291. static const unsigned int uart_rx_ao_b0_pins[] = { GPIOAO_1 };
  292. static const unsigned int uart_cts_ao_b_pins[] = { GPIOAO_2 };
  293. static const unsigned int uart_rts_ao_b_pins[] = { GPIOAO_3 };
  294. static const unsigned int uart_tx_ao_b1_pins[] = { GPIOAO_4 };
  295. static const unsigned int uart_rx_ao_b1_pins[] = { GPIOAO_5 };
  296. static const unsigned int spdif_out_1_pins[] = { GPIOAO_6 };
  297. static const unsigned int i2s_in_ch01_pins[] = { GPIOAO_6 };
  298. static const unsigned int i2s_ao_clk_in_pins[] = { GPIOAO_9 };
  299. static const unsigned int i2s_lr_clk_in_pins[] = { GPIOAO_10 };
  300. /* bank DIF */
  301. static const unsigned int eth_rxd1_pins[] = { DIF_0_P };
  302. static const unsigned int eth_rxd0_pins[] = { DIF_0_N };
  303. static const unsigned int eth_rx_dv_pins[] = { DIF_1_P };
  304. static const unsigned int eth_rx_clk_pins[] = { DIF_1_N };
  305. static const unsigned int eth_txd0_1_pins[] = { DIF_2_P };
  306. static const unsigned int eth_txd1_1_pins[] = { DIF_2_N };
  307. static const unsigned int eth_rxd3_pins[] = { DIF_2_P };
  308. static const unsigned int eth_rxd2_pins[] = { DIF_2_N };
  309. static const unsigned int eth_tx_en_pins[] = { DIF_3_P };
  310. static const unsigned int eth_ref_clk_pins[] = { DIF_3_N };
  311. static const unsigned int eth_mdc_pins[] = { DIF_4_P };
  312. static const unsigned int eth_mdio_en_pins[] = { DIF_4_N };
  313. static struct meson_pmx_group meson8b_cbus_groups[] = {
  314. GPIO_GROUP(GPIOX_0),
  315. GPIO_GROUP(GPIOX_1),
  316. GPIO_GROUP(GPIOX_2),
  317. GPIO_GROUP(GPIOX_3),
  318. GPIO_GROUP(GPIOX_4),
  319. GPIO_GROUP(GPIOX_5),
  320. GPIO_GROUP(GPIOX_6),
  321. GPIO_GROUP(GPIOX_7),
  322. GPIO_GROUP(GPIOX_8),
  323. GPIO_GROUP(GPIOX_9),
  324. GPIO_GROUP(GPIOX_10),
  325. GPIO_GROUP(GPIOX_11),
  326. GPIO_GROUP(GPIOX_16),
  327. GPIO_GROUP(GPIOX_17),
  328. GPIO_GROUP(GPIOX_18),
  329. GPIO_GROUP(GPIOX_19),
  330. GPIO_GROUP(GPIOX_20),
  331. GPIO_GROUP(GPIOX_21),
  332. GPIO_GROUP(GPIOY_0),
  333. GPIO_GROUP(GPIOY_1),
  334. GPIO_GROUP(GPIOY_3),
  335. GPIO_GROUP(GPIOY_6),
  336. GPIO_GROUP(GPIOY_7),
  337. GPIO_GROUP(GPIOY_8),
  338. GPIO_GROUP(GPIOY_9),
  339. GPIO_GROUP(GPIOY_10),
  340. GPIO_GROUP(GPIOY_11),
  341. GPIO_GROUP(GPIOY_12),
  342. GPIO_GROUP(GPIOY_13),
  343. GPIO_GROUP(GPIOY_14),
  344. GPIO_GROUP(GPIODV_9),
  345. GPIO_GROUP(GPIODV_24),
  346. GPIO_GROUP(GPIODV_25),
  347. GPIO_GROUP(GPIODV_26),
  348. GPIO_GROUP(GPIODV_27),
  349. GPIO_GROUP(GPIODV_28),
  350. GPIO_GROUP(GPIODV_29),
  351. GPIO_GROUP(GPIOH_0),
  352. GPIO_GROUP(GPIOH_1),
  353. GPIO_GROUP(GPIOH_2),
  354. GPIO_GROUP(GPIOH_3),
  355. GPIO_GROUP(GPIOH_4),
  356. GPIO_GROUP(GPIOH_5),
  357. GPIO_GROUP(GPIOH_6),
  358. GPIO_GROUP(GPIOH_7),
  359. GPIO_GROUP(GPIOH_8),
  360. GPIO_GROUP(GPIOH_9),
  361. GPIO_GROUP(CARD_0),
  362. GPIO_GROUP(CARD_1),
  363. GPIO_GROUP(CARD_2),
  364. GPIO_GROUP(CARD_3),
  365. GPIO_GROUP(CARD_4),
  366. GPIO_GROUP(CARD_5),
  367. GPIO_GROUP(CARD_6),
  368. GPIO_GROUP(BOOT_0),
  369. GPIO_GROUP(BOOT_1),
  370. GPIO_GROUP(BOOT_2),
  371. GPIO_GROUP(BOOT_3),
  372. GPIO_GROUP(BOOT_4),
  373. GPIO_GROUP(BOOT_5),
  374. GPIO_GROUP(BOOT_6),
  375. GPIO_GROUP(BOOT_7),
  376. GPIO_GROUP(BOOT_8),
  377. GPIO_GROUP(BOOT_9),
  378. GPIO_GROUP(BOOT_10),
  379. GPIO_GROUP(BOOT_11),
  380. GPIO_GROUP(BOOT_12),
  381. GPIO_GROUP(BOOT_13),
  382. GPIO_GROUP(BOOT_14),
  383. GPIO_GROUP(BOOT_15),
  384. GPIO_GROUP(BOOT_16),
  385. GPIO_GROUP(BOOT_17),
  386. GPIO_GROUP(BOOT_18),
  387. GPIO_GROUP(DIF_0_P),
  388. GPIO_GROUP(DIF_0_N),
  389. GPIO_GROUP(DIF_1_P),
  390. GPIO_GROUP(DIF_1_N),
  391. GPIO_GROUP(DIF_2_P),
  392. GPIO_GROUP(DIF_2_N),
  393. GPIO_GROUP(DIF_3_P),
  394. GPIO_GROUP(DIF_3_N),
  395. GPIO_GROUP(DIF_4_P),
  396. GPIO_GROUP(DIF_4_N),
  397. /* bank X */
  398. GROUP(sd_d0_a, 8, 5),
  399. GROUP(sd_d1_a, 8, 4),
  400. GROUP(sd_d2_a, 8, 3),
  401. GROUP(sd_d3_a, 8, 2),
  402. GROUP(sdxc_d0_0_a, 5, 29),
  403. GROUP(sdxc_d47_a, 5, 12),
  404. GROUP(sdxc_d13_0_a, 5, 28),
  405. GROUP(sd_clk_a, 8, 1),
  406. GROUP(sd_cmd_a, 8, 0),
  407. GROUP(xtal_32k_out, 3, 22),
  408. GROUP(xtal_24m_out, 3, 20),
  409. GROUP(uart_tx_b0, 4, 9),
  410. GROUP(uart_rx_b0, 4, 8),
  411. GROUP(uart_cts_b0, 4, 7),
  412. GROUP(uart_rts_b0, 4, 6),
  413. GROUP(sdxc_d0_1_a, 5, 14),
  414. GROUP(sdxc_d13_1_a, 5, 13),
  415. GROUP(pcm_out_a, 3, 30),
  416. GROUP(pcm_in_a, 3, 29),
  417. GROUP(pcm_fs_a, 3, 28),
  418. GROUP(pcm_clk_a, 3, 27),
  419. GROUP(sdxc_clk_a, 5, 11),
  420. GROUP(sdxc_cmd_a, 5, 10),
  421. GROUP(pwm_vs_0, 7, 31),
  422. GROUP(pwm_e, 9, 19),
  423. GROUP(pwm_vs_1, 7, 30),
  424. GROUP(uart_tx_a, 4, 17),
  425. GROUP(uart_rx_a, 4, 16),
  426. GROUP(uart_cts_a, 4, 15),
  427. GROUP(uart_rts_a, 4, 14),
  428. GROUP(uart_tx_b1, 6, 19),
  429. GROUP(uart_rx_b1, 6, 18),
  430. GROUP(uart_cts_b1, 6, 17),
  431. GROUP(uart_rts_b1, 6, 16),
  432. GROUP(iso7816_0_clk, 5, 9),
  433. GROUP(iso7816_0_data, 5, 8),
  434. GROUP(spi_sclk_0, 4, 22),
  435. GROUP(spi_miso_0, 4, 24),
  436. GROUP(spi_mosi_0, 4, 23),
  437. GROUP(iso7816_det, 4, 21),
  438. GROUP(iso7816_reset, 4, 20),
  439. GROUP(iso7816_1_clk, 4, 19),
  440. GROUP(iso7816_1_data, 4, 18),
  441. GROUP(spi_ss0_0, 4, 25),
  442. GROUP(tsin_clk_b, 3, 6),
  443. GROUP(tsin_sop_b, 3, 7),
  444. GROUP(tsin_d0_b, 3, 8),
  445. GROUP(pwm_b, 2, 3),
  446. GROUP(i2c_sda_d0, 4, 5),
  447. GROUP(i2c_sck_d0, 4, 4),
  448. GROUP(tsin_d_valid_b, 3, 9),
  449. /* bank Y */
  450. GROUP(tsin_d_valid_a, 3, 2),
  451. GROUP(tsin_sop_a, 3, 1),
  452. GROUP(tsin_d17_a, 3, 5),
  453. GROUP(tsin_clk_a, 3, 0),
  454. GROUP(tsin_d0_a, 3, 4),
  455. GROUP(spdif_out_0, 1, 7),
  456. GROUP(xtal_24m, 3, 18),
  457. GROUP(iso7816_2_clk, 5, 7),
  458. GROUP(iso7816_2_data, 5, 6),
  459. /* bank DV */
  460. GROUP(pwm_d, 3, 26),
  461. GROUP(pwm_c0, 3, 25),
  462. GROUP(pwm_vs_2, 7, 28),
  463. GROUP(pwm_vs_3, 7, 27),
  464. GROUP(pwm_vs_4, 7, 26),
  465. GROUP(xtal24_out, 7, 25),
  466. GROUP(uart_tx_c, 6, 23),
  467. GROUP(uart_rx_c, 6, 22),
  468. GROUP(uart_cts_c, 6, 21),
  469. GROUP(uart_rts_c, 6, 20),
  470. GROUP(pwm_c1, 3, 24),
  471. GROUP(i2c_sda_a, 9, 31),
  472. GROUP(i2c_sck_a, 9, 30),
  473. GROUP(i2c_sda_b0, 9, 29),
  474. GROUP(i2c_sck_b0, 9, 28),
  475. GROUP(i2c_sda_c0, 9, 27),
  476. GROUP(i2c_sck_c0, 9, 26),
  477. /* bank H */
  478. GROUP(hdmi_hpd, 1, 26),
  479. GROUP(hdmi_sda, 1, 25),
  480. GROUP(hdmi_scl, 1, 24),
  481. GROUP(hdmi_cec_0, 1, 23),
  482. GROUP(eth_txd1_0, 7, 21),
  483. GROUP(eth_txd0_0, 7, 20),
  484. GROUP(clk_24m_out, 4, 1),
  485. GROUP(spi_ss1, 8, 11),
  486. GROUP(spi_ss2, 8, 12),
  487. GROUP(spi_ss0_1, 9, 13),
  488. GROUP(spi_miso_1, 9, 12),
  489. GROUP(spi_mosi_1, 9, 11),
  490. GROUP(spi_sclk_1, 9, 10),
  491. GROUP(eth_rxd3_h, 6, 15),
  492. GROUP(eth_rxd2_h, 6, 14),
  493. GROUP(eth_txd3, 6, 13),
  494. GROUP(eth_txd2, 6, 12),
  495. GROUP(eth_tx_clk, 6, 11),
  496. GROUP(i2c_sda_b1, 5, 27),
  497. GROUP(i2c_sck_b1, 5, 26),
  498. GROUP(i2c_sda_c1, 5, 25),
  499. GROUP(i2c_sck_c1, 5, 24),
  500. GROUP(i2c_sda_d1, 4, 3),
  501. GROUP(i2c_sck_d1, 4, 2),
  502. /* bank BOOT */
  503. GROUP(nand_io, 2, 26),
  504. GROUP(nand_io_ce0, 2, 25),
  505. GROUP(nand_io_ce1, 2, 24),
  506. GROUP(nand_io_rb0, 2, 17),
  507. GROUP(nand_ale, 2, 21),
  508. GROUP(nand_cle, 2, 20),
  509. GROUP(nand_wen_clk, 2, 19),
  510. GROUP(nand_ren_clk, 2, 18),
  511. GROUP(nand_dqs_15, 2, 27),
  512. GROUP(nand_dqs_18, 2, 28),
  513. GROUP(sdxc_d0_c, 4, 30),
  514. GROUP(sdxc_d13_c, 4, 29),
  515. GROUP(sdxc_d47_c, 4, 28),
  516. GROUP(sdxc_clk_c, 7, 19),
  517. GROUP(sdxc_cmd_c, 7, 18),
  518. GROUP(nor_d, 5, 1),
  519. GROUP(nor_q, 5, 3),
  520. GROUP(nor_c, 5, 2),
  521. GROUP(nor_cs, 5, 0),
  522. GROUP(sd_d0_c, 6, 29),
  523. GROUP(sd_d1_c, 6, 28),
  524. GROUP(sd_d2_c, 6, 27),
  525. GROUP(sd_d3_c, 6, 26),
  526. GROUP(sd_cmd_c, 6, 30),
  527. GROUP(sd_clk_c, 6, 31),
  528. /* bank CARD */
  529. GROUP(sd_d1_b, 2, 14),
  530. GROUP(sd_d0_b, 2, 15),
  531. GROUP(sd_clk_b, 2, 11),
  532. GROUP(sd_cmd_b, 2, 10),
  533. GROUP(sd_d3_b, 2, 12),
  534. GROUP(sd_d2_b, 2, 13),
  535. GROUP(sdxc_d13_b, 2, 6),
  536. GROUP(sdxc_d0_b, 2, 7),
  537. GROUP(sdxc_clk_b, 2, 5),
  538. GROUP(sdxc_cmd_b, 2, 4),
  539. /* bank DIF */
  540. GROUP(eth_rxd1, 6, 0),
  541. GROUP(eth_rxd0, 6, 1),
  542. GROUP(eth_rx_dv, 6, 2),
  543. GROUP(eth_rx_clk, 6, 3),
  544. GROUP(eth_txd0_1, 6, 4),
  545. GROUP(eth_txd1_1, 6, 5),
  546. GROUP(eth_tx_en, 6, 6),
  547. GROUP(eth_ref_clk, 6, 8),
  548. GROUP(eth_mdc, 6, 9),
  549. GROUP(eth_mdio_en, 6, 10),
  550. GROUP(eth_rxd3, 7, 22),
  551. GROUP(eth_rxd2, 7, 23),
  552. };
  553. static struct meson_pmx_group meson8b_aobus_groups[] = {
  554. GPIO_GROUP(GPIOAO_0),
  555. GPIO_GROUP(GPIOAO_1),
  556. GPIO_GROUP(GPIOAO_2),
  557. GPIO_GROUP(GPIOAO_3),
  558. GPIO_GROUP(GPIOAO_4),
  559. GPIO_GROUP(GPIOAO_5),
  560. GPIO_GROUP(GPIOAO_6),
  561. GPIO_GROUP(GPIOAO_7),
  562. GPIO_GROUP(GPIOAO_8),
  563. GPIO_GROUP(GPIOAO_9),
  564. GPIO_GROUP(GPIOAO_10),
  565. GPIO_GROUP(GPIOAO_11),
  566. GPIO_GROUP(GPIOAO_12),
  567. GPIO_GROUP(GPIOAO_13),
  568. GPIO_GROUP(GPIO_BSD_EN),
  569. GPIO_GROUP(GPIO_TEST_N),
  570. /* bank AO */
  571. GROUP(uart_tx_ao_a, 0, 12),
  572. GROUP(uart_rx_ao_a, 0, 11),
  573. GROUP(uart_cts_ao_a, 0, 10),
  574. GROUP(uart_rts_ao_a, 0, 9),
  575. GROUP(i2c_mst_sck_ao, 0, 6),
  576. GROUP(i2c_mst_sda_ao, 0, 5),
  577. GROUP(clk_32k_in_out, 0, 18),
  578. GROUP(remote_input, 0, 0),
  579. GROUP(hdmi_cec_1, 0, 17),
  580. GROUP(ir_blaster, 0, 31),
  581. GROUP(pwm_c2, 0, 22),
  582. GROUP(i2c_sck_ao, 0, 2),
  583. GROUP(i2c_sda_ao, 0, 1),
  584. GROUP(ir_remote_out, 0, 21),
  585. GROUP(i2s_am_clk_out, 0, 30),
  586. GROUP(i2s_ao_clk_out, 0, 29),
  587. GROUP(i2s_lr_clk_out, 0, 28),
  588. GROUP(i2s_out_01, 0, 27),
  589. GROUP(uart_tx_ao_b0, 0, 26),
  590. GROUP(uart_rx_ao_b0, 0, 25),
  591. GROUP(uart_cts_ao_b, 0, 8),
  592. GROUP(uart_rts_ao_b, 0, 7),
  593. GROUP(uart_tx_ao_b1, 0, 24),
  594. GROUP(uart_rx_ao_b1, 0, 23),
  595. GROUP(spdif_out_1, 0, 16),
  596. GROUP(i2s_in_ch01, 0, 13),
  597. GROUP(i2s_ao_clk_in, 0, 15),
  598. GROUP(i2s_lr_clk_in, 0, 14),
  599. };
  600. static const char * const gpio_periphs_groups[] = {
  601. "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
  602. "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
  603. "GPIOX_10", "GPIOX_11", "GPIOX_16", "GPIOX_17", "GPIOX_18",
  604. "GPIOX_19", "GPIOX_20", "GPIOX_21",
  605. "GPIOY_0", "GPIOY_1", "GPIOY_3", "GPIOY_6", "GPIOY_7",
  606. "GPIOY_8", "GPIOY_9", "GPIOY_10", "GPIOY_11", "GPIOY_12",
  607. "GPIOY_13", "GPIOY_14",
  608. "GPIODV_9", "GPIODV_24", "GPIODV_25", "GPIODV_26",
  609. "GPIODV_27", "GPIODV_28", "GPIODV_29",
  610. "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4",
  611. "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9",
  612. "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4",
  613. "CARD_5", "CARD_6",
  614. "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
  615. "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
  616. "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
  617. "BOOT_15", "BOOT_16", "BOOT_17", "BOOT_18",
  618. "DIF_0_P", "DIF_0_N", "DIF_1_P", "DIF_1_N",
  619. "DIF_2_P", "DIF_2_N", "DIF_3_P", "DIF_3_N",
  620. "DIF_4_P", "DIF_4_N"
  621. };
  622. static const char * const gpio_aobus_groups[] = {
  623. "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3",
  624. "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7",
  625. "GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11",
  626. "GPIOAO_12", "GPIOAO_13", "GPIO_BSD_EN", "GPIO_TEST_N"
  627. };
  628. static const char * const sd_a_groups[] = {
  629. "sd_d0_a", "sd_d1_a", "sd_d2_a", "sd_d3_a", "sd_clk_a",
  630. "sd_cmd_a"
  631. };
  632. static const char * const sdxc_a_groups[] = {
  633. "sdxc_d0_0_a", "sdxc_d13_0_a", "sdxc_d47_a", "sdxc_clk_a",
  634. "sdxc_cmd_a", "sdxc_d0_1_a", "sdxc_d13_1_a"
  635. };
  636. static const char * const pcm_a_groups[] = {
  637. "pcm_out_a", "pcm_in_a", "pcm_fs_a", "pcm_clk_a"
  638. };
  639. static const char * const uart_a_groups[] = {
  640. "uart_tx_a", "uart_rx_a", "uart_cts_a", "uart_rts_a"
  641. };
  642. static const char * const uart_b_groups[] = {
  643. "uart_tx_b0", "uart_rx_b0", "uart_cts_b0", "uart_rts_b0",
  644. "uart_tx_b1", "uart_rx_b1", "uart_cts_b1", "uart_rts_b1"
  645. };
  646. static const char * const iso7816_groups[] = {
  647. "iso7816_det", "iso7816_reset", "iso7816_0_clk", "iso7816_0_data",
  648. "iso7816_1_clk", "iso7816_1_data", "iso7816_2_clk", "iso7816_2_data"
  649. };
  650. static const char * const i2c_d_groups[] = {
  651. "i2c_sda_d0", "i2c_sck_d0", "i2c_sda_d1", "i2c_sck_d1"
  652. };
  653. static const char * const xtal_groups[] = {
  654. "xtal_32k_out", "xtal_24m_out", "xtal_24m", "xtal24_out"
  655. };
  656. static const char * const uart_c_groups[] = {
  657. "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c"
  658. };
  659. static const char * const i2c_c_groups[] = {
  660. "i2c_sda_c0", "i2c_sck_c0", "i2c_sda_c1", "i2c_sck_c1"
  661. };
  662. static const char * const hdmi_groups[] = {
  663. "hdmi_hpd", "hdmi_sda", "hdmi_scl", "hdmi_cec_0"
  664. };
  665. static const char * const hdmi_cec_groups[] = {
  666. "hdmi_cec_1"
  667. };
  668. static const char * const spi_groups[] = {
  669. "spi_ss0_0", "spi_miso_0", "spi_mosi_0", "spi_sclk_0",
  670. "spi_ss0_1", "spi_ss1", "spi_sclk_1", "spi_mosi_1",
  671. "spi_miso_1", "spi_ss2"
  672. };
  673. static const char * const ethernet_groups[] = {
  674. "eth_tx_clk", "eth_tx_en", "eth_txd1_0", "eth_txd1_1",
  675. "eth_txd0_0", "eth_txd0_1", "eth_rx_clk", "eth_rx_dv",
  676. "eth_rxd1", "eth_rxd0", "eth_mdio_en", "eth_mdc", "eth_ref_clk",
  677. "eth_txd2", "eth_txd3", "eth_rxd3", "eth_rxd2",
  678. "eth_rxd3_h", "eth_rxd2_h"
  679. };
  680. static const char * const i2c_a_groups[] = {
  681. "i2c_sda_a", "i2c_sck_a",
  682. };
  683. static const char * const i2c_b_groups[] = {
  684. "i2c_sda_b0", "i2c_sck_b0", "i2c_sda_b1", "i2c_sck_b1"
  685. };
  686. static const char * const sd_c_groups[] = {
  687. "sd_d0_c", "sd_d1_c", "sd_d2_c", "sd_d3_c",
  688. "sd_cmd_c", "sd_clk_c"
  689. };
  690. static const char * const sdxc_c_groups[] = {
  691. "sdxc_d0_c", "sdxc_d13_c", "sdxc_d47_c", "sdxc_cmd_c",
  692. "sdxc_clk_c"
  693. };
  694. static const char * const nand_groups[] = {
  695. "nand_io", "nand_io_ce0", "nand_io_ce1",
  696. "nand_io_rb0", "nand_ale", "nand_cle",
  697. "nand_wen_clk", "nand_ren_clk", "nand_dqs_15",
  698. "nand_dqs_18"
  699. };
  700. static const char * const nor_groups[] = {
  701. "nor_d", "nor_q", "nor_c", "nor_cs"
  702. };
  703. static const char * const sd_b_groups[] = {
  704. "sd_d1_b", "sd_d0_b", "sd_clk_b", "sd_cmd_b",
  705. "sd_d3_b", "sd_d2_b"
  706. };
  707. static const char * const sdxc_b_groups[] = {
  708. "sdxc_d13_b", "sdxc_d0_b", "sdxc_clk_b", "sdxc_cmd_b"
  709. };
  710. static const char * const uart_ao_groups[] = {
  711. "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a"
  712. };
  713. static const char * const remote_groups[] = {
  714. "remote_input", "ir_blaster", "ir_remote_out"
  715. };
  716. static const char * const i2c_slave_ao_groups[] = {
  717. "i2c_sck_ao", "i2c_sda_ao"
  718. };
  719. static const char * const uart_ao_b_groups[] = {
  720. "uart_tx_ao_b0", "uart_rx_ao_b0", "uart_tx_ao_b1", "uart_rx_ao_b1",
  721. "uart_cts_ao_b", "uart_rts_ao_b"
  722. };
  723. static const char * const i2c_mst_ao_groups[] = {
  724. "i2c_mst_sck_ao", "i2c_mst_sda_ao"
  725. };
  726. static const char * const clk_24m_groups[] = {
  727. "clk_24m_out"
  728. };
  729. static const char * const clk_32k_groups[] = {
  730. "clk_32k_in_out"
  731. };
  732. static const char * const spdif_0_groups[] = {
  733. "spdif_out_0"
  734. };
  735. static const char * const spdif_1_groups[] = {
  736. "spdif_out_1"
  737. };
  738. static const char * const i2s_groups[] = {
  739. "i2s_am_clk_out", "i2s_ao_clk_out", "i2s_lr_clk_out",
  740. "i2s_out_01", "i2s_in_ch01", "i2s_ao_clk_in",
  741. "i2s_lr_clk_in"
  742. };
  743. static const char * const pwm_b_groups[] = {
  744. "pwm_b"
  745. };
  746. static const char * const pwm_c_groups[] = {
  747. "pwm_c0", "pwm_c1"
  748. };
  749. static const char * const pwm_c_ao_groups[] = {
  750. "pwm_c2"
  751. };
  752. static const char * const pwm_d_groups[] = {
  753. "pwm_d"
  754. };
  755. static const char * const pwm_e_groups[] = {
  756. "pwm_e"
  757. };
  758. static const char * const pwm_vs_groups[] = {
  759. "pwm_vs_0", "pwm_vs_1", "pwm_vs_2",
  760. "pwm_vs_3", "pwm_vs_4"
  761. };
  762. static const char * const tsin_a_groups[] = {
  763. "tsin_d0_a", "tsin_d17_a", "tsin_clk_a", "tsin_sop_a",
  764. "tsin_d_valid_a"
  765. };
  766. static const char * const tsin_b_groups[] = {
  767. "tsin_d0_b", "tsin_clk_b", "tsin_sop_b", "tsin_d_valid_b"
  768. };
  769. static struct meson_pmx_func meson8b_cbus_functions[] = {
  770. FUNCTION(gpio_periphs),
  771. FUNCTION(sd_a),
  772. FUNCTION(sdxc_a),
  773. FUNCTION(pcm_a),
  774. FUNCTION(uart_a),
  775. FUNCTION(uart_b),
  776. FUNCTION(iso7816),
  777. FUNCTION(i2c_d),
  778. FUNCTION(xtal),
  779. FUNCTION(uart_c),
  780. FUNCTION(i2c_c),
  781. FUNCTION(hdmi),
  782. FUNCTION(spi),
  783. FUNCTION(ethernet),
  784. FUNCTION(i2c_a),
  785. FUNCTION(i2c_b),
  786. FUNCTION(sd_c),
  787. FUNCTION(sdxc_c),
  788. FUNCTION(nand),
  789. FUNCTION(nor),
  790. FUNCTION(sd_b),
  791. FUNCTION(sdxc_b),
  792. FUNCTION(spdif_0),
  793. FUNCTION(pwm_b),
  794. FUNCTION(pwm_c),
  795. FUNCTION(pwm_d),
  796. FUNCTION(pwm_e),
  797. FUNCTION(pwm_vs),
  798. FUNCTION(tsin_a),
  799. FUNCTION(tsin_b),
  800. FUNCTION(clk_24m),
  801. };
  802. static struct meson_pmx_func meson8b_aobus_functions[] = {
  803. FUNCTION(gpio_aobus),
  804. FUNCTION(uart_ao),
  805. FUNCTION(uart_ao_b),
  806. FUNCTION(i2c_slave_ao),
  807. FUNCTION(i2c_mst_ao),
  808. FUNCTION(i2s),
  809. FUNCTION(remote),
  810. FUNCTION(clk_32k),
  811. FUNCTION(pwm_c_ao),
  812. FUNCTION(spdif_1),
  813. FUNCTION(hdmi_cec),
  814. };
  815. static struct meson_bank meson8b_cbus_banks[] = {
  816. /* name first last irq pullen pull dir out in */
  817. BANK("X0..11", GPIOX_0, GPIOX_11, 97, 108, 4, 0, 4, 0, 0, 0, 1, 0, 2, 0),
  818. BANK("X16..21", GPIOX_16, GPIOX_21, 113, 118, 4, 16, 4, 16, 0, 16, 1, 16, 2, 16),
  819. BANK("Y0..1", GPIOY_0, GPIOY_1, 80, 81, 3, 0, 3, 0, 3, 0, 4, 0, 5, 0),
  820. BANK("Y3", GPIOY_3, GPIOY_3, 83, 83, 3, 3, 3, 3, 3, 3, 4, 3, 5, 3),
  821. BANK("Y6..14", GPIOY_6, GPIOY_14, 86, 94, 3, 6, 3, 6, 3, 6, 4, 6, 5, 6),
  822. BANK("DV9", GPIODV_9, GPIODV_9, 59, 59, 0, 9, 0, 9, 7, 9, 8, 9, 9, 9),
  823. BANK("DV24..29", GPIODV_24, GPIODV_29, 74, 79, 0, 24, 0, 24, 7, 24, 8, 24, 9, 24),
  824. BANK("H", GPIOH_0, GPIOH_9, 14, 23, 1, 16, 1, 16, 9, 19, 10, 19, 11, 19),
  825. BANK("CARD", CARD_0, CARD_6, 43, 49, 2, 20, 2, 20, 0, 22, 1, 22, 2, 22),
  826. BANK("BOOT", BOOT_0, BOOT_18, 24, 42, 2, 0, 2, 0, 9, 0, 10, 0, 11, 0),
  827. /*
  828. * The following bank is not mentionned in the public datasheet
  829. * There is no information whether it can be used with the gpio
  830. * interrupt controller
  831. */
  832. BANK("DIF", DIF_0_P, DIF_4_N, -1, -1, 5, 8, 5, 8, 12, 12, 13, 12, 14, 12),
  833. };
  834. static struct meson_bank meson8b_aobus_banks[] = {
  835. /* name first lastc irq pullen pull dir out in */
  836. BANK("AO", GPIOAO_0, GPIO_TEST_N, 0, 13, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0),
  837. };
  838. static struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {
  839. .name = "cbus-banks",
  840. .pins = meson8b_cbus_pins,
  841. .groups = meson8b_cbus_groups,
  842. .funcs = meson8b_cbus_functions,
  843. .banks = meson8b_cbus_banks,
  844. .num_pins = ARRAY_SIZE(meson8b_cbus_pins),
  845. .num_groups = ARRAY_SIZE(meson8b_cbus_groups),
  846. .num_funcs = ARRAY_SIZE(meson8b_cbus_functions),
  847. .num_banks = ARRAY_SIZE(meson8b_cbus_banks),
  848. .pmx_ops = &meson8_pmx_ops,
  849. };
  850. static struct meson_pinctrl_data meson8b_aobus_pinctrl_data = {
  851. .name = "aobus-banks",
  852. .pins = meson8b_aobus_pins,
  853. .groups = meson8b_aobus_groups,
  854. .funcs = meson8b_aobus_functions,
  855. .banks = meson8b_aobus_banks,
  856. .num_pins = ARRAY_SIZE(meson8b_aobus_pins),
  857. .num_groups = ARRAY_SIZE(meson8b_aobus_groups),
  858. .num_funcs = ARRAY_SIZE(meson8b_aobus_functions),
  859. .num_banks = ARRAY_SIZE(meson8b_aobus_banks),
  860. .pmx_ops = &meson8_pmx_ops,
  861. .parse_dt = &meson8_aobus_parse_dt_extra,
  862. };
  863. static const struct of_device_id meson8b_pinctrl_dt_match[] = {
  864. {
  865. .compatible = "amlogic,meson8b-cbus-pinctrl",
  866. .data = &meson8b_cbus_pinctrl_data,
  867. },
  868. {
  869. .compatible = "amlogic,meson8b-aobus-pinctrl",
  870. .data = &meson8b_aobus_pinctrl_data,
  871. },
  872. { },
  873. };
  874. static struct platform_driver meson8b_pinctrl_driver = {
  875. .probe = meson_pinctrl_probe,
  876. .driver = {
  877. .name = "meson8b-pinctrl",
  878. .of_match_table = meson8b_pinctrl_dt_match,
  879. },
  880. };
  881. builtin_platform_driver(meson8b_pinctrl_driver);