pinctrl-meson.h 4.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Pin controller and GPIO driver for Amlogic Meson SoCs
  4. *
  5. * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
  6. */
  7. #include <linux/gpio/driver.h>
  8. #include <linux/pinctrl/pinctrl.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/regmap.h>
  11. #include <linux/types.h>
  12. #include <linux/module.h>
  13. struct meson_pinctrl;
  14. /**
  15. * struct meson_pmx_group - a pinmux group
  16. *
  17. * @name: group name
  18. * @pins: pins in the group
  19. * @num_pins: number of pins in the group
  20. * @is_gpio: whether the group is a single GPIO group
  21. * @reg: register offset for the group in the domain mux registers
  22. * @bit bit index enabling the group
  23. * @domain: index of the domain this group belongs to
  24. */
  25. struct meson_pmx_group {
  26. const char *name;
  27. const unsigned int *pins;
  28. unsigned int num_pins;
  29. const void *data;
  30. };
  31. /**
  32. * struct meson_pmx_func - a pinmux function
  33. *
  34. * @name: function name
  35. * @groups: groups in the function
  36. * @num_groups: number of groups in the function
  37. */
  38. struct meson_pmx_func {
  39. const char *name;
  40. const char * const *groups;
  41. unsigned int num_groups;
  42. };
  43. /**
  44. * struct meson_reg_desc - a register descriptor
  45. *
  46. * @reg: register offset in the regmap
  47. * @bit: bit index in register
  48. *
  49. * The structure describes the information needed to control pull,
  50. * pull-enable, direction, etc. for a single pin
  51. */
  52. struct meson_reg_desc {
  53. unsigned int reg;
  54. unsigned int bit;
  55. };
  56. /**
  57. * enum meson_reg_type - type of registers encoded in @meson_reg_desc
  58. */
  59. enum meson_reg_type {
  60. REG_PULLEN,
  61. REG_PULL,
  62. REG_DIR,
  63. REG_OUT,
  64. REG_IN,
  65. REG_DS,
  66. NUM_REG,
  67. };
  68. /**
  69. * enum meson_pinconf_drv - value of drive-strength supported
  70. */
  71. enum meson_pinconf_drv {
  72. MESON_PINCONF_DRV_500UA,
  73. MESON_PINCONF_DRV_2500UA,
  74. MESON_PINCONF_DRV_3000UA,
  75. MESON_PINCONF_DRV_4000UA,
  76. };
  77. /**
  78. * struct meson bank
  79. *
  80. * @name: bank name
  81. * @first: first pin of the bank
  82. * @last: last pin of the bank
  83. * @irq: hwirq base number of the bank
  84. * @regs: array of register descriptors
  85. *
  86. * A bank represents a set of pins controlled by a contiguous set of
  87. * bits in the domain registers. The structure specifies which bits in
  88. * the regmap control the different functionalities. Each member of
  89. * the @regs array refers to the first pin of the bank.
  90. */
  91. struct meson_bank {
  92. const char *name;
  93. unsigned int first;
  94. unsigned int last;
  95. int irq_first;
  96. int irq_last;
  97. struct meson_reg_desc regs[NUM_REG];
  98. };
  99. struct meson_pinctrl_data {
  100. const char *name;
  101. const struct pinctrl_pin_desc *pins;
  102. struct meson_pmx_group *groups;
  103. struct meson_pmx_func *funcs;
  104. unsigned int num_pins;
  105. unsigned int num_groups;
  106. unsigned int num_funcs;
  107. struct meson_bank *banks;
  108. unsigned int num_banks;
  109. const struct pinmux_ops *pmx_ops;
  110. void *pmx_data;
  111. int (*parse_dt)(struct meson_pinctrl *pc);
  112. };
  113. struct meson_pinctrl {
  114. struct device *dev;
  115. struct pinctrl_dev *pcdev;
  116. struct pinctrl_desc desc;
  117. struct meson_pinctrl_data *data;
  118. struct regmap *reg_mux;
  119. struct regmap *reg_pullen;
  120. struct regmap *reg_pull;
  121. struct regmap *reg_gpio;
  122. struct regmap *reg_ds;
  123. struct gpio_chip chip;
  124. struct device_node *of_node;
  125. };
  126. #define FUNCTION(fn) \
  127. { \
  128. .name = #fn, \
  129. .groups = fn ## _groups, \
  130. .num_groups = ARRAY_SIZE(fn ## _groups), \
  131. }
  132. #define BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, \
  133. dsr, dsb) \
  134. { \
  135. .name = n, \
  136. .first = f, \
  137. .last = l, \
  138. .irq_first = fi, \
  139. .irq_last = li, \
  140. .regs = { \
  141. [REG_PULLEN] = { per, peb }, \
  142. [REG_PULL] = { pr, pb }, \
  143. [REG_DIR] = { dr, db }, \
  144. [REG_OUT] = { or, ob }, \
  145. [REG_IN] = { ir, ib }, \
  146. [REG_DS] = { dsr, dsb }, \
  147. }, \
  148. }
  149. #define BANK(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib) \
  150. BANK_DS(n, f, l, fi, li, per, peb, pr, pb, dr, db, or, ob, ir, ib, 0, 0)
  151. #define MESON_PIN(x) PINCTRL_PIN(x, #x)
  152. /* Common pmx functions */
  153. int meson_pmx_get_funcs_count(struct pinctrl_dev *pcdev);
  154. const char *meson_pmx_get_func_name(struct pinctrl_dev *pcdev,
  155. unsigned selector);
  156. int meson_pmx_get_groups(struct pinctrl_dev *pcdev,
  157. unsigned selector,
  158. const char * const **groups,
  159. unsigned * const num_groups);
  160. /* Common probe function */
  161. int meson_pinctrl_probe(struct platform_device *pdev);
  162. /* Common ao groups extra dt parse function for SoCs before g12a */
  163. int meson8_aobus_parse_dt_extra(struct meson_pinctrl *pc);
  164. /* Common extra dt parse function for SoCs like A1 */
  165. int meson_a1_parse_dt_extra(struct meson_pinctrl *pc);