pinctrl-meson-axg-pmx.c 3.1 KB

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  1. /*
  2. * Second generation of pinmux driver for Amlogic Meson-AXG SoC.
  3. *
  4. * Copyright (c) 2017 Baylibre SAS.
  5. * Author: Jerome Brunet <jbrunet@baylibre.com>
  6. *
  7. * Copyright (c) 2017 Amlogic, Inc. All rights reserved.
  8. * Author: Xingyu Chen <xingyu.chen@amlogic.com>
  9. *
  10. * SPDX-License-Identifier: (GPL-2.0+ or MIT)
  11. */
  12. /*
  13. * This new generation of pinctrl IP is mainly adopted by the
  14. * Meson-AXG SoC and later series, which use 4-width continuous
  15. * register bit to select the function for each pin.
  16. *
  17. * The value 0 is always selecting the GPIO mode, while other
  18. * values (start from 1) for selecting the function mode.
  19. */
  20. #include <linux/device.h>
  21. #include <linux/regmap.h>
  22. #include <linux/pinctrl/pinctrl.h>
  23. #include <linux/pinctrl/pinmux.h>
  24. #include "pinctrl-meson.h"
  25. #include "pinctrl-meson-axg-pmx.h"
  26. static int meson_axg_pmx_get_bank(struct meson_pinctrl *pc,
  27. unsigned int pin,
  28. struct meson_pmx_bank **bank)
  29. {
  30. int i;
  31. struct meson_axg_pmx_data *pmx = pc->data->pmx_data;
  32. for (i = 0; i < pmx->num_pmx_banks; i++)
  33. if (pin >= pmx->pmx_banks[i].first &&
  34. pin <= pmx->pmx_banks[i].last) {
  35. *bank = &pmx->pmx_banks[i];
  36. return 0;
  37. }
  38. return -EINVAL;
  39. }
  40. static int meson_pmx_calc_reg_and_offset(struct meson_pmx_bank *bank,
  41. unsigned int pin, unsigned int *reg,
  42. unsigned int *offset)
  43. {
  44. int shift;
  45. shift = pin - bank->first;
  46. *reg = bank->reg + (bank->offset + (shift << 2)) / 32;
  47. *offset = (bank->offset + (shift << 2)) % 32;
  48. return 0;
  49. }
  50. static int meson_axg_pmx_update_function(struct meson_pinctrl *pc,
  51. unsigned int pin, unsigned int func)
  52. {
  53. int ret;
  54. int reg;
  55. int offset;
  56. struct meson_pmx_bank *bank;
  57. ret = meson_axg_pmx_get_bank(pc, pin, &bank);
  58. if (ret)
  59. return ret;
  60. meson_pmx_calc_reg_and_offset(bank, pin, &reg, &offset);
  61. ret = regmap_update_bits(pc->reg_mux, reg << 2,
  62. 0xf << offset, (func & 0xf) << offset);
  63. return ret;
  64. }
  65. static int meson_axg_pmx_set_mux(struct pinctrl_dev *pcdev,
  66. unsigned int func_num, unsigned int group_num)
  67. {
  68. int i;
  69. int ret;
  70. struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
  71. struct meson_pmx_func *func = &pc->data->funcs[func_num];
  72. struct meson_pmx_group *group = &pc->data->groups[group_num];
  73. struct meson_pmx_axg_data *pmx_data =
  74. (struct meson_pmx_axg_data *)group->data;
  75. dev_dbg(pc->dev, "enable function %s, group %s\n", func->name,
  76. group->name);
  77. for (i = 0; i < group->num_pins; i++) {
  78. ret = meson_axg_pmx_update_function(pc, group->pins[i],
  79. pmx_data->func);
  80. if (ret)
  81. return ret;
  82. }
  83. return 0;
  84. }
  85. static int meson_axg_pmx_request_gpio(struct pinctrl_dev *pcdev,
  86. struct pinctrl_gpio_range *range, unsigned int offset)
  87. {
  88. struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
  89. return meson_axg_pmx_update_function(pc, offset, 0);
  90. }
  91. const struct pinmux_ops meson_axg_pmx_ops = {
  92. .set_mux = meson_axg_pmx_set_mux,
  93. .get_functions_count = meson_pmx_get_funcs_count,
  94. .get_function_name = meson_pmx_get_func_name,
  95. .get_function_groups = meson_pmx_get_groups,
  96. .gpio_request_enable = meson_axg_pmx_request_gpio,
  97. };
  98. EXPORT_SYMBOL_GPL(meson_axg_pmx_ops);
  99. MODULE_LICENSE("Dual BSD/GPL");