pinctrl-cs47l92.c 1.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Pinctrl for Cirrus Logic CS47L92
  4. *
  5. * Copyright (C) 2018-2019 Cirrus Logic, Inc. and
  6. * Cirrus Logic International Semiconductor Ltd.
  7. */
  8. #include <linux/err.h>
  9. #include <linux/mfd/madera/core.h>
  10. #include "pinctrl-madera.h"
  11. /*
  12. * The alt func groups are the most commonly used functions we place these at
  13. * the lower function indexes for convenience, and the less commonly used gpio
  14. * functions at higher indexes.
  15. *
  16. * To stay consistent with the datasheet the function names are the same as
  17. * the group names for that function's pins
  18. *
  19. * Note - all 1 less than in datasheet because these are zero-indexed
  20. */
  21. static const unsigned int cs47l92_spk1_pins[] = { 2, 3 };
  22. static const unsigned int cs47l92_aif1_pins[] = { 4, 5, 6, 7 };
  23. static const unsigned int cs47l92_aif2_pins[] = { 8, 9, 10, 11 };
  24. static const unsigned int cs47l92_aif3_pins[] = { 12, 13, 14, 15 };
  25. static const struct madera_pin_groups cs47l92_pin_groups[] = {
  26. { "aif1", cs47l92_aif1_pins, ARRAY_SIZE(cs47l92_aif1_pins) },
  27. { "aif2", cs47l92_aif2_pins, ARRAY_SIZE(cs47l92_aif2_pins) },
  28. { "aif3", cs47l92_aif3_pins, ARRAY_SIZE(cs47l92_aif3_pins) },
  29. { "pdmspk1", cs47l92_spk1_pins, ARRAY_SIZE(cs47l92_spk1_pins) },
  30. };
  31. const struct madera_pin_chip cs47l92_pin_chip = {
  32. .n_pins = CS47L92_NUM_GPIOS,
  33. .pin_groups = cs47l92_pin_groups,
  34. .n_pin_groups = ARRAY_SIZE(cs47l92_pin_groups),
  35. };