rave-sp-eeprom.c 9.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * EEPROM driver for RAVE SP
  4. *
  5. * Copyright (C) 2018 Zodiac Inflight Innovations
  6. *
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/mfd/rave-sp.h>
  10. #include <linux/module.h>
  11. #include <linux/nvmem-provider.h>
  12. #include <linux/of_device.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/sizes.h>
  15. /**
  16. * enum rave_sp_eeprom_access_type - Supported types of EEPROM access
  17. *
  18. * @RAVE_SP_EEPROM_WRITE: EEPROM write
  19. * @RAVE_SP_EEPROM_READ: EEPROM read
  20. */
  21. enum rave_sp_eeprom_access_type {
  22. RAVE_SP_EEPROM_WRITE = 0,
  23. RAVE_SP_EEPROM_READ = 1,
  24. };
  25. /**
  26. * enum rave_sp_eeprom_header_size - EEPROM command header sizes
  27. *
  28. * @RAVE_SP_EEPROM_HEADER_SMALL: EEPROM header size for "small" devices (< 8K)
  29. * @RAVE_SP_EEPROM_HEADER_BIG: EEPROM header size for "big" devices (> 8K)
  30. */
  31. enum rave_sp_eeprom_header_size {
  32. RAVE_SP_EEPROM_HEADER_SMALL = 4U,
  33. RAVE_SP_EEPROM_HEADER_BIG = 5U,
  34. };
  35. #define RAVE_SP_EEPROM_HEADER_MAX RAVE_SP_EEPROM_HEADER_BIG
  36. #define RAVE_SP_EEPROM_PAGE_SIZE 32U
  37. /**
  38. * struct rave_sp_eeprom_page - RAVE SP EEPROM page
  39. *
  40. * @type: Access type (see enum rave_sp_eeprom_access_type)
  41. * @success: Success flag (Success = 1, Failure = 0)
  42. * @data: Read data
  43. * Note this structure corresponds to RSP_*_EEPROM payload from RAVE
  44. * SP ICD
  45. */
  46. struct rave_sp_eeprom_page {
  47. u8 type;
  48. u8 success;
  49. u8 data[RAVE_SP_EEPROM_PAGE_SIZE];
  50. } __packed;
  51. /**
  52. * struct rave_sp_eeprom - RAVE SP EEPROM device
  53. *
  54. * @sp: Pointer to parent RAVE SP device
  55. * @mutex: Lock protecting access to EEPROM
  56. * @address: EEPROM device address
  57. * @header_size: Size of EEPROM command header for this device
  58. * @dev: Pointer to corresponding struct device used for logging
  59. */
  60. struct rave_sp_eeprom {
  61. struct rave_sp *sp;
  62. struct mutex mutex;
  63. u8 address;
  64. unsigned int header_size;
  65. struct device *dev;
  66. };
  67. /**
  68. * rave_sp_eeprom_io - Low-level part of EEPROM page access
  69. *
  70. * @eeprom: EEPROM device to write to
  71. * @type: EEPROM access type (read or write)
  72. * @idx: number of the EEPROM page
  73. * @page: Data to write or buffer to store result (via page->data)
  74. *
  75. * This function does all of the low-level work required to perform a
  76. * EEPROM access. This includes formatting correct command payload,
  77. * sending it and checking received results.
  78. *
  79. * Returns zero in case of success or negative error code in
  80. * case of failure.
  81. */
  82. static int rave_sp_eeprom_io(struct rave_sp_eeprom *eeprom,
  83. enum rave_sp_eeprom_access_type type,
  84. u16 idx,
  85. struct rave_sp_eeprom_page *page)
  86. {
  87. const bool is_write = type == RAVE_SP_EEPROM_WRITE;
  88. const unsigned int data_size = is_write ? sizeof(page->data) : 0;
  89. const unsigned int cmd_size = eeprom->header_size + data_size;
  90. const unsigned int rsp_size =
  91. is_write ? sizeof(*page) - sizeof(page->data) : sizeof(*page);
  92. unsigned int offset = 0;
  93. u8 cmd[RAVE_SP_EEPROM_HEADER_MAX + sizeof(page->data)];
  94. int ret;
  95. if (WARN_ON(cmd_size > sizeof(cmd)))
  96. return -EINVAL;
  97. cmd[offset++] = eeprom->address;
  98. cmd[offset++] = 0;
  99. cmd[offset++] = type;
  100. cmd[offset++] = idx;
  101. /*
  102. * If there's still room in this command's header it means we
  103. * are talkin to EEPROM that uses 16-bit page numbers and we
  104. * have to specify index's MSB in payload as well.
  105. */
  106. if (offset < eeprom->header_size)
  107. cmd[offset++] = idx >> 8;
  108. /*
  109. * Copy our data to write to command buffer first. In case of
  110. * a read data_size should be zero and memcpy would become a
  111. * no-op
  112. */
  113. memcpy(&cmd[offset], page->data, data_size);
  114. ret = rave_sp_exec(eeprom->sp, cmd, cmd_size, page, rsp_size);
  115. if (ret)
  116. return ret;
  117. if (page->type != type)
  118. return -EPROTO;
  119. if (!page->success)
  120. return -EIO;
  121. return 0;
  122. }
  123. /**
  124. * rave_sp_eeprom_page_access - Access single EEPROM page
  125. *
  126. * @eeprom: EEPROM device to access
  127. * @type: Access type to perform (read or write)
  128. * @offset: Offset within EEPROM to access
  129. * @data: Data buffer
  130. * @data_len: Size of the data buffer
  131. *
  132. * This function performs a generic access to a single page or a
  133. * portion thereof. Requested access MUST NOT cross the EEPROM page
  134. * boundary.
  135. *
  136. * Returns zero in case of success or negative error code in
  137. * case of failure.
  138. */
  139. static int
  140. rave_sp_eeprom_page_access(struct rave_sp_eeprom *eeprom,
  141. enum rave_sp_eeprom_access_type type,
  142. unsigned int offset, u8 *data,
  143. size_t data_len)
  144. {
  145. const unsigned int page_offset = offset % RAVE_SP_EEPROM_PAGE_SIZE;
  146. const unsigned int page_nr = offset / RAVE_SP_EEPROM_PAGE_SIZE;
  147. struct rave_sp_eeprom_page page;
  148. int ret;
  149. /*
  150. * This function will not work if data access we've been asked
  151. * to do is crossing EEPROM page boundary. Normally this
  152. * should never happen and getting here would indicate a bug
  153. * in the code.
  154. */
  155. if (WARN_ON(data_len > sizeof(page.data) - page_offset))
  156. return -EINVAL;
  157. if (type == RAVE_SP_EEPROM_WRITE) {
  158. /*
  159. * If doing a partial write we need to do a read first
  160. * to fill the rest of the page with correct data.
  161. */
  162. if (data_len < RAVE_SP_EEPROM_PAGE_SIZE) {
  163. ret = rave_sp_eeprom_io(eeprom, RAVE_SP_EEPROM_READ,
  164. page_nr, &page);
  165. if (ret)
  166. return ret;
  167. }
  168. memcpy(&page.data[page_offset], data, data_len);
  169. }
  170. ret = rave_sp_eeprom_io(eeprom, type, page_nr, &page);
  171. if (ret)
  172. return ret;
  173. /*
  174. * Since we receive the result of the read via 'page.data'
  175. * buffer we need to copy that to 'data'
  176. */
  177. if (type == RAVE_SP_EEPROM_READ)
  178. memcpy(data, &page.data[page_offset], data_len);
  179. return 0;
  180. }
  181. /**
  182. * rave_sp_eeprom_access - Access EEPROM data
  183. *
  184. * @eeprom: EEPROM device to access
  185. * @type: Access type to perform (read or write)
  186. * @offset: Offset within EEPROM to access
  187. * @data: Data buffer
  188. * @data_len: Size of the data buffer
  189. *
  190. * This function performs a generic access (either read or write) at
  191. * arbitrary offset (not necessary page aligned) of arbitrary length
  192. * (is not constrained by EEPROM page size).
  193. *
  194. * Returns zero in case of success or negative error code in case of
  195. * failure.
  196. */
  197. static int rave_sp_eeprom_access(struct rave_sp_eeprom *eeprom,
  198. enum rave_sp_eeprom_access_type type,
  199. unsigned int offset, u8 *data,
  200. unsigned int data_len)
  201. {
  202. unsigned int residue;
  203. unsigned int chunk;
  204. unsigned int head;
  205. int ret;
  206. mutex_lock(&eeprom->mutex);
  207. head = offset % RAVE_SP_EEPROM_PAGE_SIZE;
  208. residue = data_len;
  209. do {
  210. /*
  211. * First iteration, if we are doing an access that is
  212. * not 32-byte aligned, we need to access only data up
  213. * to a page boundary to avoid corssing it in
  214. * rave_sp_eeprom_page_access()
  215. */
  216. if (unlikely(head)) {
  217. chunk = RAVE_SP_EEPROM_PAGE_SIZE - head;
  218. /*
  219. * This can only happen once per
  220. * rave_sp_eeprom_access() call, so we set
  221. * head to zero to process all the other
  222. * iterations normally.
  223. */
  224. head = 0;
  225. } else {
  226. chunk = RAVE_SP_EEPROM_PAGE_SIZE;
  227. }
  228. /*
  229. * We should never read more that 'residue' bytes
  230. */
  231. chunk = min(chunk, residue);
  232. ret = rave_sp_eeprom_page_access(eeprom, type, offset,
  233. data, chunk);
  234. if (ret)
  235. goto out;
  236. residue -= chunk;
  237. offset += chunk;
  238. data += chunk;
  239. } while (residue);
  240. out:
  241. mutex_unlock(&eeprom->mutex);
  242. return ret;
  243. }
  244. static int rave_sp_eeprom_reg_read(void *eeprom, unsigned int offset,
  245. void *val, size_t bytes)
  246. {
  247. return rave_sp_eeprom_access(eeprom, RAVE_SP_EEPROM_READ,
  248. offset, val, bytes);
  249. }
  250. static int rave_sp_eeprom_reg_write(void *eeprom, unsigned int offset,
  251. void *val, size_t bytes)
  252. {
  253. return rave_sp_eeprom_access(eeprom, RAVE_SP_EEPROM_WRITE,
  254. offset, val, bytes);
  255. }
  256. static int rave_sp_eeprom_probe(struct platform_device *pdev)
  257. {
  258. struct device *dev = &pdev->dev;
  259. struct rave_sp *sp = dev_get_drvdata(dev->parent);
  260. struct device_node *np = dev->of_node;
  261. struct nvmem_config config = { 0 };
  262. struct rave_sp_eeprom *eeprom;
  263. struct nvmem_device *nvmem;
  264. u32 reg[2], size;
  265. if (of_property_read_u32_array(np, "reg", reg, ARRAY_SIZE(reg))) {
  266. dev_err(dev, "Failed to parse \"reg\" property\n");
  267. return -EINVAL;
  268. }
  269. size = reg[1];
  270. /*
  271. * Per ICD, we have no more than 2 bytes to specify EEPROM
  272. * page.
  273. */
  274. if (size > U16_MAX * RAVE_SP_EEPROM_PAGE_SIZE) {
  275. dev_err(dev, "Specified size is too big\n");
  276. return -EINVAL;
  277. }
  278. eeprom = devm_kzalloc(dev, sizeof(*eeprom), GFP_KERNEL);
  279. if (!eeprom)
  280. return -ENOMEM;
  281. eeprom->address = reg[0];
  282. eeprom->sp = sp;
  283. eeprom->dev = dev;
  284. if (size > SZ_8K)
  285. eeprom->header_size = RAVE_SP_EEPROM_HEADER_BIG;
  286. else
  287. eeprom->header_size = RAVE_SP_EEPROM_HEADER_SMALL;
  288. mutex_init(&eeprom->mutex);
  289. config.id = -1;
  290. of_property_read_string(np, "zii,eeprom-name", &config.name);
  291. config.priv = eeprom;
  292. config.dev = dev;
  293. config.size = size;
  294. config.reg_read = rave_sp_eeprom_reg_read;
  295. config.reg_write = rave_sp_eeprom_reg_write;
  296. config.word_size = 1;
  297. config.stride = 1;
  298. nvmem = devm_nvmem_register(dev, &config);
  299. return PTR_ERR_OR_ZERO(nvmem);
  300. }
  301. static const struct of_device_id rave_sp_eeprom_of_match[] = {
  302. { .compatible = "zii,rave-sp-eeprom" },
  303. {}
  304. };
  305. MODULE_DEVICE_TABLE(of, rave_sp_eeprom_of_match);
  306. static struct platform_driver rave_sp_eeprom_driver = {
  307. .probe = rave_sp_eeprom_probe,
  308. .driver = {
  309. .name = KBUILD_MODNAME,
  310. .of_match_table = rave_sp_eeprom_of_match,
  311. },
  312. };
  313. module_platform_driver(rave_sp_eeprom_driver);
  314. MODULE_LICENSE("GPL");
  315. MODULE_AUTHOR("Andrey Vostrikov <andrey.vostrikov@cogentembedded.com>");
  316. MODULE_AUTHOR("Nikita Yushchenko <nikita.yoush@cogentembedded.com>");
  317. MODULE_AUTHOR("Andrey Smirnov <andrew.smirnov@gmail.com>");
  318. MODULE_DESCRIPTION("RAVE SP EEPROM driver");