tmio_mmc_core.c 32 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Driver for the MMC / SD / SDIO IP found in:
  4. *
  5. * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
  6. *
  7. * Copyright (C) 2015-19 Renesas Electronics Corporation
  8. * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
  9. * Copyright (C) 2017 Horms Solutions, Simon Horman
  10. * Copyright (C) 2011 Guennadi Liakhovetski
  11. * Copyright (C) 2007 Ian Molton
  12. * Copyright (C) 2004 Ian Molton
  13. *
  14. * This driver draws mainly on scattered spec sheets, Reverse engineering
  15. * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
  16. * support). (Further 4 bit support from a later datasheet).
  17. *
  18. * TODO:
  19. * Investigate using a workqueue for PIO transfers
  20. * Eliminate FIXMEs
  21. * Better Power management
  22. * Handle MMC errors better
  23. * double buffer support
  24. *
  25. */
  26. #include <linux/delay.h>
  27. #include <linux/device.h>
  28. #include <linux/dma-mapping.h>
  29. #include <linux/highmem.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/io.h>
  32. #include <linux/irq.h>
  33. #include <linux/mfd/tmio.h>
  34. #include <linux/mmc/card.h>
  35. #include <linux/mmc/host.h>
  36. #include <linux/mmc/mmc.h>
  37. #include <linux/mmc/slot-gpio.h>
  38. #include <linux/module.h>
  39. #include <linux/pagemap.h>
  40. #include <linux/platform_device.h>
  41. #include <linux/pm_qos.h>
  42. #include <linux/pm_runtime.h>
  43. #include <linux/regulator/consumer.h>
  44. #include <linux/mmc/sdio.h>
  45. #include <linux/scatterlist.h>
  46. #include <linux/sizes.h>
  47. #include <linux/spinlock.h>
  48. #include <linux/workqueue.h>
  49. #include "tmio_mmc.h"
  50. static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
  51. struct mmc_data *data)
  52. {
  53. if (host->dma_ops)
  54. host->dma_ops->start(host, data);
  55. }
  56. static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host)
  57. {
  58. if (host->dma_ops && host->dma_ops->end)
  59. host->dma_ops->end(host);
  60. }
  61. static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
  62. {
  63. if (host->dma_ops)
  64. host->dma_ops->enable(host, enable);
  65. }
  66. static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
  67. struct tmio_mmc_data *pdata)
  68. {
  69. if (host->dma_ops) {
  70. host->dma_ops->request(host, pdata);
  71. } else {
  72. host->chan_tx = NULL;
  73. host->chan_rx = NULL;
  74. }
  75. }
  76. static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
  77. {
  78. if (host->dma_ops)
  79. host->dma_ops->release(host);
  80. }
  81. static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
  82. {
  83. if (host->dma_ops)
  84. host->dma_ops->abort(host);
  85. }
  86. static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
  87. {
  88. if (host->dma_ops)
  89. host->dma_ops->dataend(host);
  90. }
  91. void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
  92. {
  93. host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
  94. sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
  95. }
  96. EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
  97. void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
  98. {
  99. host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
  100. sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
  101. }
  102. EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
  103. static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
  104. {
  105. sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
  106. }
  107. static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
  108. {
  109. host->sg_len = data->sg_len;
  110. host->sg_ptr = data->sg;
  111. host->sg_orig = data->sg;
  112. host->sg_off = 0;
  113. }
  114. static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
  115. {
  116. host->sg_ptr = sg_next(host->sg_ptr);
  117. host->sg_off = 0;
  118. return --host->sg_len;
  119. }
  120. #define CMDREQ_TIMEOUT 5000
  121. static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
  122. {
  123. struct tmio_mmc_host *host = mmc_priv(mmc);
  124. if (enable && !host->sdio_irq_enabled) {
  125. u16 sdio_status;
  126. /* Keep device active while SDIO irq is enabled */
  127. pm_runtime_get_sync(mmc_dev(mmc));
  128. host->sdio_irq_enabled = true;
  129. host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
  130. /* Clear obsolete interrupts before enabling */
  131. sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
  132. if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
  133. sdio_status |= TMIO_SDIO_SETBITS_MASK;
  134. sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
  135. sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
  136. } else if (!enable && host->sdio_irq_enabled) {
  137. host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
  138. sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
  139. host->sdio_irq_enabled = false;
  140. pm_runtime_mark_last_busy(mmc_dev(mmc));
  141. pm_runtime_put_autosuspend(mmc_dev(mmc));
  142. }
  143. }
  144. static void tmio_mmc_reset(struct tmio_mmc_host *host)
  145. {
  146. /* FIXME - should we set stop clock reg here */
  147. sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
  148. usleep_range(10000, 11000);
  149. sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
  150. usleep_range(10000, 11000);
  151. if (host->reset)
  152. host->reset(host);
  153. tmio_mmc_abort_dma(host);
  154. if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
  155. sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
  156. sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
  157. }
  158. }
  159. static void tmio_mmc_reset_work(struct work_struct *work)
  160. {
  161. struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
  162. delayed_reset_work.work);
  163. struct mmc_request *mrq;
  164. unsigned long flags;
  165. spin_lock_irqsave(&host->lock, flags);
  166. mrq = host->mrq;
  167. /*
  168. * is request already finished? Since we use a non-blocking
  169. * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
  170. * us, so, have to check for IS_ERR(host->mrq)
  171. */
  172. if (IS_ERR_OR_NULL(mrq) ||
  173. time_is_after_jiffies(host->last_req_ts +
  174. msecs_to_jiffies(CMDREQ_TIMEOUT))) {
  175. spin_unlock_irqrestore(&host->lock, flags);
  176. return;
  177. }
  178. dev_warn(&host->pdev->dev,
  179. "timeout waiting for hardware interrupt (CMD%u)\n",
  180. mrq->cmd->opcode);
  181. if (host->data)
  182. host->data->error = -ETIMEDOUT;
  183. else if (host->cmd)
  184. host->cmd->error = -ETIMEDOUT;
  185. else
  186. mrq->cmd->error = -ETIMEDOUT;
  187. host->cmd = NULL;
  188. host->data = NULL;
  189. spin_unlock_irqrestore(&host->lock, flags);
  190. tmio_mmc_reset(host);
  191. /* Ready for new calls */
  192. host->mrq = NULL;
  193. mmc_request_done(host->mmc, mrq);
  194. }
  195. /* These are the bitmasks the tmio chip requires to implement the MMC response
  196. * types. Note that R1 and R6 are the same in this scheme. */
  197. #define APP_CMD 0x0040
  198. #define RESP_NONE 0x0300
  199. #define RESP_R1 0x0400
  200. #define RESP_R1B 0x0500
  201. #define RESP_R2 0x0600
  202. #define RESP_R3 0x0700
  203. #define DATA_PRESENT 0x0800
  204. #define TRANSFER_READ 0x1000
  205. #define TRANSFER_MULTI 0x2000
  206. #define SECURITY_CMD 0x4000
  207. #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
  208. static int tmio_mmc_start_command(struct tmio_mmc_host *host,
  209. struct mmc_command *cmd)
  210. {
  211. struct mmc_data *data = host->data;
  212. int c = cmd->opcode;
  213. switch (mmc_resp_type(cmd)) {
  214. case MMC_RSP_NONE: c |= RESP_NONE; break;
  215. case MMC_RSP_R1:
  216. case MMC_RSP_R1_NO_CRC:
  217. c |= RESP_R1; break;
  218. case MMC_RSP_R1B: c |= RESP_R1B; break;
  219. case MMC_RSP_R2: c |= RESP_R2; break;
  220. case MMC_RSP_R3: c |= RESP_R3; break;
  221. default:
  222. pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
  223. return -EINVAL;
  224. }
  225. host->cmd = cmd;
  226. /* FIXME - this seems to be ok commented out but the spec suggest this bit
  227. * should be set when issuing app commands.
  228. * if(cmd->flags & MMC_FLAG_ACMD)
  229. * c |= APP_CMD;
  230. */
  231. if (data) {
  232. c |= DATA_PRESENT;
  233. if (data->blocks > 1) {
  234. sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
  235. c |= TRANSFER_MULTI;
  236. /*
  237. * Disable auto CMD12 at IO_RW_EXTENDED and
  238. * SET_BLOCK_COUNT when doing multiple block transfer
  239. */
  240. if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
  241. (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
  242. c |= NO_CMD12_ISSUE;
  243. }
  244. if (data->flags & MMC_DATA_READ)
  245. c |= TRANSFER_READ;
  246. }
  247. tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
  248. /* Fire off the command */
  249. sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
  250. sd_ctrl_write16(host, CTL_SD_CMD, c);
  251. return 0;
  252. }
  253. static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
  254. unsigned short *buf,
  255. unsigned int count)
  256. {
  257. int is_read = host->data->flags & MMC_DATA_READ;
  258. u8 *buf8;
  259. /*
  260. * Transfer the data
  261. */
  262. if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
  263. u32 data = 0;
  264. u32 *buf32 = (u32 *)buf;
  265. if (is_read)
  266. sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
  267. count >> 2);
  268. else
  269. sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
  270. count >> 2);
  271. /* if count was multiple of 4 */
  272. if (!(count & 0x3))
  273. return;
  274. buf32 += count >> 2;
  275. count %= 4;
  276. if (is_read) {
  277. sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
  278. memcpy(buf32, &data, count);
  279. } else {
  280. memcpy(&data, buf32, count);
  281. sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
  282. }
  283. return;
  284. }
  285. if (is_read)
  286. sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
  287. else
  288. sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
  289. /* if count was even number */
  290. if (!(count & 0x1))
  291. return;
  292. /* if count was odd number */
  293. buf8 = (u8 *)(buf + (count >> 1));
  294. /*
  295. * FIXME
  296. *
  297. * driver and this function are assuming that
  298. * it is used as little endian
  299. */
  300. if (is_read)
  301. *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
  302. else
  303. sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
  304. }
  305. /*
  306. * This chip always returns (at least?) as much data as you ask for.
  307. * I'm unsure what happens if you ask for less than a block. This should be
  308. * looked into to ensure that a funny length read doesn't hose the controller.
  309. */
  310. static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
  311. {
  312. struct mmc_data *data = host->data;
  313. void *sg_virt;
  314. unsigned short *buf;
  315. unsigned int count;
  316. unsigned long flags;
  317. if (host->dma_on) {
  318. pr_err("PIO IRQ in DMA mode!\n");
  319. return;
  320. } else if (!data) {
  321. pr_debug("Spurious PIO IRQ\n");
  322. return;
  323. }
  324. sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
  325. buf = (unsigned short *)(sg_virt + host->sg_off);
  326. count = host->sg_ptr->length - host->sg_off;
  327. if (count > data->blksz)
  328. count = data->blksz;
  329. pr_debug("count: %08x offset: %08x flags %08x\n",
  330. count, host->sg_off, data->flags);
  331. /* Transfer the data */
  332. tmio_mmc_transfer_data(host, buf, count);
  333. host->sg_off += count;
  334. tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
  335. if (host->sg_off == host->sg_ptr->length)
  336. tmio_mmc_next_sg(host);
  337. }
  338. static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
  339. {
  340. if (host->sg_ptr == &host->bounce_sg) {
  341. unsigned long flags;
  342. void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
  343. memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
  344. tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
  345. }
  346. }
  347. /* needs to be called with host->lock held */
  348. void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
  349. {
  350. struct mmc_data *data = host->data;
  351. struct mmc_command *stop;
  352. host->data = NULL;
  353. if (!data) {
  354. dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
  355. return;
  356. }
  357. stop = data->stop;
  358. /* FIXME - return correct transfer count on errors */
  359. if (!data->error)
  360. data->bytes_xfered = data->blocks * data->blksz;
  361. else
  362. data->bytes_xfered = 0;
  363. pr_debug("Completed data request\n");
  364. /*
  365. * FIXME: other drivers allow an optional stop command of any given type
  366. * which we dont do, as the chip can auto generate them.
  367. * Perhaps we can be smarter about when to use auto CMD12 and
  368. * only issue the auto request when we know this is the desired
  369. * stop command, allowing fallback to the stop command the
  370. * upper layers expect. For now, we do what works.
  371. */
  372. if (data->flags & MMC_DATA_READ) {
  373. if (host->dma_on)
  374. tmio_mmc_check_bounce_buffer(host);
  375. dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
  376. host->mrq);
  377. } else {
  378. dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
  379. host->mrq);
  380. }
  381. if (stop && !host->mrq->sbc) {
  382. if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
  383. dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
  384. stop->opcode, stop->arg);
  385. /* fill in response from auto CMD12 */
  386. stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
  387. sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
  388. }
  389. schedule_work(&host->done);
  390. }
  391. EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
  392. static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
  393. {
  394. struct mmc_data *data;
  395. spin_lock(&host->lock);
  396. data = host->data;
  397. if (!data)
  398. goto out;
  399. if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
  400. stat & TMIO_STAT_TXUNDERRUN)
  401. data->error = -EILSEQ;
  402. if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
  403. u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
  404. bool done = false;
  405. /*
  406. * Has all data been written out yet? Testing on SuperH showed,
  407. * that in most cases the first interrupt comes already with the
  408. * BUSY status bit clear, but on some operations, like mount or
  409. * in the beginning of a write / sync / umount, there is one
  410. * DATAEND interrupt with the BUSY bit set, in this cases
  411. * waiting for one more interrupt fixes the problem.
  412. */
  413. if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
  414. if (status & TMIO_STAT_SCLKDIVEN)
  415. done = true;
  416. } else {
  417. if (!(status & TMIO_STAT_CMD_BUSY))
  418. done = true;
  419. }
  420. if (done) {
  421. tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
  422. tmio_mmc_dataend_dma(host);
  423. }
  424. } else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
  425. tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
  426. tmio_mmc_dataend_dma(host);
  427. } else {
  428. tmio_mmc_do_data_irq(host);
  429. tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
  430. }
  431. out:
  432. spin_unlock(&host->lock);
  433. }
  434. static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
  435. {
  436. struct mmc_command *cmd = host->cmd;
  437. int i, addr;
  438. spin_lock(&host->lock);
  439. if (!host->cmd) {
  440. pr_debug("Spurious CMD irq\n");
  441. goto out;
  442. }
  443. /* This controller is sicker than the PXA one. Not only do we need to
  444. * drop the top 8 bits of the first response word, we also need to
  445. * modify the order of the response for short response command types.
  446. */
  447. for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
  448. cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
  449. if (cmd->flags & MMC_RSP_136) {
  450. cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
  451. cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
  452. cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
  453. cmd->resp[3] <<= 8;
  454. } else if (cmd->flags & MMC_RSP_R3) {
  455. cmd->resp[0] = cmd->resp[3];
  456. }
  457. if (stat & TMIO_STAT_CMDTIMEOUT)
  458. cmd->error = -ETIMEDOUT;
  459. else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
  460. stat & TMIO_STAT_STOPBIT_ERR ||
  461. stat & TMIO_STAT_CMD_IDX_ERR)
  462. cmd->error = -EILSEQ;
  463. /* If there is data to handle we enable data IRQs here, and
  464. * we will ultimatley finish the request in the data_end handler.
  465. * If theres no data or we encountered an error, finish now.
  466. */
  467. if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
  468. if (host->data->flags & MMC_DATA_READ) {
  469. if (!host->dma_on) {
  470. tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
  471. } else {
  472. tmio_mmc_disable_mmc_irqs(host,
  473. TMIO_MASK_READOP);
  474. tasklet_schedule(&host->dma_issue);
  475. }
  476. } else {
  477. if (!host->dma_on) {
  478. tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
  479. } else {
  480. tmio_mmc_disable_mmc_irqs(host,
  481. TMIO_MASK_WRITEOP);
  482. tasklet_schedule(&host->dma_issue);
  483. }
  484. }
  485. } else {
  486. schedule_work(&host->done);
  487. }
  488. out:
  489. spin_unlock(&host->lock);
  490. }
  491. static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
  492. int ireg, int status)
  493. {
  494. struct mmc_host *mmc = host->mmc;
  495. /* Card insert / remove attempts */
  496. if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
  497. tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
  498. TMIO_STAT_CARD_REMOVE);
  499. if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
  500. ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
  501. !work_pending(&mmc->detect.work))
  502. mmc_detect_change(host->mmc, msecs_to_jiffies(100));
  503. return true;
  504. }
  505. return false;
  506. }
  507. static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
  508. int status)
  509. {
  510. /* Command completion */
  511. if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
  512. tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
  513. TMIO_STAT_CMDTIMEOUT);
  514. tmio_mmc_cmd_irq(host, status);
  515. return true;
  516. }
  517. /* Data transfer */
  518. if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
  519. tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
  520. tmio_mmc_pio_irq(host);
  521. return true;
  522. }
  523. /* Data transfer completion */
  524. if (ireg & TMIO_STAT_DATAEND) {
  525. tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
  526. tmio_mmc_data_irq(host, status);
  527. return true;
  528. }
  529. return false;
  530. }
  531. static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
  532. {
  533. struct mmc_host *mmc = host->mmc;
  534. struct tmio_mmc_data *pdata = host->pdata;
  535. unsigned int ireg, status;
  536. unsigned int sdio_status;
  537. if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
  538. return false;
  539. status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
  540. ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
  541. sdio_status = status & ~TMIO_SDIO_MASK_ALL;
  542. if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
  543. sdio_status |= TMIO_SDIO_SETBITS_MASK;
  544. sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
  545. if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
  546. mmc_signal_sdio_irq(mmc);
  547. return ireg;
  548. }
  549. irqreturn_t tmio_mmc_irq(int irq, void *devid)
  550. {
  551. struct tmio_mmc_host *host = devid;
  552. unsigned int ireg, status;
  553. status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
  554. ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
  555. /* Clear the status except the interrupt status */
  556. sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
  557. if (__tmio_mmc_card_detect_irq(host, ireg, status))
  558. return IRQ_HANDLED;
  559. if (__tmio_mmc_sdcard_irq(host, ireg, status))
  560. return IRQ_HANDLED;
  561. if (__tmio_mmc_sdio_irq(host))
  562. return IRQ_HANDLED;
  563. return IRQ_NONE;
  564. }
  565. EXPORT_SYMBOL_GPL(tmio_mmc_irq);
  566. static int tmio_mmc_start_data(struct tmio_mmc_host *host,
  567. struct mmc_data *data)
  568. {
  569. struct tmio_mmc_data *pdata = host->pdata;
  570. pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
  571. data->blksz, data->blocks);
  572. /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
  573. if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
  574. host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
  575. int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
  576. if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
  577. pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
  578. mmc_hostname(host->mmc), data->blksz);
  579. return -EINVAL;
  580. }
  581. }
  582. tmio_mmc_init_sg(host, data);
  583. host->data = data;
  584. host->dma_on = false;
  585. /* Set transfer length / blocksize */
  586. sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
  587. if (host->mmc->max_blk_count >= SZ_64K)
  588. sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
  589. else
  590. sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
  591. tmio_mmc_start_dma(host, data);
  592. return 0;
  593. }
  594. static void tmio_process_mrq(struct tmio_mmc_host *host,
  595. struct mmc_request *mrq)
  596. {
  597. struct mmc_command *cmd;
  598. int ret;
  599. if (mrq->sbc && host->cmd != mrq->sbc) {
  600. cmd = mrq->sbc;
  601. } else {
  602. cmd = mrq->cmd;
  603. if (mrq->data) {
  604. ret = tmio_mmc_start_data(host, mrq->data);
  605. if (ret)
  606. goto fail;
  607. }
  608. }
  609. ret = tmio_mmc_start_command(host, cmd);
  610. if (ret)
  611. goto fail;
  612. schedule_delayed_work(&host->delayed_reset_work,
  613. msecs_to_jiffies(CMDREQ_TIMEOUT));
  614. return;
  615. fail:
  616. host->mrq = NULL;
  617. mrq->cmd->error = ret;
  618. mmc_request_done(host->mmc, mrq);
  619. }
  620. /* Process requests from the MMC layer */
  621. static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
  622. {
  623. struct tmio_mmc_host *host = mmc_priv(mmc);
  624. unsigned long flags;
  625. spin_lock_irqsave(&host->lock, flags);
  626. if (host->mrq) {
  627. pr_debug("request not null\n");
  628. if (IS_ERR(host->mrq)) {
  629. spin_unlock_irqrestore(&host->lock, flags);
  630. mrq->cmd->error = -EAGAIN;
  631. mmc_request_done(mmc, mrq);
  632. return;
  633. }
  634. }
  635. host->last_req_ts = jiffies;
  636. wmb();
  637. host->mrq = mrq;
  638. spin_unlock_irqrestore(&host->lock, flags);
  639. tmio_process_mrq(host, mrq);
  640. }
  641. static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
  642. {
  643. struct mmc_request *mrq;
  644. unsigned long flags;
  645. spin_lock_irqsave(&host->lock, flags);
  646. tmio_mmc_end_dma(host);
  647. mrq = host->mrq;
  648. if (IS_ERR_OR_NULL(mrq)) {
  649. spin_unlock_irqrestore(&host->lock, flags);
  650. return;
  651. }
  652. /* If not SET_BLOCK_COUNT, clear old data */
  653. if (host->cmd != mrq->sbc) {
  654. host->cmd = NULL;
  655. host->data = NULL;
  656. host->mrq = NULL;
  657. }
  658. cancel_delayed_work(&host->delayed_reset_work);
  659. spin_unlock_irqrestore(&host->lock, flags);
  660. if (mrq->cmd->error || (mrq->data && mrq->data->error))
  661. tmio_mmc_abort_dma(host);
  662. /* Error means retune, but executed command was still successful */
  663. if (host->check_retune && host->check_retune(host))
  664. mmc_retune_needed(host->mmc);
  665. /* If SET_BLOCK_COUNT, continue with main command */
  666. if (host->mrq && !mrq->cmd->error) {
  667. tmio_process_mrq(host, mrq);
  668. return;
  669. }
  670. if (host->fixup_request)
  671. host->fixup_request(host, mrq);
  672. mmc_request_done(host->mmc, mrq);
  673. }
  674. static void tmio_mmc_done_work(struct work_struct *work)
  675. {
  676. struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
  677. done);
  678. tmio_mmc_finish_request(host);
  679. }
  680. static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
  681. {
  682. struct mmc_host *mmc = host->mmc;
  683. int ret = 0;
  684. /* .set_ios() is returning void, so, no chance to report an error */
  685. if (host->set_pwr)
  686. host->set_pwr(host->pdev, 1);
  687. if (!IS_ERR(mmc->supply.vmmc)) {
  688. ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
  689. /*
  690. * Attention: empiric value. With a b43 WiFi SDIO card this
  691. * delay proved necessary for reliable card-insertion probing.
  692. * 100us were not enough. Is this the same 140us delay, as in
  693. * tmio_mmc_set_ios()?
  694. */
  695. usleep_range(200, 300);
  696. }
  697. /*
  698. * It seems, VccQ should be switched on after Vcc, this is also what the
  699. * omap_hsmmc.c driver does.
  700. */
  701. if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
  702. ret = regulator_enable(mmc->supply.vqmmc);
  703. usleep_range(200, 300);
  704. }
  705. if (ret < 0)
  706. dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
  707. ret);
  708. }
  709. static void tmio_mmc_power_off(struct tmio_mmc_host *host)
  710. {
  711. struct mmc_host *mmc = host->mmc;
  712. if (!IS_ERR(mmc->supply.vqmmc))
  713. regulator_disable(mmc->supply.vqmmc);
  714. if (!IS_ERR(mmc->supply.vmmc))
  715. mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
  716. if (host->set_pwr)
  717. host->set_pwr(host->pdev, 0);
  718. }
  719. static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
  720. unsigned char bus_width)
  721. {
  722. u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
  723. & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
  724. /* reg now applies to MMC_BUS_WIDTH_4 */
  725. if (bus_width == MMC_BUS_WIDTH_1)
  726. reg |= CARD_OPT_WIDTH;
  727. else if (bus_width == MMC_BUS_WIDTH_8)
  728. reg |= CARD_OPT_WIDTH8;
  729. sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
  730. }
  731. /* Set MMC clock / power.
  732. * Note: This controller uses a simple divider scheme therefore it cannot
  733. * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
  734. * MMC wont run that fast, it has to be clocked at 12MHz which is the next
  735. * slowest setting.
  736. */
  737. static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
  738. {
  739. struct tmio_mmc_host *host = mmc_priv(mmc);
  740. struct device *dev = &host->pdev->dev;
  741. unsigned long flags;
  742. mutex_lock(&host->ios_lock);
  743. spin_lock_irqsave(&host->lock, flags);
  744. if (host->mrq) {
  745. if (IS_ERR(host->mrq)) {
  746. dev_dbg(dev,
  747. "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
  748. current->comm, task_pid_nr(current),
  749. ios->clock, ios->power_mode);
  750. host->mrq = ERR_PTR(-EINTR);
  751. } else {
  752. dev_dbg(dev,
  753. "%s.%d: CMD%u active since %lu, now %lu!\n",
  754. current->comm, task_pid_nr(current),
  755. host->mrq->cmd->opcode, host->last_req_ts,
  756. jiffies);
  757. }
  758. spin_unlock_irqrestore(&host->lock, flags);
  759. mutex_unlock(&host->ios_lock);
  760. return;
  761. }
  762. host->mrq = ERR_PTR(-EBUSY);
  763. spin_unlock_irqrestore(&host->lock, flags);
  764. switch (ios->power_mode) {
  765. case MMC_POWER_OFF:
  766. tmio_mmc_power_off(host);
  767. /* For R-Car Gen2+, we need to reset SDHI specific SCC */
  768. if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
  769. host->reset(host);
  770. host->set_clock(host, 0);
  771. break;
  772. case MMC_POWER_UP:
  773. tmio_mmc_power_on(host, ios->vdd);
  774. host->set_clock(host, ios->clock);
  775. tmio_mmc_set_bus_width(host, ios->bus_width);
  776. break;
  777. case MMC_POWER_ON:
  778. host->set_clock(host, ios->clock);
  779. tmio_mmc_set_bus_width(host, ios->bus_width);
  780. break;
  781. }
  782. /* Let things settle. delay taken from winCE driver */
  783. usleep_range(140, 200);
  784. if (PTR_ERR(host->mrq) == -EINTR)
  785. dev_dbg(&host->pdev->dev,
  786. "%s.%d: IOS interrupted: clk %u, mode %u",
  787. current->comm, task_pid_nr(current),
  788. ios->clock, ios->power_mode);
  789. host->mrq = NULL;
  790. host->clk_cache = ios->clock;
  791. mutex_unlock(&host->ios_lock);
  792. }
  793. static int tmio_mmc_get_ro(struct mmc_host *mmc)
  794. {
  795. struct tmio_mmc_host *host = mmc_priv(mmc);
  796. return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
  797. TMIO_STAT_WRPROTECT);
  798. }
  799. static int tmio_mmc_get_cd(struct mmc_host *mmc)
  800. {
  801. struct tmio_mmc_host *host = mmc_priv(mmc);
  802. return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
  803. TMIO_STAT_SIGSTATE);
  804. }
  805. static int tmio_multi_io_quirk(struct mmc_card *card,
  806. unsigned int direction, int blk_size)
  807. {
  808. struct tmio_mmc_host *host = mmc_priv(card->host);
  809. if (host->multi_io_quirk)
  810. return host->multi_io_quirk(card, direction, blk_size);
  811. return blk_size;
  812. }
  813. static struct mmc_host_ops tmio_mmc_ops = {
  814. .request = tmio_mmc_request,
  815. .set_ios = tmio_mmc_set_ios,
  816. .get_ro = tmio_mmc_get_ro,
  817. .get_cd = tmio_mmc_get_cd,
  818. .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
  819. .multi_io_quirk = tmio_multi_io_quirk,
  820. };
  821. static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
  822. {
  823. struct tmio_mmc_data *pdata = host->pdata;
  824. struct mmc_host *mmc = host->mmc;
  825. int err;
  826. err = mmc_regulator_get_supply(mmc);
  827. if (err)
  828. return err;
  829. /* use ocr_mask if no regulator */
  830. if (!mmc->ocr_avail)
  831. mmc->ocr_avail = pdata->ocr_mask;
  832. /*
  833. * try again.
  834. * There is possibility that regulator has not been probed
  835. */
  836. if (!mmc->ocr_avail)
  837. return -EPROBE_DEFER;
  838. return 0;
  839. }
  840. static void tmio_mmc_of_parse(struct platform_device *pdev,
  841. struct mmc_host *mmc)
  842. {
  843. const struct device_node *np = pdev->dev.of_node;
  844. if (!np)
  845. return;
  846. /*
  847. * DEPRECATED:
  848. * For new platforms, please use "disable-wp" instead of
  849. * "toshiba,mmc-wrprotect-disable"
  850. */
  851. if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
  852. mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
  853. }
  854. struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
  855. struct tmio_mmc_data *pdata)
  856. {
  857. struct tmio_mmc_host *host;
  858. struct mmc_host *mmc;
  859. void __iomem *ctl;
  860. int ret;
  861. ctl = devm_platform_ioremap_resource(pdev, 0);
  862. if (IS_ERR(ctl))
  863. return ERR_CAST(ctl);
  864. mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
  865. if (!mmc)
  866. return ERR_PTR(-ENOMEM);
  867. host = mmc_priv(mmc);
  868. host->ctl = ctl;
  869. host->mmc = mmc;
  870. host->pdev = pdev;
  871. host->pdata = pdata;
  872. host->ops = tmio_mmc_ops;
  873. mmc->ops = &host->ops;
  874. ret = mmc_of_parse(host->mmc);
  875. if (ret) {
  876. host = ERR_PTR(ret);
  877. goto free;
  878. }
  879. tmio_mmc_of_parse(pdev, mmc);
  880. platform_set_drvdata(pdev, host);
  881. return host;
  882. free:
  883. mmc_free_host(mmc);
  884. return host;
  885. }
  886. EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
  887. void tmio_mmc_host_free(struct tmio_mmc_host *host)
  888. {
  889. mmc_free_host(host->mmc);
  890. }
  891. EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
  892. int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
  893. {
  894. struct platform_device *pdev = _host->pdev;
  895. struct tmio_mmc_data *pdata = _host->pdata;
  896. struct mmc_host *mmc = _host->mmc;
  897. int ret;
  898. /*
  899. * Check the sanity of mmc->f_min to prevent host->set_clock() from
  900. * looping forever...
  901. */
  902. if (mmc->f_min == 0)
  903. return -EINVAL;
  904. if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
  905. _host->write16_hook = NULL;
  906. _host->set_pwr = pdata->set_pwr;
  907. ret = tmio_mmc_init_ocr(_host);
  908. if (ret < 0)
  909. return ret;
  910. /*
  911. * Look for a card detect GPIO, if it fails with anything
  912. * else than a probe deferral, just live without it.
  913. */
  914. ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0);
  915. if (ret == -EPROBE_DEFER)
  916. return ret;
  917. mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
  918. mmc->caps2 |= pdata->capabilities2;
  919. mmc->max_segs = pdata->max_segs ? : 32;
  920. mmc->max_blk_size = TMIO_MAX_BLK_SIZE;
  921. mmc->max_blk_count = pdata->max_blk_count ? :
  922. (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
  923. mmc->max_req_size = min_t(size_t,
  924. mmc->max_blk_size * mmc->max_blk_count,
  925. dma_max_mapping_size(&pdev->dev));
  926. mmc->max_seg_size = mmc->max_req_size;
  927. if (mmc_can_gpio_ro(mmc))
  928. _host->ops.get_ro = mmc_gpio_get_ro;
  929. if (mmc_can_gpio_cd(mmc))
  930. _host->ops.get_cd = mmc_gpio_get_cd;
  931. _host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
  932. mmc->caps & MMC_CAP_NEEDS_POLL ||
  933. !mmc_card_is_removable(mmc));
  934. /*
  935. * On Gen2+, eMMC with NONREMOVABLE currently fails because native
  936. * hotplug gets disabled. It seems RuntimePM related yet we need further
  937. * research. Since we are planning a PM overhaul anyway, let's enforce
  938. * for now the device being active by enabling native hotplug always.
  939. */
  940. if (pdata->flags & TMIO_MMC_MIN_RCAR2)
  941. _host->native_hotplug = true;
  942. /*
  943. * While using internal tmio hardware logic for card detection, we need
  944. * to ensure it stays powered for it to work.
  945. */
  946. if (_host->native_hotplug)
  947. pm_runtime_get_noresume(&pdev->dev);
  948. _host->sdio_irq_enabled = false;
  949. if (pdata->flags & TMIO_MMC_SDIO_IRQ)
  950. _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
  951. _host->set_clock(_host, 0);
  952. tmio_mmc_reset(_host);
  953. _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
  954. tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
  955. if (_host->native_hotplug)
  956. tmio_mmc_enable_mmc_irqs(_host,
  957. TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
  958. spin_lock_init(&_host->lock);
  959. mutex_init(&_host->ios_lock);
  960. /* Init delayed work for request timeouts */
  961. INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
  962. INIT_WORK(&_host->done, tmio_mmc_done_work);
  963. /* See if we also get DMA */
  964. tmio_mmc_request_dma(_host, pdata);
  965. pm_runtime_get_noresume(&pdev->dev);
  966. pm_runtime_set_active(&pdev->dev);
  967. pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
  968. pm_runtime_use_autosuspend(&pdev->dev);
  969. pm_runtime_enable(&pdev->dev);
  970. ret = mmc_add_host(mmc);
  971. if (ret)
  972. goto remove_host;
  973. dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
  974. pm_runtime_put(&pdev->dev);
  975. return 0;
  976. remove_host:
  977. pm_runtime_put_noidle(&pdev->dev);
  978. tmio_mmc_host_remove(_host);
  979. return ret;
  980. }
  981. EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
  982. void tmio_mmc_host_remove(struct tmio_mmc_host *host)
  983. {
  984. struct platform_device *pdev = host->pdev;
  985. struct mmc_host *mmc = host->mmc;
  986. pm_runtime_get_sync(&pdev->dev);
  987. if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
  988. sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
  989. dev_pm_qos_hide_latency_limit(&pdev->dev);
  990. mmc_remove_host(mmc);
  991. cancel_work_sync(&host->done);
  992. cancel_delayed_work_sync(&host->delayed_reset_work);
  993. tmio_mmc_release_dma(host);
  994. tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
  995. if (host->native_hotplug)
  996. pm_runtime_put_noidle(&pdev->dev);
  997. pm_runtime_disable(&pdev->dev);
  998. pm_runtime_dont_use_autosuspend(&pdev->dev);
  999. pm_runtime_put_noidle(&pdev->dev);
  1000. }
  1001. EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
  1002. #ifdef CONFIG_PM
  1003. static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
  1004. {
  1005. if (!host->clk_enable)
  1006. return -ENOTSUPP;
  1007. return host->clk_enable(host);
  1008. }
  1009. static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
  1010. {
  1011. if (host->clk_disable)
  1012. host->clk_disable(host);
  1013. }
  1014. int tmio_mmc_host_runtime_suspend(struct device *dev)
  1015. {
  1016. struct tmio_mmc_host *host = dev_get_drvdata(dev);
  1017. tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
  1018. if (host->clk_cache)
  1019. host->set_clock(host, 0);
  1020. tmio_mmc_clk_disable(host);
  1021. return 0;
  1022. }
  1023. EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
  1024. int tmio_mmc_host_runtime_resume(struct device *dev)
  1025. {
  1026. struct tmio_mmc_host *host = dev_get_drvdata(dev);
  1027. tmio_mmc_clk_enable(host);
  1028. tmio_mmc_reset(host);
  1029. if (host->clk_cache)
  1030. host->set_clock(host, host->clk_cache);
  1031. if (host->native_hotplug)
  1032. tmio_mmc_enable_mmc_irqs(host,
  1033. TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
  1034. tmio_mmc_enable_dma(host, true);
  1035. mmc_retune_needed(host->mmc);
  1036. return 0;
  1037. }
  1038. EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
  1039. #endif
  1040. MODULE_LICENSE("GPL v2");