sdhci_f_sdh30.c 5.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * linux/drivers/mmc/host/sdhci_f_sdh30.c
  4. *
  5. * Copyright (C) 2013 - 2015 Fujitsu Semiconductor, Ltd
  6. * Vincent Yang <vincent.yang@tw.fujitsu.com>
  7. * Copyright (C) 2015 Linaro Ltd Andy Green <andy.green@linaro.org>
  8. */
  9. #include <linux/acpi.h>
  10. #include <linux/err.h>
  11. #include <linux/delay.h>
  12. #include <linux/module.h>
  13. #include <linux/of.h>
  14. #include <linux/property.h>
  15. #include <linux/clk.h>
  16. #include "sdhci-pltfm.h"
  17. #include "sdhci_f_sdh30.h"
  18. struct f_sdhost_priv {
  19. struct clk *clk_iface;
  20. struct clk *clk;
  21. u32 vendor_hs200;
  22. struct device *dev;
  23. bool enable_cmd_dat_delay;
  24. };
  25. static void sdhci_f_sdh30_soft_voltage_switch(struct sdhci_host *host)
  26. {
  27. struct f_sdhost_priv *priv = sdhci_priv(host);
  28. u32 ctrl = 0;
  29. usleep_range(2500, 3000);
  30. ctrl = sdhci_readl(host, F_SDH30_IO_CONTROL2);
  31. ctrl |= F_SDH30_CRES_O_DN;
  32. sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
  33. ctrl |= F_SDH30_MSEL_O_1_8;
  34. sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
  35. ctrl &= ~F_SDH30_CRES_O_DN;
  36. sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
  37. usleep_range(2500, 3000);
  38. if (priv->vendor_hs200) {
  39. dev_info(priv->dev, "%s: setting hs200\n", __func__);
  40. ctrl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
  41. ctrl |= priv->vendor_hs200;
  42. sdhci_writel(host, ctrl, F_SDH30_ESD_CONTROL);
  43. }
  44. ctrl = sdhci_readl(host, F_SDH30_TUNING_SETTING);
  45. ctrl |= F_SDH30_CMD_CHK_DIS;
  46. sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING);
  47. }
  48. static unsigned int sdhci_f_sdh30_get_min_clock(struct sdhci_host *host)
  49. {
  50. return F_SDH30_MIN_CLOCK;
  51. }
  52. static void sdhci_f_sdh30_reset(struct sdhci_host *host, u8 mask)
  53. {
  54. struct f_sdhost_priv *priv = sdhci_priv(host);
  55. u32 ctl;
  56. if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0)
  57. sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL);
  58. sdhci_reset(host, mask);
  59. if (priv->enable_cmd_dat_delay) {
  60. ctl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
  61. ctl |= F_SDH30_CMD_DAT_DELAY;
  62. sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL);
  63. }
  64. }
  65. static const struct sdhci_ops sdhci_f_sdh30_ops = {
  66. .voltage_switch = sdhci_f_sdh30_soft_voltage_switch,
  67. .get_min_clock = sdhci_f_sdh30_get_min_clock,
  68. .reset = sdhci_f_sdh30_reset,
  69. .set_clock = sdhci_set_clock,
  70. .set_bus_width = sdhci_set_bus_width,
  71. .set_uhs_signaling = sdhci_set_uhs_signaling,
  72. };
  73. static int sdhci_f_sdh30_probe(struct platform_device *pdev)
  74. {
  75. struct sdhci_host *host;
  76. struct device *dev = &pdev->dev;
  77. int irq, ctrl = 0, ret = 0;
  78. struct f_sdhost_priv *priv;
  79. u32 reg = 0;
  80. irq = platform_get_irq(pdev, 0);
  81. if (irq < 0)
  82. return irq;
  83. host = sdhci_alloc_host(dev, sizeof(struct f_sdhost_priv));
  84. if (IS_ERR(host))
  85. return PTR_ERR(host);
  86. priv = sdhci_priv(host);
  87. priv->dev = dev;
  88. host->quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
  89. SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
  90. host->quirks2 = SDHCI_QUIRK2_SUPPORT_SINGLE |
  91. SDHCI_QUIRK2_TUNING_WORK_AROUND;
  92. priv->enable_cmd_dat_delay = device_property_read_bool(dev,
  93. "fujitsu,cmd-dat-delay-select");
  94. ret = mmc_of_parse(host->mmc);
  95. if (ret)
  96. goto err;
  97. platform_set_drvdata(pdev, host);
  98. host->hw_name = "f_sdh30";
  99. host->ops = &sdhci_f_sdh30_ops;
  100. host->irq = irq;
  101. host->ioaddr = devm_platform_ioremap_resource(pdev, 0);
  102. if (IS_ERR(host->ioaddr)) {
  103. ret = PTR_ERR(host->ioaddr);
  104. goto err;
  105. }
  106. if (dev_of_node(dev)) {
  107. sdhci_get_of_property(pdev);
  108. priv->clk_iface = devm_clk_get(&pdev->dev, "iface");
  109. if (IS_ERR(priv->clk_iface)) {
  110. ret = PTR_ERR(priv->clk_iface);
  111. goto err;
  112. }
  113. ret = clk_prepare_enable(priv->clk_iface);
  114. if (ret)
  115. goto err;
  116. priv->clk = devm_clk_get(&pdev->dev, "core");
  117. if (IS_ERR(priv->clk)) {
  118. ret = PTR_ERR(priv->clk);
  119. goto err_clk;
  120. }
  121. ret = clk_prepare_enable(priv->clk);
  122. if (ret)
  123. goto err_clk;
  124. }
  125. /* init vendor specific regs */
  126. ctrl = sdhci_readw(host, F_SDH30_AHB_CONFIG);
  127. ctrl |= F_SDH30_SIN | F_SDH30_AHB_INCR_16 | F_SDH30_AHB_INCR_8 |
  128. F_SDH30_AHB_INCR_4;
  129. ctrl &= ~(F_SDH30_AHB_BIGED | F_SDH30_BUSLOCK_EN);
  130. sdhci_writew(host, ctrl, F_SDH30_AHB_CONFIG);
  131. reg = sdhci_readl(host, F_SDH30_ESD_CONTROL);
  132. sdhci_writel(host, reg & ~F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL);
  133. msleep(20);
  134. sdhci_writel(host, reg | F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL);
  135. reg = sdhci_readl(host, SDHCI_CAPABILITIES);
  136. if (reg & SDHCI_CAN_DO_8BIT)
  137. priv->vendor_hs200 = F_SDH30_EMMC_HS200;
  138. ret = sdhci_add_host(host);
  139. if (ret)
  140. goto err_add_host;
  141. return 0;
  142. err_add_host:
  143. clk_disable_unprepare(priv->clk);
  144. err_clk:
  145. clk_disable_unprepare(priv->clk_iface);
  146. err:
  147. sdhci_free_host(host);
  148. return ret;
  149. }
  150. static int sdhci_f_sdh30_remove(struct platform_device *pdev)
  151. {
  152. struct sdhci_host *host = platform_get_drvdata(pdev);
  153. struct f_sdhost_priv *priv = sdhci_priv(host);
  154. sdhci_remove_host(host, readl(host->ioaddr + SDHCI_INT_STATUS) ==
  155. 0xffffffff);
  156. clk_disable_unprepare(priv->clk_iface);
  157. clk_disable_unprepare(priv->clk);
  158. sdhci_free_host(host);
  159. platform_set_drvdata(pdev, NULL);
  160. return 0;
  161. }
  162. #ifdef CONFIG_OF
  163. static const struct of_device_id f_sdh30_dt_ids[] = {
  164. { .compatible = "fujitsu,mb86s70-sdhci-3.0" },
  165. { /* sentinel */ }
  166. };
  167. MODULE_DEVICE_TABLE(of, f_sdh30_dt_ids);
  168. #endif
  169. #ifdef CONFIG_ACPI
  170. static const struct acpi_device_id f_sdh30_acpi_ids[] = {
  171. { "SCX0002" },
  172. { /* sentinel */ }
  173. };
  174. MODULE_DEVICE_TABLE(acpi, f_sdh30_acpi_ids);
  175. #endif
  176. static struct platform_driver sdhci_f_sdh30_driver = {
  177. .driver = {
  178. .name = "f_sdh30",
  179. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  180. .of_match_table = of_match_ptr(f_sdh30_dt_ids),
  181. .acpi_match_table = ACPI_PTR(f_sdh30_acpi_ids),
  182. .pm = &sdhci_pltfm_pmops,
  183. },
  184. .probe = sdhci_f_sdh30_probe,
  185. .remove = sdhci_f_sdh30_remove,
  186. };
  187. module_platform_driver(sdhci_f_sdh30_driver);
  188. MODULE_DESCRIPTION("F_SDH30 SD Card Controller driver");
  189. MODULE_LICENSE("GPL v2");
  190. MODULE_AUTHOR("FUJITSU SEMICONDUCTOR LTD.");
  191. MODULE_ALIAS("platform:f_sdh30");