dw_mmc-zx.c 5.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * ZX Specific Extensions for Synopsys DW Multimedia Card Interface driver
  4. *
  5. * Copyright (C) 2016, Linaro Ltd.
  6. * Copyright (C) 2016, ZTE Corp.
  7. */
  8. #include <linux/clk.h>
  9. #include <linux/mfd/syscon.h>
  10. #include <linux/mmc/host.h>
  11. #include <linux/mmc/mmc.h>
  12. #include <linux/module.h>
  13. #include <linux/of.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/pm_runtime.h>
  16. #include <linux/regmap.h>
  17. #include <linux/slab.h>
  18. #include "dw_mmc.h"
  19. #include "dw_mmc-pltfm.h"
  20. #include "dw_mmc-zx.h"
  21. struct dw_mci_zx_priv_data {
  22. struct regmap *sysc_base;
  23. };
  24. enum delay_type {
  25. DELAY_TYPE_READ, /* read dqs delay */
  26. DELAY_TYPE_CLK, /* clk sample delay */
  27. };
  28. static int dw_mci_zx_emmc_set_delay(struct dw_mci *host, unsigned int delay,
  29. enum delay_type dflag)
  30. {
  31. struct dw_mci_zx_priv_data *priv = host->priv;
  32. struct regmap *sysc_base = priv->sysc_base;
  33. unsigned int clksel;
  34. unsigned int loop = 1000;
  35. int ret;
  36. if (!sysc_base)
  37. return -EINVAL;
  38. ret = regmap_update_bits(sysc_base, LB_AON_EMMC_CFG_REG0,
  39. PARA_HALF_CLK_MODE | PARA_DLL_BYPASS_MODE |
  40. PARA_PHASE_DET_SEL_MASK |
  41. PARA_DLL_LOCK_NUM_MASK |
  42. DLL_REG_SET | PARA_DLL_START_MASK,
  43. PARA_DLL_START(4) | PARA_DLL_LOCK_NUM(4));
  44. if (ret)
  45. return ret;
  46. ret = regmap_read(sysc_base, LB_AON_EMMC_CFG_REG1, &clksel);
  47. if (ret)
  48. return ret;
  49. if (dflag == DELAY_TYPE_CLK) {
  50. clksel &= ~CLK_SAMP_DELAY_MASK;
  51. clksel |= CLK_SAMP_DELAY(delay);
  52. } else {
  53. clksel &= ~READ_DQS_DELAY_MASK;
  54. clksel |= READ_DQS_DELAY(delay);
  55. }
  56. regmap_write(sysc_base, LB_AON_EMMC_CFG_REG1, clksel);
  57. regmap_update_bits(sysc_base, LB_AON_EMMC_CFG_REG0,
  58. PARA_DLL_START_MASK | PARA_DLL_LOCK_NUM_MASK |
  59. DLL_REG_SET,
  60. PARA_DLL_START(4) | PARA_DLL_LOCK_NUM(4) |
  61. DLL_REG_SET);
  62. do {
  63. ret = regmap_read(sysc_base, LB_AON_EMMC_CFG_REG2, &clksel);
  64. if (ret)
  65. return ret;
  66. } while (--loop && !(clksel & ZX_DLL_LOCKED));
  67. if (!loop) {
  68. dev_err(host->dev, "Error: %s dll lock fail\n", __func__);
  69. return -EIO;
  70. }
  71. return 0;
  72. }
  73. static int dw_mci_zx_emmc_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
  74. {
  75. struct dw_mci *host = slot->host;
  76. struct mmc_host *mmc = slot->mmc;
  77. int ret, len = 0, start = 0, end = 0, delay, best = 0;
  78. for (delay = 1; delay < 128; delay++) {
  79. ret = dw_mci_zx_emmc_set_delay(host, delay, DELAY_TYPE_CLK);
  80. if (!ret && mmc_send_tuning(mmc, opcode, NULL)) {
  81. if (start >= 0) {
  82. end = delay - 1;
  83. /* check and update longest good range */
  84. if ((end - start) > len) {
  85. best = (start + end) >> 1;
  86. len = end - start;
  87. }
  88. }
  89. start = -1;
  90. end = 0;
  91. continue;
  92. }
  93. if (start < 0)
  94. start = delay;
  95. }
  96. if (start >= 0) {
  97. end = delay - 1;
  98. if ((end - start) > len) {
  99. best = (start + end) >> 1;
  100. len = end - start;
  101. }
  102. }
  103. if (best < 0)
  104. return -EIO;
  105. dev_info(host->dev, "%s best range: start %d end %d\n", __func__,
  106. start, end);
  107. return dw_mci_zx_emmc_set_delay(host, best, DELAY_TYPE_CLK);
  108. }
  109. static int dw_mci_zx_prepare_hs400_tuning(struct dw_mci *host,
  110. struct mmc_ios *ios)
  111. {
  112. int ret;
  113. /* config phase shift as 90 degree */
  114. ret = dw_mci_zx_emmc_set_delay(host, 32, DELAY_TYPE_READ);
  115. if (ret < 0)
  116. return -EIO;
  117. return 0;
  118. }
  119. static int dw_mci_zx_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
  120. {
  121. struct dw_mci *host = slot->host;
  122. if (host->verid == 0x290a) /* only for emmc */
  123. return dw_mci_zx_emmc_execute_tuning(slot, opcode);
  124. /* TODO: Add 0x210a dedicated tuning for sd/sdio */
  125. return 0;
  126. }
  127. static int dw_mci_zx_parse_dt(struct dw_mci *host)
  128. {
  129. struct device_node *np = host->dev->of_node;
  130. struct device_node *node;
  131. struct dw_mci_zx_priv_data *priv;
  132. struct regmap *sysc_base;
  133. /* syscon is needed only by emmc */
  134. node = of_parse_phandle(np, "zte,aon-syscon", 0);
  135. if (node) {
  136. sysc_base = syscon_node_to_regmap(node);
  137. of_node_put(node);
  138. if (IS_ERR(sysc_base))
  139. return dev_err_probe(host->dev, PTR_ERR(sysc_base),
  140. "Can't get syscon\n");
  141. } else {
  142. return 0;
  143. }
  144. priv = devm_kzalloc(host->dev, sizeof(*priv), GFP_KERNEL);
  145. if (!priv)
  146. return -ENOMEM;
  147. priv->sysc_base = sysc_base;
  148. host->priv = priv;
  149. return 0;
  150. }
  151. static unsigned long zx_dwmmc_caps[3] = {
  152. MMC_CAP_CMD23,
  153. MMC_CAP_CMD23,
  154. MMC_CAP_CMD23,
  155. };
  156. static const struct dw_mci_drv_data zx_drv_data = {
  157. .caps = zx_dwmmc_caps,
  158. .num_caps = ARRAY_SIZE(zx_dwmmc_caps),
  159. .execute_tuning = dw_mci_zx_execute_tuning,
  160. .prepare_hs400_tuning = dw_mci_zx_prepare_hs400_tuning,
  161. .parse_dt = dw_mci_zx_parse_dt,
  162. };
  163. static const struct of_device_id dw_mci_zx_match[] = {
  164. { .compatible = "zte,zx296718-dw-mshc", .data = &zx_drv_data},
  165. {},
  166. };
  167. MODULE_DEVICE_TABLE(of, dw_mci_zx_match);
  168. static int dw_mci_zx_probe(struct platform_device *pdev)
  169. {
  170. const struct dw_mci_drv_data *drv_data;
  171. const struct of_device_id *match;
  172. match = of_match_node(dw_mci_zx_match, pdev->dev.of_node);
  173. drv_data = match->data;
  174. return dw_mci_pltfm_register(pdev, drv_data);
  175. }
  176. static const struct dev_pm_ops dw_mci_zx_dev_pm_ops = {
  177. SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
  178. pm_runtime_force_resume)
  179. SET_RUNTIME_PM_OPS(dw_mci_runtime_suspend,
  180. dw_mci_runtime_resume,
  181. NULL)
  182. };
  183. static struct platform_driver dw_mci_zx_pltfm_driver = {
  184. .probe = dw_mci_zx_probe,
  185. .remove = dw_mci_pltfm_remove,
  186. .driver = {
  187. .name = "dwmmc_zx",
  188. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  189. .of_match_table = dw_mci_zx_match,
  190. .pm = &dw_mci_zx_dev_pm_ops,
  191. },
  192. };
  193. module_platform_driver(dw_mci_zx_pltfm_driver);
  194. MODULE_DESCRIPTION("ZTE emmc/sd driver");
  195. MODULE_LICENSE("GPL v2");