grutlbpurge.c 9.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * SN Platform GRU Driver
  4. *
  5. * MMUOPS callbacks + TLB flushing
  6. *
  7. * This file handles emu notifier callbacks from the core kernel. The callbacks
  8. * are used to update the TLB in the GRU as a result of changes in the
  9. * state of a process address space. This file also handles TLB invalidates
  10. * from the GRU driver.
  11. *
  12. * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/list.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/mm.h>
  18. #include <linux/slab.h>
  19. #include <linux/device.h>
  20. #include <linux/hugetlb.h>
  21. #include <linux/delay.h>
  22. #include <linux/timex.h>
  23. #include <linux/srcu.h>
  24. #include <asm/processor.h>
  25. #include "gru.h"
  26. #include "grutables.h"
  27. #include <asm/uv/uv_hub.h>
  28. #define gru_random() get_cycles()
  29. /* ---------------------------------- TLB Invalidation functions --------
  30. * get_tgh_handle
  31. *
  32. * Find a TGH to use for issuing a TLB invalidate. For GRUs that are on the
  33. * local blade, use a fixed TGH that is a function of the blade-local cpu
  34. * number. Normally, this TGH is private to the cpu & no contention occurs for
  35. * the TGH. For offblade GRUs, select a random TGH in the range above the
  36. * private TGHs. A spinlock is required to access this TGH & the lock must be
  37. * released when the invalidate is completes. This sucks, but it is the best we
  38. * can do.
  39. *
  40. * Note that the spinlock is IN the TGH handle so locking does not involve
  41. * additional cache lines.
  42. *
  43. */
  44. static inline int get_off_blade_tgh(struct gru_state *gru)
  45. {
  46. int n;
  47. n = GRU_NUM_TGH - gru->gs_tgh_first_remote;
  48. n = gru_random() % n;
  49. n += gru->gs_tgh_first_remote;
  50. return n;
  51. }
  52. static inline int get_on_blade_tgh(struct gru_state *gru)
  53. {
  54. return uv_blade_processor_id() >> gru->gs_tgh_local_shift;
  55. }
  56. static struct gru_tlb_global_handle *get_lock_tgh_handle(struct gru_state
  57. *gru)
  58. {
  59. struct gru_tlb_global_handle *tgh;
  60. int n;
  61. preempt_disable();
  62. if (uv_numa_blade_id() == gru->gs_blade_id)
  63. n = get_on_blade_tgh(gru);
  64. else
  65. n = get_off_blade_tgh(gru);
  66. tgh = get_tgh_by_index(gru, n);
  67. lock_tgh_handle(tgh);
  68. return tgh;
  69. }
  70. static void get_unlock_tgh_handle(struct gru_tlb_global_handle *tgh)
  71. {
  72. unlock_tgh_handle(tgh);
  73. preempt_enable();
  74. }
  75. /*
  76. * gru_flush_tlb_range
  77. *
  78. * General purpose TLB invalidation function. This function scans every GRU in
  79. * the ENTIRE system (partition) looking for GRUs where the specified MM has
  80. * been accessed by the GRU. For each GRU found, the TLB must be invalidated OR
  81. * the ASID invalidated. Invalidating an ASID causes a new ASID to be assigned
  82. * on the next fault. This effectively flushes the ENTIRE TLB for the MM at the
  83. * cost of (possibly) a large number of future TLBmisses.
  84. *
  85. * The current algorithm is optimized based on the following (somewhat true)
  86. * assumptions:
  87. * - GRU contexts are not loaded into a GRU unless a reference is made to
  88. * the data segment or control block (this is true, not an assumption).
  89. * If a DS/CB is referenced, the user will also issue instructions that
  90. * cause TLBmisses. It is not necessary to optimize for the case where
  91. * contexts are loaded but no instructions cause TLB misses. (I know
  92. * this will happen but I'm not optimizing for it).
  93. * - GRU instructions to invalidate TLB entries are SLOOOOWWW - normally
  94. * a few usec but in unusual cases, it could be longer. Avoid if
  95. * possible.
  96. * - intrablade process migration between cpus is not frequent but is
  97. * common.
  98. * - a GRU context is not typically migrated to a different GRU on the
  99. * blade because of intrablade migration
  100. * - interblade migration is rare. Processes migrate their GRU context to
  101. * the new blade.
  102. * - if interblade migration occurs, migration back to the original blade
  103. * is very very rare (ie., no optimization for this case)
  104. * - most GRU instruction operate on a subset of the user REGIONS. Code
  105. * & shared library regions are not likely targets of GRU instructions.
  106. *
  107. * To help improve the efficiency of TLB invalidation, the GMS data
  108. * structure is maintained for EACH address space (MM struct). The GMS is
  109. * also the structure that contains the pointer to the mmu callout
  110. * functions. This structure is linked to the mm_struct for the address space
  111. * using the mmu "register" function. The mmu interfaces are used to
  112. * provide the callbacks for TLB invalidation. The GMS contains:
  113. *
  114. * - asid[maxgrus] array. ASIDs are assigned to a GRU when a context is
  115. * loaded into the GRU.
  116. * - asidmap[maxgrus]. bitmap to make it easier to find non-zero asids in
  117. * the above array
  118. * - ctxbitmap[maxgrus]. Indicates the contexts that are currently active
  119. * in the GRU for the address space. This bitmap must be passed to the
  120. * GRU to do an invalidate.
  121. *
  122. * The current algorithm for invalidating TLBs is:
  123. * - scan the asidmap for GRUs where the context has been loaded, ie,
  124. * asid is non-zero.
  125. * - for each gru found:
  126. * - if the ctxtmap is non-zero, there are active contexts in the
  127. * GRU. TLB invalidate instructions must be issued to the GRU.
  128. * - if the ctxtmap is zero, no context is active. Set the ASID to
  129. * zero to force a full TLB invalidation. This is fast but will
  130. * cause a lot of TLB misses if the context is reloaded onto the
  131. * GRU
  132. *
  133. */
  134. void gru_flush_tlb_range(struct gru_mm_struct *gms, unsigned long start,
  135. unsigned long len)
  136. {
  137. struct gru_state *gru;
  138. struct gru_mm_tracker *asids;
  139. struct gru_tlb_global_handle *tgh;
  140. unsigned long num;
  141. int grupagesize, pagesize, pageshift, gid, asid;
  142. /* ZZZ TODO - handle huge pages */
  143. pageshift = PAGE_SHIFT;
  144. pagesize = (1UL << pageshift);
  145. grupagesize = GRU_PAGESIZE(pageshift);
  146. num = min(((len + pagesize - 1) >> pageshift), GRUMAXINVAL);
  147. STAT(flush_tlb);
  148. gru_dbg(grudev, "gms %p, start 0x%lx, len 0x%lx, asidmap 0x%lx\n", gms,
  149. start, len, gms->ms_asidmap[0]);
  150. spin_lock(&gms->ms_asid_lock);
  151. for_each_gru_in_bitmap(gid, gms->ms_asidmap) {
  152. STAT(flush_tlb_gru);
  153. gru = GID_TO_GRU(gid);
  154. asids = gms->ms_asids + gid;
  155. asid = asids->mt_asid;
  156. if (asids->mt_ctxbitmap && asid) {
  157. STAT(flush_tlb_gru_tgh);
  158. asid = GRUASID(asid, start);
  159. gru_dbg(grudev,
  160. " FLUSH gruid %d, asid 0x%x, vaddr 0x%lx, vamask 0x%x, num %ld, cbmap 0x%x\n",
  161. gid, asid, start, grupagesize, num, asids->mt_ctxbitmap);
  162. tgh = get_lock_tgh_handle(gru);
  163. tgh_invalidate(tgh, start, ~0, asid, grupagesize, 0,
  164. num - 1, asids->mt_ctxbitmap);
  165. get_unlock_tgh_handle(tgh);
  166. } else {
  167. STAT(flush_tlb_gru_zero_asid);
  168. asids->mt_asid = 0;
  169. __clear_bit(gru->gs_gid, gms->ms_asidmap);
  170. gru_dbg(grudev,
  171. " CLEARASID gruid %d, asid 0x%x, cbtmap 0x%x, asidmap 0x%lx\n",
  172. gid, asid, asids->mt_ctxbitmap,
  173. gms->ms_asidmap[0]);
  174. }
  175. }
  176. spin_unlock(&gms->ms_asid_lock);
  177. }
  178. /*
  179. * Flush the entire TLB on a chiplet.
  180. */
  181. void gru_flush_all_tlb(struct gru_state *gru)
  182. {
  183. struct gru_tlb_global_handle *tgh;
  184. gru_dbg(grudev, "gid %d\n", gru->gs_gid);
  185. tgh = get_lock_tgh_handle(gru);
  186. tgh_invalidate(tgh, 0, ~0, 0, 1, 1, GRUMAXINVAL - 1, 0xffff);
  187. get_unlock_tgh_handle(tgh);
  188. }
  189. /*
  190. * MMUOPS notifier callout functions
  191. */
  192. static int gru_invalidate_range_start(struct mmu_notifier *mn,
  193. const struct mmu_notifier_range *range)
  194. {
  195. struct gru_mm_struct *gms = container_of(mn, struct gru_mm_struct,
  196. ms_notifier);
  197. STAT(mmu_invalidate_range);
  198. atomic_inc(&gms->ms_range_active);
  199. gru_dbg(grudev, "gms %p, start 0x%lx, end 0x%lx, act %d\n", gms,
  200. range->start, range->end, atomic_read(&gms->ms_range_active));
  201. gru_flush_tlb_range(gms, range->start, range->end - range->start);
  202. return 0;
  203. }
  204. static void gru_invalidate_range_end(struct mmu_notifier *mn,
  205. const struct mmu_notifier_range *range)
  206. {
  207. struct gru_mm_struct *gms = container_of(mn, struct gru_mm_struct,
  208. ms_notifier);
  209. /* ..._and_test() provides needed barrier */
  210. (void)atomic_dec_and_test(&gms->ms_range_active);
  211. wake_up_all(&gms->ms_wait_queue);
  212. gru_dbg(grudev, "gms %p, start 0x%lx, end 0x%lx\n",
  213. gms, range->start, range->end);
  214. }
  215. static struct mmu_notifier *gru_alloc_notifier(struct mm_struct *mm)
  216. {
  217. struct gru_mm_struct *gms;
  218. gms = kzalloc(sizeof(*gms), GFP_KERNEL);
  219. if (!gms)
  220. return ERR_PTR(-ENOMEM);
  221. STAT(gms_alloc);
  222. spin_lock_init(&gms->ms_asid_lock);
  223. init_waitqueue_head(&gms->ms_wait_queue);
  224. return &gms->ms_notifier;
  225. }
  226. static void gru_free_notifier(struct mmu_notifier *mn)
  227. {
  228. kfree(container_of(mn, struct gru_mm_struct, ms_notifier));
  229. STAT(gms_free);
  230. }
  231. static const struct mmu_notifier_ops gru_mmuops = {
  232. .invalidate_range_start = gru_invalidate_range_start,
  233. .invalidate_range_end = gru_invalidate_range_end,
  234. .alloc_notifier = gru_alloc_notifier,
  235. .free_notifier = gru_free_notifier,
  236. };
  237. struct gru_mm_struct *gru_register_mmu_notifier(void)
  238. {
  239. struct mmu_notifier *mn;
  240. mn = mmu_notifier_get_locked(&gru_mmuops, current->mm);
  241. if (IS_ERR(mn))
  242. return ERR_CAST(mn);
  243. return container_of(mn, struct gru_mm_struct, ms_notifier);
  244. }
  245. void gru_drop_mmu_notifier(struct gru_mm_struct *gms)
  246. {
  247. mmu_notifier_put(&gms->ms_notifier);
  248. }
  249. /*
  250. * Setup TGH parameters. There are:
  251. * - 24 TGH handles per GRU chiplet
  252. * - a portion (MAX_LOCAL_TGH) of the handles are reserved for
  253. * use by blade-local cpus
  254. * - the rest are used by off-blade cpus. This usage is
  255. * less frequent than blade-local usage.
  256. *
  257. * For now, use 16 handles for local flushes, 8 for remote flushes. If the blade
  258. * has less tan or equal to 16 cpus, each cpu has a unique handle that it can
  259. * use.
  260. */
  261. #define MAX_LOCAL_TGH 16
  262. void gru_tgh_flush_init(struct gru_state *gru)
  263. {
  264. int cpus, shift = 0, n;
  265. cpus = uv_blade_nr_possible_cpus(gru->gs_blade_id);
  266. /* n = cpus rounded up to next power of 2 */
  267. if (cpus) {
  268. n = 1 << fls(cpus - 1);
  269. /*
  270. * shift count for converting local cpu# to TGH index
  271. * 0 if cpus <= MAX_LOCAL_TGH,
  272. * 1 if cpus <= 2*MAX_LOCAL_TGH,
  273. * etc
  274. */
  275. shift = max(0, fls(n - 1) - fls(MAX_LOCAL_TGH - 1));
  276. }
  277. gru->gs_tgh_local_shift = shift;
  278. /* first starting TGH index to use for remote purges */
  279. gru->gs_tgh_first_remote = (cpus + (1 << shift) - 1) >> shift;
  280. }