ics932s401.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * A driver for the Integrated Circuits ICS932S401
  4. * Copyright (C) 2008 IBM
  5. *
  6. * Author: Darrick J. Wong <darrick.wong@oracle.com>
  7. */
  8. #include <linux/module.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/i2c.h>
  11. #include <linux/err.h>
  12. #include <linux/mutex.h>
  13. #include <linux/delay.h>
  14. #include <linux/log2.h>
  15. #include <linux/slab.h>
  16. /* Addresses to scan */
  17. static const unsigned short normal_i2c[] = { 0x69, I2C_CLIENT_END };
  18. /* ICS932S401 registers */
  19. #define ICS932S401_REG_CFG2 0x01
  20. #define ICS932S401_CFG1_SPREAD 0x01
  21. #define ICS932S401_REG_CFG7 0x06
  22. #define ICS932S401_FS_MASK 0x07
  23. #define ICS932S401_REG_VENDOR_REV 0x07
  24. #define ICS932S401_VENDOR 1
  25. #define ICS932S401_VENDOR_MASK 0x0F
  26. #define ICS932S401_REV 4
  27. #define ICS932S401_REV_SHIFT 4
  28. #define ICS932S401_REG_DEVICE 0x09
  29. #define ICS932S401_DEVICE 11
  30. #define ICS932S401_REG_CTRL 0x0A
  31. #define ICS932S401_MN_ENABLED 0x80
  32. #define ICS932S401_CPU_ALT 0x04
  33. #define ICS932S401_SRC_ALT 0x08
  34. #define ICS932S401_REG_CPU_M_CTRL 0x0B
  35. #define ICS932S401_M_MASK 0x3F
  36. #define ICS932S401_REG_CPU_N_CTRL 0x0C
  37. #define ICS932S401_REG_CPU_SPREAD1 0x0D
  38. #define ICS932S401_REG_CPU_SPREAD2 0x0E
  39. #define ICS932S401_SPREAD_MASK 0x7FFF
  40. #define ICS932S401_REG_SRC_M_CTRL 0x0F
  41. #define ICS932S401_REG_SRC_N_CTRL 0x10
  42. #define ICS932S401_REG_SRC_SPREAD1 0x11
  43. #define ICS932S401_REG_SRC_SPREAD2 0x12
  44. #define ICS932S401_REG_CPU_DIVISOR 0x13
  45. #define ICS932S401_CPU_DIVISOR_SHIFT 4
  46. #define ICS932S401_REG_PCISRC_DIVISOR 0x14
  47. #define ICS932S401_SRC_DIVISOR_MASK 0x0F
  48. #define ICS932S401_PCI_DIVISOR_SHIFT 4
  49. /* Base clock is 14.318MHz */
  50. #define BASE_CLOCK 14318
  51. #define NUM_REGS 21
  52. #define NUM_MIRRORED_REGS 15
  53. static int regs_to_copy[NUM_MIRRORED_REGS] = {
  54. ICS932S401_REG_CFG2,
  55. ICS932S401_REG_CFG7,
  56. ICS932S401_REG_VENDOR_REV,
  57. ICS932S401_REG_DEVICE,
  58. ICS932S401_REG_CTRL,
  59. ICS932S401_REG_CPU_M_CTRL,
  60. ICS932S401_REG_CPU_N_CTRL,
  61. ICS932S401_REG_CPU_SPREAD1,
  62. ICS932S401_REG_CPU_SPREAD2,
  63. ICS932S401_REG_SRC_M_CTRL,
  64. ICS932S401_REG_SRC_N_CTRL,
  65. ICS932S401_REG_SRC_SPREAD1,
  66. ICS932S401_REG_SRC_SPREAD2,
  67. ICS932S401_REG_CPU_DIVISOR,
  68. ICS932S401_REG_PCISRC_DIVISOR,
  69. };
  70. /* How often do we reread sensors values? (In jiffies) */
  71. #define SENSOR_REFRESH_INTERVAL (2 * HZ)
  72. /* How often do we reread sensor limit values? (In jiffies) */
  73. #define LIMIT_REFRESH_INTERVAL (60 * HZ)
  74. struct ics932s401_data {
  75. struct attribute_group attrs;
  76. struct mutex lock;
  77. char sensors_valid;
  78. unsigned long sensors_last_updated; /* In jiffies */
  79. u8 regs[NUM_REGS];
  80. };
  81. static int ics932s401_probe(struct i2c_client *client,
  82. const struct i2c_device_id *id);
  83. static int ics932s401_detect(struct i2c_client *client,
  84. struct i2c_board_info *info);
  85. static int ics932s401_remove(struct i2c_client *client);
  86. static const struct i2c_device_id ics932s401_id[] = {
  87. { "ics932s401", 0 },
  88. { }
  89. };
  90. MODULE_DEVICE_TABLE(i2c, ics932s401_id);
  91. static struct i2c_driver ics932s401_driver = {
  92. .class = I2C_CLASS_HWMON,
  93. .driver = {
  94. .name = "ics932s401",
  95. },
  96. .probe = ics932s401_probe,
  97. .remove = ics932s401_remove,
  98. .id_table = ics932s401_id,
  99. .detect = ics932s401_detect,
  100. .address_list = normal_i2c,
  101. };
  102. static struct ics932s401_data *ics932s401_update_device(struct device *dev)
  103. {
  104. struct i2c_client *client = to_i2c_client(dev);
  105. struct ics932s401_data *data = i2c_get_clientdata(client);
  106. unsigned long local_jiffies = jiffies;
  107. int i, temp;
  108. mutex_lock(&data->lock);
  109. if (time_before(local_jiffies, data->sensors_last_updated +
  110. SENSOR_REFRESH_INTERVAL)
  111. && data->sensors_valid)
  112. goto out;
  113. /*
  114. * Each register must be read as a word and then right shifted 8 bits.
  115. * Not really sure why this is; setting the "byte count programming"
  116. * register to 1 does not fix this problem.
  117. */
  118. for (i = 0; i < NUM_MIRRORED_REGS; i++) {
  119. temp = i2c_smbus_read_word_data(client, regs_to_copy[i]);
  120. if (temp < 0)
  121. temp = 0;
  122. data->regs[regs_to_copy[i]] = temp >> 8;
  123. }
  124. data->sensors_last_updated = local_jiffies;
  125. data->sensors_valid = 1;
  126. out:
  127. mutex_unlock(&data->lock);
  128. return data;
  129. }
  130. static ssize_t show_spread_enabled(struct device *dev,
  131. struct device_attribute *devattr,
  132. char *buf)
  133. {
  134. struct ics932s401_data *data = ics932s401_update_device(dev);
  135. if (data->regs[ICS932S401_REG_CFG2] & ICS932S401_CFG1_SPREAD)
  136. return sprintf(buf, "1\n");
  137. return sprintf(buf, "0\n");
  138. }
  139. /* bit to cpu khz map */
  140. static const int fs_speeds[] = {
  141. 266666,
  142. 133333,
  143. 200000,
  144. 166666,
  145. 333333,
  146. 100000,
  147. 400000,
  148. 0,
  149. };
  150. /* clock divisor map */
  151. static const int divisors[] = {2, 3, 5, 15, 4, 6, 10, 30, 8, 12, 20, 60, 16,
  152. 24, 40, 120};
  153. /* Calculate CPU frequency from the M/N registers. */
  154. static int calculate_cpu_freq(struct ics932s401_data *data)
  155. {
  156. int m, n, freq;
  157. m = data->regs[ICS932S401_REG_CPU_M_CTRL] & ICS932S401_M_MASK;
  158. n = data->regs[ICS932S401_REG_CPU_N_CTRL];
  159. /* Pull in bits 8 & 9 from the M register */
  160. n |= ((int)data->regs[ICS932S401_REG_CPU_M_CTRL] & 0x80) << 1;
  161. n |= ((int)data->regs[ICS932S401_REG_CPU_M_CTRL] & 0x40) << 3;
  162. freq = BASE_CLOCK * (n + 8) / (m + 2);
  163. freq /= divisors[data->regs[ICS932S401_REG_CPU_DIVISOR] >>
  164. ICS932S401_CPU_DIVISOR_SHIFT];
  165. return freq;
  166. }
  167. static ssize_t show_cpu_clock(struct device *dev,
  168. struct device_attribute *devattr,
  169. char *buf)
  170. {
  171. struct ics932s401_data *data = ics932s401_update_device(dev);
  172. return sprintf(buf, "%d\n", calculate_cpu_freq(data));
  173. }
  174. static ssize_t show_cpu_clock_sel(struct device *dev,
  175. struct device_attribute *devattr,
  176. char *buf)
  177. {
  178. struct ics932s401_data *data = ics932s401_update_device(dev);
  179. int freq;
  180. if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_MN_ENABLED)
  181. freq = calculate_cpu_freq(data);
  182. else {
  183. /* Freq is neatly wrapped up for us */
  184. int fid = data->regs[ICS932S401_REG_CFG7] & ICS932S401_FS_MASK;
  185. freq = fs_speeds[fid];
  186. if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_CPU_ALT) {
  187. switch (freq) {
  188. case 166666:
  189. freq = 160000;
  190. break;
  191. case 333333:
  192. freq = 320000;
  193. break;
  194. }
  195. }
  196. }
  197. return sprintf(buf, "%d\n", freq);
  198. }
  199. /* Calculate SRC frequency from the M/N registers. */
  200. static int calculate_src_freq(struct ics932s401_data *data)
  201. {
  202. int m, n, freq;
  203. m = data->regs[ICS932S401_REG_SRC_M_CTRL] & ICS932S401_M_MASK;
  204. n = data->regs[ICS932S401_REG_SRC_N_CTRL];
  205. /* Pull in bits 8 & 9 from the M register */
  206. n |= ((int)data->regs[ICS932S401_REG_SRC_M_CTRL] & 0x80) << 1;
  207. n |= ((int)data->regs[ICS932S401_REG_SRC_M_CTRL] & 0x40) << 3;
  208. freq = BASE_CLOCK * (n + 8) / (m + 2);
  209. freq /= divisors[data->regs[ICS932S401_REG_PCISRC_DIVISOR] &
  210. ICS932S401_SRC_DIVISOR_MASK];
  211. return freq;
  212. }
  213. static ssize_t show_src_clock(struct device *dev,
  214. struct device_attribute *devattr,
  215. char *buf)
  216. {
  217. struct ics932s401_data *data = ics932s401_update_device(dev);
  218. return sprintf(buf, "%d\n", calculate_src_freq(data));
  219. }
  220. static ssize_t show_src_clock_sel(struct device *dev,
  221. struct device_attribute *devattr,
  222. char *buf)
  223. {
  224. struct ics932s401_data *data = ics932s401_update_device(dev);
  225. int freq;
  226. if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_MN_ENABLED)
  227. freq = calculate_src_freq(data);
  228. else
  229. /* Freq is neatly wrapped up for us */
  230. if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_CPU_ALT &&
  231. data->regs[ICS932S401_REG_CTRL] & ICS932S401_SRC_ALT)
  232. freq = 96000;
  233. else
  234. freq = 100000;
  235. return sprintf(buf, "%d\n", freq);
  236. }
  237. /* Calculate PCI frequency from the SRC M/N registers. */
  238. static int calculate_pci_freq(struct ics932s401_data *data)
  239. {
  240. int m, n, freq;
  241. m = data->regs[ICS932S401_REG_SRC_M_CTRL] & ICS932S401_M_MASK;
  242. n = data->regs[ICS932S401_REG_SRC_N_CTRL];
  243. /* Pull in bits 8 & 9 from the M register */
  244. n |= ((int)data->regs[ICS932S401_REG_SRC_M_CTRL] & 0x80) << 1;
  245. n |= ((int)data->regs[ICS932S401_REG_SRC_M_CTRL] & 0x40) << 3;
  246. freq = BASE_CLOCK * (n + 8) / (m + 2);
  247. freq /= divisors[data->regs[ICS932S401_REG_PCISRC_DIVISOR] >>
  248. ICS932S401_PCI_DIVISOR_SHIFT];
  249. return freq;
  250. }
  251. static ssize_t show_pci_clock(struct device *dev,
  252. struct device_attribute *devattr,
  253. char *buf)
  254. {
  255. struct ics932s401_data *data = ics932s401_update_device(dev);
  256. return sprintf(buf, "%d\n", calculate_pci_freq(data));
  257. }
  258. static ssize_t show_pci_clock_sel(struct device *dev,
  259. struct device_attribute *devattr,
  260. char *buf)
  261. {
  262. struct ics932s401_data *data = ics932s401_update_device(dev);
  263. int freq;
  264. if (data->regs[ICS932S401_REG_CTRL] & ICS932S401_MN_ENABLED)
  265. freq = calculate_pci_freq(data);
  266. else
  267. freq = 33333;
  268. return sprintf(buf, "%d\n", freq);
  269. }
  270. static ssize_t show_value(struct device *dev,
  271. struct device_attribute *devattr,
  272. char *buf);
  273. static ssize_t show_spread(struct device *dev,
  274. struct device_attribute *devattr,
  275. char *buf);
  276. static DEVICE_ATTR(spread_enabled, S_IRUGO, show_spread_enabled, NULL);
  277. static DEVICE_ATTR(cpu_clock_selection, S_IRUGO, show_cpu_clock_sel, NULL);
  278. static DEVICE_ATTR(cpu_clock, S_IRUGO, show_cpu_clock, NULL);
  279. static DEVICE_ATTR(src_clock_selection, S_IRUGO, show_src_clock_sel, NULL);
  280. static DEVICE_ATTR(src_clock, S_IRUGO, show_src_clock, NULL);
  281. static DEVICE_ATTR(pci_clock_selection, S_IRUGO, show_pci_clock_sel, NULL);
  282. static DEVICE_ATTR(pci_clock, S_IRUGO, show_pci_clock, NULL);
  283. static DEVICE_ATTR(usb_clock, S_IRUGO, show_value, NULL);
  284. static DEVICE_ATTR(ref_clock, S_IRUGO, show_value, NULL);
  285. static DEVICE_ATTR(cpu_spread, S_IRUGO, show_spread, NULL);
  286. static DEVICE_ATTR(src_spread, S_IRUGO, show_spread, NULL);
  287. static struct attribute *ics932s401_attr[] = {
  288. &dev_attr_spread_enabled.attr,
  289. &dev_attr_cpu_clock_selection.attr,
  290. &dev_attr_cpu_clock.attr,
  291. &dev_attr_src_clock_selection.attr,
  292. &dev_attr_src_clock.attr,
  293. &dev_attr_pci_clock_selection.attr,
  294. &dev_attr_pci_clock.attr,
  295. &dev_attr_usb_clock.attr,
  296. &dev_attr_ref_clock.attr,
  297. &dev_attr_cpu_spread.attr,
  298. &dev_attr_src_spread.attr,
  299. NULL
  300. };
  301. static ssize_t show_value(struct device *dev,
  302. struct device_attribute *devattr,
  303. char *buf)
  304. {
  305. int x;
  306. if (devattr == &dev_attr_usb_clock)
  307. x = 48000;
  308. else if (devattr == &dev_attr_ref_clock)
  309. x = BASE_CLOCK;
  310. else
  311. BUG();
  312. return sprintf(buf, "%d\n", x);
  313. }
  314. static ssize_t show_spread(struct device *dev,
  315. struct device_attribute *devattr,
  316. char *buf)
  317. {
  318. struct ics932s401_data *data = ics932s401_update_device(dev);
  319. int reg;
  320. unsigned long val;
  321. if (!(data->regs[ICS932S401_REG_CFG2] & ICS932S401_CFG1_SPREAD))
  322. return sprintf(buf, "0%%\n");
  323. if (devattr == &dev_attr_src_spread)
  324. reg = ICS932S401_REG_SRC_SPREAD1;
  325. else if (devattr == &dev_attr_cpu_spread)
  326. reg = ICS932S401_REG_CPU_SPREAD1;
  327. else
  328. BUG();
  329. val = data->regs[reg] | (data->regs[reg + 1] << 8);
  330. val &= ICS932S401_SPREAD_MASK;
  331. /* Scale 0..2^14 to -0.5. */
  332. val = 500000 * val / 16384;
  333. return sprintf(buf, "-0.%lu%%\n", val);
  334. }
  335. /* Return 0 if detection is successful, -ENODEV otherwise */
  336. static int ics932s401_detect(struct i2c_client *client,
  337. struct i2c_board_info *info)
  338. {
  339. struct i2c_adapter *adapter = client->adapter;
  340. int vendor, device, revision;
  341. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  342. return -ENODEV;
  343. vendor = i2c_smbus_read_word_data(client, ICS932S401_REG_VENDOR_REV);
  344. vendor >>= 8;
  345. revision = vendor >> ICS932S401_REV_SHIFT;
  346. vendor &= ICS932S401_VENDOR_MASK;
  347. if (vendor != ICS932S401_VENDOR)
  348. return -ENODEV;
  349. device = i2c_smbus_read_word_data(client, ICS932S401_REG_DEVICE);
  350. device >>= 8;
  351. if (device != ICS932S401_DEVICE)
  352. return -ENODEV;
  353. if (revision != ICS932S401_REV)
  354. dev_info(&adapter->dev, "Unknown revision %d\n", revision);
  355. strlcpy(info->type, "ics932s401", I2C_NAME_SIZE);
  356. return 0;
  357. }
  358. static int ics932s401_probe(struct i2c_client *client,
  359. const struct i2c_device_id *id)
  360. {
  361. struct ics932s401_data *data;
  362. int err;
  363. data = kzalloc(sizeof(struct ics932s401_data), GFP_KERNEL);
  364. if (!data) {
  365. err = -ENOMEM;
  366. goto exit;
  367. }
  368. i2c_set_clientdata(client, data);
  369. mutex_init(&data->lock);
  370. dev_info(&client->dev, "%s chip found\n", client->name);
  371. /* Register sysfs hooks */
  372. data->attrs.attrs = ics932s401_attr;
  373. err = sysfs_create_group(&client->dev.kobj, &data->attrs);
  374. if (err)
  375. goto exit_free;
  376. return 0;
  377. exit_free:
  378. kfree(data);
  379. exit:
  380. return err;
  381. }
  382. static int ics932s401_remove(struct i2c_client *client)
  383. {
  384. struct ics932s401_data *data = i2c_get_clientdata(client);
  385. sysfs_remove_group(&client->dev.kobj, &data->attrs);
  386. kfree(data);
  387. return 0;
  388. }
  389. module_i2c_driver(ics932s401_driver);
  390. MODULE_AUTHOR("Darrick J. Wong <darrick.wong@oracle.com>");
  391. MODULE_DESCRIPTION("ICS932S401 driver");
  392. MODULE_LICENSE("GPL");
  393. /* IBM IntelliStation Z30 */
  394. MODULE_ALIAS("dmi:bvnIBM:*:rn9228:*");
  395. MODULE_ALIAS("dmi:bvnIBM:*:rn9232:*");
  396. /* IBM x3650/x3550 */
  397. MODULE_ALIAS("dmi:bvnIBM:*:pnIBMSystemx3650*");
  398. MODULE_ALIAS("dmi:bvnIBM:*:pnIBMSystemx3550*");