card_dev.c 34 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * IBM Accelerator Family 'GenWQE'
  4. *
  5. * (C) Copyright IBM Corp. 2013
  6. *
  7. * Author: Frank Haverkamp <haver@linux.vnet.ibm.com>
  8. * Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com>
  9. * Author: Michael Jung <mijung@gmx.net>
  10. * Author: Michael Ruettger <michael@ibmra.de>
  11. */
  12. /*
  13. * Character device representation of the GenWQE device. This allows
  14. * user-space applications to communicate with the card.
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/types.h>
  18. #include <linux/module.h>
  19. #include <linux/pci.h>
  20. #include <linux/string.h>
  21. #include <linux/fs.h>
  22. #include <linux/sched/signal.h>
  23. #include <linux/wait.h>
  24. #include <linux/delay.h>
  25. #include <linux/atomic.h>
  26. #include "card_base.h"
  27. #include "card_ddcb.h"
  28. static int genwqe_open_files(struct genwqe_dev *cd)
  29. {
  30. int rc;
  31. unsigned long flags;
  32. spin_lock_irqsave(&cd->file_lock, flags);
  33. rc = list_empty(&cd->file_list);
  34. spin_unlock_irqrestore(&cd->file_lock, flags);
  35. return !rc;
  36. }
  37. static void genwqe_add_file(struct genwqe_dev *cd, struct genwqe_file *cfile)
  38. {
  39. unsigned long flags;
  40. cfile->opener = get_pid(task_tgid(current));
  41. spin_lock_irqsave(&cd->file_lock, flags);
  42. list_add(&cfile->list, &cd->file_list);
  43. spin_unlock_irqrestore(&cd->file_lock, flags);
  44. }
  45. static int genwqe_del_file(struct genwqe_dev *cd, struct genwqe_file *cfile)
  46. {
  47. unsigned long flags;
  48. spin_lock_irqsave(&cd->file_lock, flags);
  49. list_del(&cfile->list);
  50. spin_unlock_irqrestore(&cd->file_lock, flags);
  51. put_pid(cfile->opener);
  52. return 0;
  53. }
  54. static void genwqe_add_pin(struct genwqe_file *cfile, struct dma_mapping *m)
  55. {
  56. unsigned long flags;
  57. spin_lock_irqsave(&cfile->pin_lock, flags);
  58. list_add(&m->pin_list, &cfile->pin_list);
  59. spin_unlock_irqrestore(&cfile->pin_lock, flags);
  60. }
  61. static int genwqe_del_pin(struct genwqe_file *cfile, struct dma_mapping *m)
  62. {
  63. unsigned long flags;
  64. spin_lock_irqsave(&cfile->pin_lock, flags);
  65. list_del(&m->pin_list);
  66. spin_unlock_irqrestore(&cfile->pin_lock, flags);
  67. return 0;
  68. }
  69. /**
  70. * genwqe_search_pin() - Search for the mapping for a userspace address
  71. * @cfile: Descriptor of opened file
  72. * @u_addr: User virtual address
  73. * @size: Size of buffer
  74. * @virt_addr: Virtual address to be updated
  75. *
  76. * Return: Pointer to the corresponding mapping NULL if not found
  77. */
  78. static struct dma_mapping *genwqe_search_pin(struct genwqe_file *cfile,
  79. unsigned long u_addr,
  80. unsigned int size,
  81. void **virt_addr)
  82. {
  83. unsigned long flags;
  84. struct dma_mapping *m;
  85. spin_lock_irqsave(&cfile->pin_lock, flags);
  86. list_for_each_entry(m, &cfile->pin_list, pin_list) {
  87. if ((((u64)m->u_vaddr) <= (u_addr)) &&
  88. (((u64)m->u_vaddr + m->size) >= (u_addr + size))) {
  89. if (virt_addr)
  90. *virt_addr = m->k_vaddr +
  91. (u_addr - (u64)m->u_vaddr);
  92. spin_unlock_irqrestore(&cfile->pin_lock, flags);
  93. return m;
  94. }
  95. }
  96. spin_unlock_irqrestore(&cfile->pin_lock, flags);
  97. return NULL;
  98. }
  99. static void __genwqe_add_mapping(struct genwqe_file *cfile,
  100. struct dma_mapping *dma_map)
  101. {
  102. unsigned long flags;
  103. spin_lock_irqsave(&cfile->map_lock, flags);
  104. list_add(&dma_map->card_list, &cfile->map_list);
  105. spin_unlock_irqrestore(&cfile->map_lock, flags);
  106. }
  107. static void __genwqe_del_mapping(struct genwqe_file *cfile,
  108. struct dma_mapping *dma_map)
  109. {
  110. unsigned long flags;
  111. spin_lock_irqsave(&cfile->map_lock, flags);
  112. list_del(&dma_map->card_list);
  113. spin_unlock_irqrestore(&cfile->map_lock, flags);
  114. }
  115. /**
  116. * __genwqe_search_mapping() - Search for the mapping for a userspace address
  117. * @cfile: descriptor of opened file
  118. * @u_addr: user virtual address
  119. * @size: size of buffer
  120. * @dma_addr: DMA address to be updated
  121. * @virt_addr: Virtual address to be updated
  122. * Return: Pointer to the corresponding mapping NULL if not found
  123. */
  124. static struct dma_mapping *__genwqe_search_mapping(struct genwqe_file *cfile,
  125. unsigned long u_addr,
  126. unsigned int size,
  127. dma_addr_t *dma_addr,
  128. void **virt_addr)
  129. {
  130. unsigned long flags;
  131. struct dma_mapping *m;
  132. struct pci_dev *pci_dev = cfile->cd->pci_dev;
  133. spin_lock_irqsave(&cfile->map_lock, flags);
  134. list_for_each_entry(m, &cfile->map_list, card_list) {
  135. if ((((u64)m->u_vaddr) <= (u_addr)) &&
  136. (((u64)m->u_vaddr + m->size) >= (u_addr + size))) {
  137. /* match found: current is as expected and
  138. addr is in range */
  139. if (dma_addr)
  140. *dma_addr = m->dma_addr +
  141. (u_addr - (u64)m->u_vaddr);
  142. if (virt_addr)
  143. *virt_addr = m->k_vaddr +
  144. (u_addr - (u64)m->u_vaddr);
  145. spin_unlock_irqrestore(&cfile->map_lock, flags);
  146. return m;
  147. }
  148. }
  149. spin_unlock_irqrestore(&cfile->map_lock, flags);
  150. dev_err(&pci_dev->dev,
  151. "[%s] Entry not found: u_addr=%lx, size=%x\n",
  152. __func__, u_addr, size);
  153. return NULL;
  154. }
  155. static void genwqe_remove_mappings(struct genwqe_file *cfile)
  156. {
  157. int i = 0;
  158. struct list_head *node, *next;
  159. struct dma_mapping *dma_map;
  160. struct genwqe_dev *cd = cfile->cd;
  161. struct pci_dev *pci_dev = cfile->cd->pci_dev;
  162. list_for_each_safe(node, next, &cfile->map_list) {
  163. dma_map = list_entry(node, struct dma_mapping, card_list);
  164. list_del_init(&dma_map->card_list);
  165. /*
  166. * This is really a bug, because those things should
  167. * have been already tidied up.
  168. *
  169. * GENWQE_MAPPING_RAW should have been removed via mmunmap().
  170. * GENWQE_MAPPING_SGL_TEMP should be removed by tidy up code.
  171. */
  172. dev_err(&pci_dev->dev,
  173. "[%s] %d. cleanup mapping: u_vaddr=%p u_kaddr=%016lx dma_addr=%lx\n",
  174. __func__, i++, dma_map->u_vaddr,
  175. (unsigned long)dma_map->k_vaddr,
  176. (unsigned long)dma_map->dma_addr);
  177. if (dma_map->type == GENWQE_MAPPING_RAW) {
  178. /* we allocated this dynamically */
  179. __genwqe_free_consistent(cd, dma_map->size,
  180. dma_map->k_vaddr,
  181. dma_map->dma_addr);
  182. kfree(dma_map);
  183. } else if (dma_map->type == GENWQE_MAPPING_SGL_TEMP) {
  184. /* we use dma_map statically from the request */
  185. genwqe_user_vunmap(cd, dma_map);
  186. }
  187. }
  188. }
  189. static void genwqe_remove_pinnings(struct genwqe_file *cfile)
  190. {
  191. struct list_head *node, *next;
  192. struct dma_mapping *dma_map;
  193. struct genwqe_dev *cd = cfile->cd;
  194. list_for_each_safe(node, next, &cfile->pin_list) {
  195. dma_map = list_entry(node, struct dma_mapping, pin_list);
  196. /*
  197. * This is not a bug, because a killed processed might
  198. * not call the unpin ioctl, which is supposed to free
  199. * the resources.
  200. *
  201. * Pinnings are dymically allocated and need to be
  202. * deleted.
  203. */
  204. list_del_init(&dma_map->pin_list);
  205. genwqe_user_vunmap(cd, dma_map);
  206. kfree(dma_map);
  207. }
  208. }
  209. /**
  210. * genwqe_kill_fasync() - Send signal to all processes with open GenWQE files
  211. * @cd: GenWQE device information
  212. * @sig: Signal to send out
  213. *
  214. * E.g. genwqe_send_signal(cd, SIGIO);
  215. */
  216. static int genwqe_kill_fasync(struct genwqe_dev *cd, int sig)
  217. {
  218. unsigned int files = 0;
  219. unsigned long flags;
  220. struct genwqe_file *cfile;
  221. spin_lock_irqsave(&cd->file_lock, flags);
  222. list_for_each_entry(cfile, &cd->file_list, list) {
  223. if (cfile->async_queue)
  224. kill_fasync(&cfile->async_queue, sig, POLL_HUP);
  225. files++;
  226. }
  227. spin_unlock_irqrestore(&cd->file_lock, flags);
  228. return files;
  229. }
  230. static int genwqe_terminate(struct genwqe_dev *cd)
  231. {
  232. unsigned int files = 0;
  233. unsigned long flags;
  234. struct genwqe_file *cfile;
  235. spin_lock_irqsave(&cd->file_lock, flags);
  236. list_for_each_entry(cfile, &cd->file_list, list) {
  237. kill_pid(cfile->opener, SIGKILL, 1);
  238. files++;
  239. }
  240. spin_unlock_irqrestore(&cd->file_lock, flags);
  241. return files;
  242. }
  243. /**
  244. * genwqe_open() - file open
  245. * @inode: file system information
  246. * @filp: file handle
  247. *
  248. * This function is executed whenever an application calls
  249. * open("/dev/genwqe",..).
  250. *
  251. * Return: 0 if successful or <0 if errors
  252. */
  253. static int genwqe_open(struct inode *inode, struct file *filp)
  254. {
  255. struct genwqe_dev *cd;
  256. struct genwqe_file *cfile;
  257. cfile = kzalloc(sizeof(*cfile), GFP_KERNEL);
  258. if (cfile == NULL)
  259. return -ENOMEM;
  260. cd = container_of(inode->i_cdev, struct genwqe_dev, cdev_genwqe);
  261. cfile->cd = cd;
  262. cfile->filp = filp;
  263. cfile->client = NULL;
  264. spin_lock_init(&cfile->map_lock); /* list of raw memory allocations */
  265. INIT_LIST_HEAD(&cfile->map_list);
  266. spin_lock_init(&cfile->pin_lock); /* list of user pinned memory */
  267. INIT_LIST_HEAD(&cfile->pin_list);
  268. filp->private_data = cfile;
  269. genwqe_add_file(cd, cfile);
  270. return 0;
  271. }
  272. /**
  273. * genwqe_fasync() - Setup process to receive SIGIO.
  274. * @fd: file descriptor
  275. * @filp: file handle
  276. * @mode: file mode
  277. *
  278. * Sending a signal is working as following:
  279. *
  280. * if (cdev->async_queue)
  281. * kill_fasync(&cdev->async_queue, SIGIO, POLL_IN);
  282. *
  283. * Some devices also implement asynchronous notification to indicate
  284. * when the device can be written; in this case, of course,
  285. * kill_fasync must be called with a mode of POLL_OUT.
  286. */
  287. static int genwqe_fasync(int fd, struct file *filp, int mode)
  288. {
  289. struct genwqe_file *cdev = (struct genwqe_file *)filp->private_data;
  290. return fasync_helper(fd, filp, mode, &cdev->async_queue);
  291. }
  292. /**
  293. * genwqe_release() - file close
  294. * @inode: file system information
  295. * @filp: file handle
  296. *
  297. * This function is executed whenever an application calls 'close(fd_genwqe)'
  298. *
  299. * Return: always 0
  300. */
  301. static int genwqe_release(struct inode *inode, struct file *filp)
  302. {
  303. struct genwqe_file *cfile = (struct genwqe_file *)filp->private_data;
  304. struct genwqe_dev *cd = cfile->cd;
  305. /* there must be no entries in these lists! */
  306. genwqe_remove_mappings(cfile);
  307. genwqe_remove_pinnings(cfile);
  308. /* remove this filp from the asynchronously notified filp's */
  309. genwqe_fasync(-1, filp, 0);
  310. /*
  311. * For this to work we must not release cd when this cfile is
  312. * not yet released, otherwise the list entry is invalid,
  313. * because the list itself gets reinstantiated!
  314. */
  315. genwqe_del_file(cd, cfile);
  316. kfree(cfile);
  317. return 0;
  318. }
  319. static void genwqe_vma_open(struct vm_area_struct *vma)
  320. {
  321. /* nothing ... */
  322. }
  323. /**
  324. * genwqe_vma_close() - Called each time when vma is unmapped
  325. * @vma: VMA area to close
  326. *
  327. * Free memory which got allocated by GenWQE mmap().
  328. */
  329. static void genwqe_vma_close(struct vm_area_struct *vma)
  330. {
  331. unsigned long vsize = vma->vm_end - vma->vm_start;
  332. struct inode *inode = file_inode(vma->vm_file);
  333. struct dma_mapping *dma_map;
  334. struct genwqe_dev *cd = container_of(inode->i_cdev, struct genwqe_dev,
  335. cdev_genwqe);
  336. struct pci_dev *pci_dev = cd->pci_dev;
  337. dma_addr_t d_addr = 0;
  338. struct genwqe_file *cfile = vma->vm_private_data;
  339. dma_map = __genwqe_search_mapping(cfile, vma->vm_start, vsize,
  340. &d_addr, NULL);
  341. if (dma_map == NULL) {
  342. dev_err(&pci_dev->dev,
  343. " [%s] err: mapping not found: v=%lx, p=%lx s=%lx\n",
  344. __func__, vma->vm_start, vma->vm_pgoff << PAGE_SHIFT,
  345. vsize);
  346. return;
  347. }
  348. __genwqe_del_mapping(cfile, dma_map);
  349. __genwqe_free_consistent(cd, dma_map->size, dma_map->k_vaddr,
  350. dma_map->dma_addr);
  351. kfree(dma_map);
  352. }
  353. static const struct vm_operations_struct genwqe_vma_ops = {
  354. .open = genwqe_vma_open,
  355. .close = genwqe_vma_close,
  356. };
  357. /**
  358. * genwqe_mmap() - Provide contignous buffers to userspace
  359. * @filp: File pointer (unused)
  360. * @vma: VMA area to map
  361. *
  362. * We use mmap() to allocate contignous buffers used for DMA
  363. * transfers. After the buffer is allocated we remap it to user-space
  364. * and remember a reference to our dma_mapping data structure, where
  365. * we store the associated DMA address and allocated size.
  366. *
  367. * When we receive a DDCB execution request with the ATS bits set to
  368. * plain buffer, we lookup our dma_mapping list to find the
  369. * corresponding DMA address for the associated user-space address.
  370. */
  371. static int genwqe_mmap(struct file *filp, struct vm_area_struct *vma)
  372. {
  373. int rc;
  374. unsigned long pfn, vsize = vma->vm_end - vma->vm_start;
  375. struct genwqe_file *cfile = (struct genwqe_file *)filp->private_data;
  376. struct genwqe_dev *cd = cfile->cd;
  377. struct dma_mapping *dma_map;
  378. if (vsize == 0)
  379. return -EINVAL;
  380. if (get_order(vsize) > MAX_ORDER)
  381. return -ENOMEM;
  382. dma_map = kzalloc(sizeof(struct dma_mapping), GFP_KERNEL);
  383. if (dma_map == NULL)
  384. return -ENOMEM;
  385. genwqe_mapping_init(dma_map, GENWQE_MAPPING_RAW);
  386. dma_map->u_vaddr = (void *)vma->vm_start;
  387. dma_map->size = vsize;
  388. dma_map->nr_pages = DIV_ROUND_UP(vsize, PAGE_SIZE);
  389. dma_map->k_vaddr = __genwqe_alloc_consistent(cd, vsize,
  390. &dma_map->dma_addr);
  391. if (dma_map->k_vaddr == NULL) {
  392. rc = -ENOMEM;
  393. goto free_dma_map;
  394. }
  395. if (capable(CAP_SYS_ADMIN) && (vsize > sizeof(dma_addr_t)))
  396. *(dma_addr_t *)dma_map->k_vaddr = dma_map->dma_addr;
  397. pfn = virt_to_phys(dma_map->k_vaddr) >> PAGE_SHIFT;
  398. rc = remap_pfn_range(vma,
  399. vma->vm_start,
  400. pfn,
  401. vsize,
  402. vma->vm_page_prot);
  403. if (rc != 0) {
  404. rc = -EFAULT;
  405. goto free_dma_mem;
  406. }
  407. vma->vm_private_data = cfile;
  408. vma->vm_ops = &genwqe_vma_ops;
  409. __genwqe_add_mapping(cfile, dma_map);
  410. return 0;
  411. free_dma_mem:
  412. __genwqe_free_consistent(cd, dma_map->size,
  413. dma_map->k_vaddr,
  414. dma_map->dma_addr);
  415. free_dma_map:
  416. kfree(dma_map);
  417. return rc;
  418. }
  419. #define FLASH_BLOCK 0x40000 /* we use 256k blocks */
  420. /**
  421. * do_flash_update() - Excute flash update (write image or CVPD)
  422. * @cfile: Descriptor of opened file
  423. * @load: details about image load
  424. *
  425. * Return: 0 if successful
  426. */
  427. static int do_flash_update(struct genwqe_file *cfile,
  428. struct genwqe_bitstream *load)
  429. {
  430. int rc = 0;
  431. int blocks_to_flash;
  432. dma_addr_t dma_addr;
  433. u64 flash = 0;
  434. size_t tocopy = 0;
  435. u8 __user *buf;
  436. u8 *xbuf;
  437. u32 crc;
  438. u8 cmdopts;
  439. struct genwqe_dev *cd = cfile->cd;
  440. struct file *filp = cfile->filp;
  441. struct pci_dev *pci_dev = cd->pci_dev;
  442. if ((load->size & 0x3) != 0)
  443. return -EINVAL;
  444. if (((unsigned long)(load->data_addr) & ~PAGE_MASK) != 0)
  445. return -EINVAL;
  446. /* FIXME Bits have changed for new service layer! */
  447. switch ((char)load->partition) {
  448. case '0':
  449. cmdopts = 0x14;
  450. break; /* download/erase_first/part_0 */
  451. case '1':
  452. cmdopts = 0x1C;
  453. break; /* download/erase_first/part_1 */
  454. case 'v':
  455. cmdopts = 0x0C;
  456. break; /* download/erase_first/vpd */
  457. default:
  458. return -EINVAL;
  459. }
  460. buf = (u8 __user *)load->data_addr;
  461. xbuf = __genwqe_alloc_consistent(cd, FLASH_BLOCK, &dma_addr);
  462. if (xbuf == NULL)
  463. return -ENOMEM;
  464. blocks_to_flash = load->size / FLASH_BLOCK;
  465. while (load->size) {
  466. struct genwqe_ddcb_cmd *req;
  467. /*
  468. * We must be 4 byte aligned. Buffer must be 0 appened
  469. * to have defined values when calculating CRC.
  470. */
  471. tocopy = min_t(size_t, load->size, FLASH_BLOCK);
  472. rc = copy_from_user(xbuf, buf, tocopy);
  473. if (rc) {
  474. rc = -EFAULT;
  475. goto free_buffer;
  476. }
  477. crc = genwqe_crc32(xbuf, tocopy, 0xffffffff);
  478. dev_dbg(&pci_dev->dev,
  479. "[%s] DMA: %lx CRC: %08x SZ: %ld %d\n",
  480. __func__, (unsigned long)dma_addr, crc, tocopy,
  481. blocks_to_flash);
  482. /* prepare DDCB for SLU process */
  483. req = ddcb_requ_alloc();
  484. if (req == NULL) {
  485. rc = -ENOMEM;
  486. goto free_buffer;
  487. }
  488. req->cmd = SLCMD_MOVE_FLASH;
  489. req->cmdopts = cmdopts;
  490. /* prepare invariant values */
  491. if (genwqe_get_slu_id(cd) <= 0x2) {
  492. *(__be64 *)&req->__asiv[0] = cpu_to_be64(dma_addr);
  493. *(__be64 *)&req->__asiv[8] = cpu_to_be64(tocopy);
  494. *(__be64 *)&req->__asiv[16] = cpu_to_be64(flash);
  495. *(__be32 *)&req->__asiv[24] = cpu_to_be32(0);
  496. req->__asiv[24] = load->uid;
  497. *(__be32 *)&req->__asiv[28] = cpu_to_be32(crc);
  498. /* for simulation only */
  499. *(__be64 *)&req->__asiv[88] = cpu_to_be64(load->slu_id);
  500. *(__be64 *)&req->__asiv[96] = cpu_to_be64(load->app_id);
  501. req->asiv_length = 32; /* bytes included in crc calc */
  502. } else { /* setup DDCB for ATS architecture */
  503. *(__be64 *)&req->asiv[0] = cpu_to_be64(dma_addr);
  504. *(__be32 *)&req->asiv[8] = cpu_to_be32(tocopy);
  505. *(__be32 *)&req->asiv[12] = cpu_to_be32(0); /* resvd */
  506. *(__be64 *)&req->asiv[16] = cpu_to_be64(flash);
  507. *(__be32 *)&req->asiv[24] = cpu_to_be32(load->uid<<24);
  508. *(__be32 *)&req->asiv[28] = cpu_to_be32(crc);
  509. /* for simulation only */
  510. *(__be64 *)&req->asiv[80] = cpu_to_be64(load->slu_id);
  511. *(__be64 *)&req->asiv[88] = cpu_to_be64(load->app_id);
  512. /* Rd only */
  513. req->ats = 0x4ULL << 44;
  514. req->asiv_length = 40; /* bytes included in crc calc */
  515. }
  516. req->asv_length = 8;
  517. /* For Genwqe5 we get back the calculated CRC */
  518. *(u64 *)&req->asv[0] = 0ULL; /* 0x80 */
  519. rc = __genwqe_execute_raw_ddcb(cd, req, filp->f_flags);
  520. load->retc = req->retc;
  521. load->attn = req->attn;
  522. load->progress = req->progress;
  523. if (rc < 0) {
  524. ddcb_requ_free(req);
  525. goto free_buffer;
  526. }
  527. if (req->retc != DDCB_RETC_COMPLETE) {
  528. rc = -EIO;
  529. ddcb_requ_free(req);
  530. goto free_buffer;
  531. }
  532. load->size -= tocopy;
  533. flash += tocopy;
  534. buf += tocopy;
  535. blocks_to_flash--;
  536. ddcb_requ_free(req);
  537. }
  538. free_buffer:
  539. __genwqe_free_consistent(cd, FLASH_BLOCK, xbuf, dma_addr);
  540. return rc;
  541. }
  542. static int do_flash_read(struct genwqe_file *cfile,
  543. struct genwqe_bitstream *load)
  544. {
  545. int rc, blocks_to_flash;
  546. dma_addr_t dma_addr;
  547. u64 flash = 0;
  548. size_t tocopy = 0;
  549. u8 __user *buf;
  550. u8 *xbuf;
  551. u8 cmdopts;
  552. struct genwqe_dev *cd = cfile->cd;
  553. struct file *filp = cfile->filp;
  554. struct pci_dev *pci_dev = cd->pci_dev;
  555. struct genwqe_ddcb_cmd *cmd;
  556. if ((load->size & 0x3) != 0)
  557. return -EINVAL;
  558. if (((unsigned long)(load->data_addr) & ~PAGE_MASK) != 0)
  559. return -EINVAL;
  560. /* FIXME Bits have changed for new service layer! */
  561. switch ((char)load->partition) {
  562. case '0':
  563. cmdopts = 0x12;
  564. break; /* upload/part_0 */
  565. case '1':
  566. cmdopts = 0x1A;
  567. break; /* upload/part_1 */
  568. case 'v':
  569. cmdopts = 0x0A;
  570. break; /* upload/vpd */
  571. default:
  572. return -EINVAL;
  573. }
  574. buf = (u8 __user *)load->data_addr;
  575. xbuf = __genwqe_alloc_consistent(cd, FLASH_BLOCK, &dma_addr);
  576. if (xbuf == NULL)
  577. return -ENOMEM;
  578. blocks_to_flash = load->size / FLASH_BLOCK;
  579. while (load->size) {
  580. /*
  581. * We must be 4 byte aligned. Buffer must be 0 appened
  582. * to have defined values when calculating CRC.
  583. */
  584. tocopy = min_t(size_t, load->size, FLASH_BLOCK);
  585. dev_dbg(&pci_dev->dev,
  586. "[%s] DMA: %lx SZ: %ld %d\n",
  587. __func__, (unsigned long)dma_addr, tocopy,
  588. blocks_to_flash);
  589. /* prepare DDCB for SLU process */
  590. cmd = ddcb_requ_alloc();
  591. if (cmd == NULL) {
  592. rc = -ENOMEM;
  593. goto free_buffer;
  594. }
  595. cmd->cmd = SLCMD_MOVE_FLASH;
  596. cmd->cmdopts = cmdopts;
  597. /* prepare invariant values */
  598. if (genwqe_get_slu_id(cd) <= 0x2) {
  599. *(__be64 *)&cmd->__asiv[0] = cpu_to_be64(dma_addr);
  600. *(__be64 *)&cmd->__asiv[8] = cpu_to_be64(tocopy);
  601. *(__be64 *)&cmd->__asiv[16] = cpu_to_be64(flash);
  602. *(__be32 *)&cmd->__asiv[24] = cpu_to_be32(0);
  603. cmd->__asiv[24] = load->uid;
  604. *(__be32 *)&cmd->__asiv[28] = cpu_to_be32(0) /* CRC */;
  605. cmd->asiv_length = 32; /* bytes included in crc calc */
  606. } else { /* setup DDCB for ATS architecture */
  607. *(__be64 *)&cmd->asiv[0] = cpu_to_be64(dma_addr);
  608. *(__be32 *)&cmd->asiv[8] = cpu_to_be32(tocopy);
  609. *(__be32 *)&cmd->asiv[12] = cpu_to_be32(0); /* resvd */
  610. *(__be64 *)&cmd->asiv[16] = cpu_to_be64(flash);
  611. *(__be32 *)&cmd->asiv[24] = cpu_to_be32(load->uid<<24);
  612. *(__be32 *)&cmd->asiv[28] = cpu_to_be32(0); /* CRC */
  613. /* rd/wr */
  614. cmd->ats = 0x5ULL << 44;
  615. cmd->asiv_length = 40; /* bytes included in crc calc */
  616. }
  617. cmd->asv_length = 8;
  618. /* we only get back the calculated CRC */
  619. *(u64 *)&cmd->asv[0] = 0ULL; /* 0x80 */
  620. rc = __genwqe_execute_raw_ddcb(cd, cmd, filp->f_flags);
  621. load->retc = cmd->retc;
  622. load->attn = cmd->attn;
  623. load->progress = cmd->progress;
  624. if ((rc < 0) && (rc != -EBADMSG)) {
  625. ddcb_requ_free(cmd);
  626. goto free_buffer;
  627. }
  628. rc = copy_to_user(buf, xbuf, tocopy);
  629. if (rc) {
  630. rc = -EFAULT;
  631. ddcb_requ_free(cmd);
  632. goto free_buffer;
  633. }
  634. /* We know that we can get retc 0x104 with CRC err */
  635. if (((cmd->retc == DDCB_RETC_FAULT) &&
  636. (cmd->attn != 0x02)) || /* Normally ignore CRC error */
  637. ((cmd->retc == DDCB_RETC_COMPLETE) &&
  638. (cmd->attn != 0x00))) { /* Everything was fine */
  639. rc = -EIO;
  640. ddcb_requ_free(cmd);
  641. goto free_buffer;
  642. }
  643. load->size -= tocopy;
  644. flash += tocopy;
  645. buf += tocopy;
  646. blocks_to_flash--;
  647. ddcb_requ_free(cmd);
  648. }
  649. rc = 0;
  650. free_buffer:
  651. __genwqe_free_consistent(cd, FLASH_BLOCK, xbuf, dma_addr);
  652. return rc;
  653. }
  654. static int genwqe_pin_mem(struct genwqe_file *cfile, struct genwqe_mem *m)
  655. {
  656. int rc;
  657. struct genwqe_dev *cd = cfile->cd;
  658. struct pci_dev *pci_dev = cfile->cd->pci_dev;
  659. struct dma_mapping *dma_map;
  660. unsigned long map_addr;
  661. unsigned long map_size;
  662. if ((m->addr == 0x0) || (m->size == 0))
  663. return -EINVAL;
  664. if (m->size > ULONG_MAX - PAGE_SIZE - (m->addr & ~PAGE_MASK))
  665. return -EINVAL;
  666. map_addr = (m->addr & PAGE_MASK);
  667. map_size = round_up(m->size + (m->addr & ~PAGE_MASK), PAGE_SIZE);
  668. dma_map = kzalloc(sizeof(struct dma_mapping), GFP_KERNEL);
  669. if (dma_map == NULL)
  670. return -ENOMEM;
  671. genwqe_mapping_init(dma_map, GENWQE_MAPPING_SGL_PINNED);
  672. rc = genwqe_user_vmap(cd, dma_map, (void *)map_addr, map_size);
  673. if (rc != 0) {
  674. dev_err(&pci_dev->dev,
  675. "[%s] genwqe_user_vmap rc=%d\n", __func__, rc);
  676. kfree(dma_map);
  677. return rc;
  678. }
  679. genwqe_add_pin(cfile, dma_map);
  680. return 0;
  681. }
  682. static int genwqe_unpin_mem(struct genwqe_file *cfile, struct genwqe_mem *m)
  683. {
  684. struct genwqe_dev *cd = cfile->cd;
  685. struct dma_mapping *dma_map;
  686. unsigned long map_addr;
  687. unsigned long map_size;
  688. if (m->addr == 0x0)
  689. return -EINVAL;
  690. map_addr = (m->addr & PAGE_MASK);
  691. map_size = round_up(m->size + (m->addr & ~PAGE_MASK), PAGE_SIZE);
  692. dma_map = genwqe_search_pin(cfile, map_addr, map_size, NULL);
  693. if (dma_map == NULL)
  694. return -ENOENT;
  695. genwqe_del_pin(cfile, dma_map);
  696. genwqe_user_vunmap(cd, dma_map);
  697. kfree(dma_map);
  698. return 0;
  699. }
  700. /**
  701. * ddcb_cmd_cleanup() - Remove dynamically created fixup entries
  702. * @cfile: Descriptor of opened file
  703. * @req: DDCB work request
  704. *
  705. * Only if there are any. Pinnings are not removed.
  706. */
  707. static int ddcb_cmd_cleanup(struct genwqe_file *cfile, struct ddcb_requ *req)
  708. {
  709. unsigned int i;
  710. struct dma_mapping *dma_map;
  711. struct genwqe_dev *cd = cfile->cd;
  712. for (i = 0; i < DDCB_FIXUPS; i++) {
  713. dma_map = &req->dma_mappings[i];
  714. if (dma_mapping_used(dma_map)) {
  715. __genwqe_del_mapping(cfile, dma_map);
  716. genwqe_user_vunmap(cd, dma_map);
  717. }
  718. if (req->sgls[i].sgl != NULL)
  719. genwqe_free_sync_sgl(cd, &req->sgls[i]);
  720. }
  721. return 0;
  722. }
  723. /**
  724. * ddcb_cmd_fixups() - Establish DMA fixups/sglists for user memory references
  725. * @cfile: Descriptor of opened file
  726. * @req: DDCB work request
  727. *
  728. * Before the DDCB gets executed we need to handle the fixups. We
  729. * replace the user-space addresses with DMA addresses or do
  730. * additional setup work e.g. generating a scatter-gather list which
  731. * is used to describe the memory referred to in the fixup.
  732. */
  733. static int ddcb_cmd_fixups(struct genwqe_file *cfile, struct ddcb_requ *req)
  734. {
  735. int rc;
  736. unsigned int asiv_offs, i;
  737. struct genwqe_dev *cd = cfile->cd;
  738. struct genwqe_ddcb_cmd *cmd = &req->cmd;
  739. struct dma_mapping *m;
  740. for (i = 0, asiv_offs = 0x00; asiv_offs <= 0x58;
  741. i++, asiv_offs += 0x08) {
  742. u64 u_addr;
  743. dma_addr_t d_addr;
  744. u32 u_size = 0;
  745. u64 ats_flags;
  746. ats_flags = ATS_GET_FLAGS(cmd->ats, asiv_offs);
  747. switch (ats_flags) {
  748. case ATS_TYPE_DATA:
  749. break; /* nothing to do here */
  750. case ATS_TYPE_FLAT_RDWR:
  751. case ATS_TYPE_FLAT_RD: {
  752. u_addr = be64_to_cpu(*((__be64 *)&cmd->
  753. asiv[asiv_offs]));
  754. u_size = be32_to_cpu(*((__be32 *)&cmd->
  755. asiv[asiv_offs + 0x08]));
  756. /*
  757. * No data available. Ignore u_addr in this
  758. * case and set addr to 0. Hardware must not
  759. * fetch the buffer.
  760. */
  761. if (u_size == 0x0) {
  762. *((__be64 *)&cmd->asiv[asiv_offs]) =
  763. cpu_to_be64(0x0);
  764. break;
  765. }
  766. m = __genwqe_search_mapping(cfile, u_addr, u_size,
  767. &d_addr, NULL);
  768. if (m == NULL) {
  769. rc = -EFAULT;
  770. goto err_out;
  771. }
  772. *((__be64 *)&cmd->asiv[asiv_offs]) =
  773. cpu_to_be64(d_addr);
  774. break;
  775. }
  776. case ATS_TYPE_SGL_RDWR:
  777. case ATS_TYPE_SGL_RD: {
  778. int page_offs;
  779. u_addr = be64_to_cpu(*((__be64 *)
  780. &cmd->asiv[asiv_offs]));
  781. u_size = be32_to_cpu(*((__be32 *)
  782. &cmd->asiv[asiv_offs + 0x08]));
  783. /*
  784. * No data available. Ignore u_addr in this
  785. * case and set addr to 0. Hardware must not
  786. * fetch the empty sgl.
  787. */
  788. if (u_size == 0x0) {
  789. *((__be64 *)&cmd->asiv[asiv_offs]) =
  790. cpu_to_be64(0x0);
  791. break;
  792. }
  793. m = genwqe_search_pin(cfile, u_addr, u_size, NULL);
  794. if (m != NULL) {
  795. page_offs = (u_addr -
  796. (u64)m->u_vaddr)/PAGE_SIZE;
  797. } else {
  798. m = &req->dma_mappings[i];
  799. genwqe_mapping_init(m,
  800. GENWQE_MAPPING_SGL_TEMP);
  801. if (ats_flags == ATS_TYPE_SGL_RD)
  802. m->write = 0;
  803. rc = genwqe_user_vmap(cd, m, (void *)u_addr,
  804. u_size);
  805. if (rc != 0)
  806. goto err_out;
  807. __genwqe_add_mapping(cfile, m);
  808. page_offs = 0;
  809. }
  810. /* create genwqe style scatter gather list */
  811. rc = genwqe_alloc_sync_sgl(cd, &req->sgls[i],
  812. (void __user *)u_addr,
  813. u_size, m->write);
  814. if (rc != 0)
  815. goto err_out;
  816. genwqe_setup_sgl(cd, &req->sgls[i],
  817. &m->dma_list[page_offs]);
  818. *((__be64 *)&cmd->asiv[asiv_offs]) =
  819. cpu_to_be64(req->sgls[i].sgl_dma_addr);
  820. break;
  821. }
  822. default:
  823. rc = -EINVAL;
  824. goto err_out;
  825. }
  826. }
  827. return 0;
  828. err_out:
  829. ddcb_cmd_cleanup(cfile, req);
  830. return rc;
  831. }
  832. /**
  833. * genwqe_execute_ddcb() - Execute DDCB using userspace address fixups
  834. * @cfile: Descriptor of opened file
  835. * @cmd: Command identifier (passed from user)
  836. *
  837. * The code will build up the translation tables or lookup the
  838. * contignous memory allocation table to find the right translations
  839. * and DMA addresses.
  840. */
  841. static int genwqe_execute_ddcb(struct genwqe_file *cfile,
  842. struct genwqe_ddcb_cmd *cmd)
  843. {
  844. int rc;
  845. struct genwqe_dev *cd = cfile->cd;
  846. struct file *filp = cfile->filp;
  847. struct ddcb_requ *req = container_of(cmd, struct ddcb_requ, cmd);
  848. rc = ddcb_cmd_fixups(cfile, req);
  849. if (rc != 0)
  850. return rc;
  851. rc = __genwqe_execute_raw_ddcb(cd, cmd, filp->f_flags);
  852. ddcb_cmd_cleanup(cfile, req);
  853. return rc;
  854. }
  855. static int do_execute_ddcb(struct genwqe_file *cfile,
  856. unsigned long arg, int raw)
  857. {
  858. int rc;
  859. struct genwqe_ddcb_cmd *cmd;
  860. struct genwqe_dev *cd = cfile->cd;
  861. struct file *filp = cfile->filp;
  862. cmd = ddcb_requ_alloc();
  863. if (cmd == NULL)
  864. return -ENOMEM;
  865. if (copy_from_user(cmd, (void __user *)arg, sizeof(*cmd))) {
  866. ddcb_requ_free(cmd);
  867. return -EFAULT;
  868. }
  869. if (!raw)
  870. rc = genwqe_execute_ddcb(cfile, cmd);
  871. else
  872. rc = __genwqe_execute_raw_ddcb(cd, cmd, filp->f_flags);
  873. /* Copy back only the modifed fields. Do not copy ASIV
  874. back since the copy got modified by the driver. */
  875. if (copy_to_user((void __user *)arg, cmd,
  876. sizeof(*cmd) - DDCB_ASIV_LENGTH)) {
  877. ddcb_requ_free(cmd);
  878. return -EFAULT;
  879. }
  880. ddcb_requ_free(cmd);
  881. return rc;
  882. }
  883. /**
  884. * genwqe_ioctl() - IO control
  885. * @filp: file handle
  886. * @cmd: command identifier (passed from user)
  887. * @arg: argument (passed from user)
  888. *
  889. * Return: 0 success
  890. */
  891. static long genwqe_ioctl(struct file *filp, unsigned int cmd,
  892. unsigned long arg)
  893. {
  894. int rc = 0;
  895. struct genwqe_file *cfile = (struct genwqe_file *)filp->private_data;
  896. struct genwqe_dev *cd = cfile->cd;
  897. struct pci_dev *pci_dev = cd->pci_dev;
  898. struct genwqe_reg_io __user *io;
  899. u64 val;
  900. u32 reg_offs;
  901. /* Return -EIO if card hit EEH */
  902. if (pci_channel_offline(pci_dev))
  903. return -EIO;
  904. if (_IOC_TYPE(cmd) != GENWQE_IOC_CODE)
  905. return -EINVAL;
  906. switch (cmd) {
  907. case GENWQE_GET_CARD_STATE:
  908. put_user(cd->card_state, (enum genwqe_card_state __user *)arg);
  909. return 0;
  910. /* Register access */
  911. case GENWQE_READ_REG64: {
  912. io = (struct genwqe_reg_io __user *)arg;
  913. if (get_user(reg_offs, &io->num))
  914. return -EFAULT;
  915. if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x7))
  916. return -EINVAL;
  917. val = __genwqe_readq(cd, reg_offs);
  918. put_user(val, &io->val64);
  919. return 0;
  920. }
  921. case GENWQE_WRITE_REG64: {
  922. io = (struct genwqe_reg_io __user *)arg;
  923. if (!capable(CAP_SYS_ADMIN))
  924. return -EPERM;
  925. if ((filp->f_flags & O_ACCMODE) == O_RDONLY)
  926. return -EPERM;
  927. if (get_user(reg_offs, &io->num))
  928. return -EFAULT;
  929. if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x7))
  930. return -EINVAL;
  931. if (get_user(val, &io->val64))
  932. return -EFAULT;
  933. __genwqe_writeq(cd, reg_offs, val);
  934. return 0;
  935. }
  936. case GENWQE_READ_REG32: {
  937. io = (struct genwqe_reg_io __user *)arg;
  938. if (get_user(reg_offs, &io->num))
  939. return -EFAULT;
  940. if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x3))
  941. return -EINVAL;
  942. val = __genwqe_readl(cd, reg_offs);
  943. put_user(val, &io->val64);
  944. return 0;
  945. }
  946. case GENWQE_WRITE_REG32: {
  947. io = (struct genwqe_reg_io __user *)arg;
  948. if (!capable(CAP_SYS_ADMIN))
  949. return -EPERM;
  950. if ((filp->f_flags & O_ACCMODE) == O_RDONLY)
  951. return -EPERM;
  952. if (get_user(reg_offs, &io->num))
  953. return -EFAULT;
  954. if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x3))
  955. return -EINVAL;
  956. if (get_user(val, &io->val64))
  957. return -EFAULT;
  958. __genwqe_writel(cd, reg_offs, val);
  959. return 0;
  960. }
  961. /* Flash update/reading */
  962. case GENWQE_SLU_UPDATE: {
  963. struct genwqe_bitstream load;
  964. if (!genwqe_is_privileged(cd))
  965. return -EPERM;
  966. if ((filp->f_flags & O_ACCMODE) == O_RDONLY)
  967. return -EPERM;
  968. if (copy_from_user(&load, (void __user *)arg,
  969. sizeof(load)))
  970. return -EFAULT;
  971. rc = do_flash_update(cfile, &load);
  972. if (copy_to_user((void __user *)arg, &load, sizeof(load)))
  973. return -EFAULT;
  974. return rc;
  975. }
  976. case GENWQE_SLU_READ: {
  977. struct genwqe_bitstream load;
  978. if (!genwqe_is_privileged(cd))
  979. return -EPERM;
  980. if (genwqe_flash_readback_fails(cd))
  981. return -ENOSPC; /* known to fail for old versions */
  982. if (copy_from_user(&load, (void __user *)arg, sizeof(load)))
  983. return -EFAULT;
  984. rc = do_flash_read(cfile, &load);
  985. if (copy_to_user((void __user *)arg, &load, sizeof(load)))
  986. return -EFAULT;
  987. return rc;
  988. }
  989. /* memory pinning and unpinning */
  990. case GENWQE_PIN_MEM: {
  991. struct genwqe_mem m;
  992. if (copy_from_user(&m, (void __user *)arg, sizeof(m)))
  993. return -EFAULT;
  994. return genwqe_pin_mem(cfile, &m);
  995. }
  996. case GENWQE_UNPIN_MEM: {
  997. struct genwqe_mem m;
  998. if (copy_from_user(&m, (void __user *)arg, sizeof(m)))
  999. return -EFAULT;
  1000. return genwqe_unpin_mem(cfile, &m);
  1001. }
  1002. /* launch an DDCB and wait for completion */
  1003. case GENWQE_EXECUTE_DDCB:
  1004. return do_execute_ddcb(cfile, arg, 0);
  1005. case GENWQE_EXECUTE_RAW_DDCB: {
  1006. if (!capable(CAP_SYS_ADMIN))
  1007. return -EPERM;
  1008. return do_execute_ddcb(cfile, arg, 1);
  1009. }
  1010. default:
  1011. return -EINVAL;
  1012. }
  1013. return rc;
  1014. }
  1015. static const struct file_operations genwqe_fops = {
  1016. .owner = THIS_MODULE,
  1017. .open = genwqe_open,
  1018. .fasync = genwqe_fasync,
  1019. .mmap = genwqe_mmap,
  1020. .unlocked_ioctl = genwqe_ioctl,
  1021. .compat_ioctl = compat_ptr_ioctl,
  1022. .release = genwqe_release,
  1023. };
  1024. static int genwqe_device_initialized(struct genwqe_dev *cd)
  1025. {
  1026. return cd->dev != NULL;
  1027. }
  1028. /**
  1029. * genwqe_device_create() - Create and configure genwqe char device
  1030. * @cd: genwqe device descriptor
  1031. *
  1032. * This function must be called before we create any more genwqe
  1033. * character devices, because it is allocating the major and minor
  1034. * number which are supposed to be used by the client drivers.
  1035. */
  1036. int genwqe_device_create(struct genwqe_dev *cd)
  1037. {
  1038. int rc;
  1039. struct pci_dev *pci_dev = cd->pci_dev;
  1040. /*
  1041. * Here starts the individual setup per client. It must
  1042. * initialize its own cdev data structure with its own fops.
  1043. * The appropriate devnum needs to be created. The ranges must
  1044. * not overlap.
  1045. */
  1046. rc = alloc_chrdev_region(&cd->devnum_genwqe, 0,
  1047. GENWQE_MAX_MINOR, GENWQE_DEVNAME);
  1048. if (rc < 0) {
  1049. dev_err(&pci_dev->dev, "err: alloc_chrdev_region failed\n");
  1050. goto err_dev;
  1051. }
  1052. cdev_init(&cd->cdev_genwqe, &genwqe_fops);
  1053. cd->cdev_genwqe.owner = THIS_MODULE;
  1054. rc = cdev_add(&cd->cdev_genwqe, cd->devnum_genwqe, 1);
  1055. if (rc < 0) {
  1056. dev_err(&pci_dev->dev, "err: cdev_add failed\n");
  1057. goto err_add;
  1058. }
  1059. /*
  1060. * Finally the device in /dev/... must be created. The rule is
  1061. * to use card%d_clientname for each created device.
  1062. */
  1063. cd->dev = device_create_with_groups(cd->class_genwqe,
  1064. &cd->pci_dev->dev,
  1065. cd->devnum_genwqe, cd,
  1066. genwqe_attribute_groups,
  1067. GENWQE_DEVNAME "%u_card",
  1068. cd->card_idx);
  1069. if (IS_ERR(cd->dev)) {
  1070. rc = PTR_ERR(cd->dev);
  1071. goto err_cdev;
  1072. }
  1073. genwqe_init_debugfs(cd);
  1074. return 0;
  1075. err_cdev:
  1076. cdev_del(&cd->cdev_genwqe);
  1077. err_add:
  1078. unregister_chrdev_region(cd->devnum_genwqe, GENWQE_MAX_MINOR);
  1079. err_dev:
  1080. cd->dev = NULL;
  1081. return rc;
  1082. }
  1083. static int genwqe_inform_and_stop_processes(struct genwqe_dev *cd)
  1084. {
  1085. int rc;
  1086. unsigned int i;
  1087. struct pci_dev *pci_dev = cd->pci_dev;
  1088. if (!genwqe_open_files(cd))
  1089. return 0;
  1090. dev_warn(&pci_dev->dev, "[%s] send SIGIO and wait ...\n", __func__);
  1091. rc = genwqe_kill_fasync(cd, SIGIO);
  1092. if (rc > 0) {
  1093. /* give kill_timeout seconds to close file descriptors ... */
  1094. for (i = 0; (i < GENWQE_KILL_TIMEOUT) &&
  1095. genwqe_open_files(cd); i++) {
  1096. dev_info(&pci_dev->dev, " %d sec ...", i);
  1097. cond_resched();
  1098. msleep(1000);
  1099. }
  1100. /* if no open files we can safely continue, else ... */
  1101. if (!genwqe_open_files(cd))
  1102. return 0;
  1103. dev_warn(&pci_dev->dev,
  1104. "[%s] send SIGKILL and wait ...\n", __func__);
  1105. rc = genwqe_terminate(cd);
  1106. if (rc) {
  1107. /* Give kill_timout more seconds to end processes */
  1108. for (i = 0; (i < GENWQE_KILL_TIMEOUT) &&
  1109. genwqe_open_files(cd); i++) {
  1110. dev_warn(&pci_dev->dev, " %d sec ...", i);
  1111. cond_resched();
  1112. msleep(1000);
  1113. }
  1114. }
  1115. }
  1116. return 0;
  1117. }
  1118. /**
  1119. * genwqe_device_remove() - Remove genwqe's char device
  1120. * @cd: GenWQE device information
  1121. *
  1122. * This function must be called after the client devices are removed
  1123. * because it will free the major/minor number range for the genwqe
  1124. * drivers.
  1125. *
  1126. * This function must be robust enough to be called twice.
  1127. */
  1128. int genwqe_device_remove(struct genwqe_dev *cd)
  1129. {
  1130. int rc;
  1131. struct pci_dev *pci_dev = cd->pci_dev;
  1132. if (!genwqe_device_initialized(cd))
  1133. return 1;
  1134. genwqe_inform_and_stop_processes(cd);
  1135. /*
  1136. * We currently do wait until all filedescriptors are
  1137. * closed. This leads to a problem when we abort the
  1138. * application which will decrease this reference from
  1139. * 1/unused to 0/illegal and not from 2/used 1/empty.
  1140. */
  1141. rc = kref_read(&cd->cdev_genwqe.kobj.kref);
  1142. if (rc != 1) {
  1143. dev_err(&pci_dev->dev,
  1144. "[%s] err: cdev_genwqe...refcount=%d\n", __func__, rc);
  1145. panic("Fatal err: cannot free resources with pending references!");
  1146. }
  1147. genqwe_exit_debugfs(cd);
  1148. device_destroy(cd->class_genwqe, cd->devnum_genwqe);
  1149. cdev_del(&cd->cdev_genwqe);
  1150. unregister_chrdev_region(cd->devnum_genwqe, GENWQE_MAX_MINOR);
  1151. cd->dev = NULL;
  1152. return 0;
  1153. }