sun6i-msgbox.c 8.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // Copyright (c) 2017-2019 Samuel Holland <samuel@sholland.org>
  4. #include <linux/bitops.h>
  5. #include <linux/clk.h>
  6. #include <linux/device.h>
  7. #include <linux/err.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/io.h>
  10. #include <linux/kernel.h>
  11. #include <linux/mailbox_controller.h>
  12. #include <linux/module.h>
  13. #include <linux/of.h>
  14. #include <linux/of_irq.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/reset.h>
  17. #include <linux/spinlock.h>
  18. #define NUM_CHANS 8
  19. #define CTRL_REG(n) (0x0000 + 0x4 * ((n) / 4))
  20. #define CTRL_RX(n) BIT(0 + 8 * ((n) % 4))
  21. #define CTRL_TX(n) BIT(4 + 8 * ((n) % 4))
  22. #define REMOTE_IRQ_EN_REG 0x0040
  23. #define REMOTE_IRQ_STAT_REG 0x0050
  24. #define LOCAL_IRQ_EN_REG 0x0060
  25. #define LOCAL_IRQ_STAT_REG 0x0070
  26. #define RX_IRQ(n) BIT(0 + 2 * (n))
  27. #define RX_IRQ_MASK 0x5555
  28. #define TX_IRQ(n) BIT(1 + 2 * (n))
  29. #define TX_IRQ_MASK 0xaaaa
  30. #define FIFO_STAT_REG(n) (0x0100 + 0x4 * (n))
  31. #define FIFO_STAT_MASK GENMASK(0, 0)
  32. #define MSG_STAT_REG(n) (0x0140 + 0x4 * (n))
  33. #define MSG_STAT_MASK GENMASK(2, 0)
  34. #define MSG_DATA_REG(n) (0x0180 + 0x4 * (n))
  35. #define mbox_dbg(mbox, ...) dev_dbg((mbox)->controller.dev, __VA_ARGS__)
  36. struct sun6i_msgbox {
  37. struct mbox_controller controller;
  38. struct clk *clk;
  39. spinlock_t lock;
  40. void __iomem *regs;
  41. };
  42. static bool sun6i_msgbox_last_tx_done(struct mbox_chan *chan);
  43. static bool sun6i_msgbox_peek_data(struct mbox_chan *chan);
  44. static inline int channel_number(struct mbox_chan *chan)
  45. {
  46. return chan - chan->mbox->chans;
  47. }
  48. static inline struct sun6i_msgbox *to_sun6i_msgbox(struct mbox_chan *chan)
  49. {
  50. return chan->con_priv;
  51. }
  52. static irqreturn_t sun6i_msgbox_irq(int irq, void *dev_id)
  53. {
  54. struct sun6i_msgbox *mbox = dev_id;
  55. uint32_t status;
  56. int n;
  57. /* Only examine channels that are currently enabled. */
  58. status = readl(mbox->regs + LOCAL_IRQ_EN_REG) &
  59. readl(mbox->regs + LOCAL_IRQ_STAT_REG);
  60. if (!(status & RX_IRQ_MASK))
  61. return IRQ_NONE;
  62. for (n = 0; n < NUM_CHANS; ++n) {
  63. struct mbox_chan *chan = &mbox->controller.chans[n];
  64. if (!(status & RX_IRQ(n)))
  65. continue;
  66. while (sun6i_msgbox_peek_data(chan)) {
  67. uint32_t msg = readl(mbox->regs + MSG_DATA_REG(n));
  68. mbox_dbg(mbox, "Channel %d received 0x%08x\n", n, msg);
  69. mbox_chan_received_data(chan, &msg);
  70. }
  71. /* The IRQ can be cleared only once the FIFO is empty. */
  72. writel(RX_IRQ(n), mbox->regs + LOCAL_IRQ_STAT_REG);
  73. }
  74. return IRQ_HANDLED;
  75. }
  76. static int sun6i_msgbox_send_data(struct mbox_chan *chan, void *data)
  77. {
  78. struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan);
  79. int n = channel_number(chan);
  80. uint32_t msg = *(uint32_t *)data;
  81. /* Using a channel backwards gets the hardware into a bad state. */
  82. if (WARN_ON_ONCE(!(readl(mbox->regs + CTRL_REG(n)) & CTRL_TX(n))))
  83. return 0;
  84. writel(msg, mbox->regs + MSG_DATA_REG(n));
  85. mbox_dbg(mbox, "Channel %d sent 0x%08x\n", n, msg);
  86. return 0;
  87. }
  88. static int sun6i_msgbox_startup(struct mbox_chan *chan)
  89. {
  90. struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan);
  91. int n = channel_number(chan);
  92. /* The coprocessor is responsible for setting channel directions. */
  93. if (readl(mbox->regs + CTRL_REG(n)) & CTRL_RX(n)) {
  94. /* Flush the receive FIFO. */
  95. while (sun6i_msgbox_peek_data(chan))
  96. readl(mbox->regs + MSG_DATA_REG(n));
  97. writel(RX_IRQ(n), mbox->regs + LOCAL_IRQ_STAT_REG);
  98. /* Enable the receive IRQ. */
  99. spin_lock(&mbox->lock);
  100. writel(readl(mbox->regs + LOCAL_IRQ_EN_REG) | RX_IRQ(n),
  101. mbox->regs + LOCAL_IRQ_EN_REG);
  102. spin_unlock(&mbox->lock);
  103. }
  104. mbox_dbg(mbox, "Channel %d startup complete\n", n);
  105. return 0;
  106. }
  107. static void sun6i_msgbox_shutdown(struct mbox_chan *chan)
  108. {
  109. struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan);
  110. int n = channel_number(chan);
  111. if (readl(mbox->regs + CTRL_REG(n)) & CTRL_RX(n)) {
  112. /* Disable the receive IRQ. */
  113. spin_lock(&mbox->lock);
  114. writel(readl(mbox->regs + LOCAL_IRQ_EN_REG) & ~RX_IRQ(n),
  115. mbox->regs + LOCAL_IRQ_EN_REG);
  116. spin_unlock(&mbox->lock);
  117. /* Attempt to flush the FIFO until the IRQ is cleared. */
  118. do {
  119. while (sun6i_msgbox_peek_data(chan))
  120. readl(mbox->regs + MSG_DATA_REG(n));
  121. writel(RX_IRQ(n), mbox->regs + LOCAL_IRQ_STAT_REG);
  122. } while (readl(mbox->regs + LOCAL_IRQ_STAT_REG) & RX_IRQ(n));
  123. }
  124. mbox_dbg(mbox, "Channel %d shutdown complete\n", n);
  125. }
  126. static bool sun6i_msgbox_last_tx_done(struct mbox_chan *chan)
  127. {
  128. struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan);
  129. int n = channel_number(chan);
  130. /*
  131. * The hardware allows snooping on the remote user's IRQ statuses.
  132. * We consider a message to be acknowledged only once the receive IRQ
  133. * for that channel is cleared. Since the receive IRQ for a channel
  134. * cannot be cleared until the FIFO for that channel is empty, this
  135. * ensures that the message has actually been read. It also gives the
  136. * recipient an opportunity to perform minimal processing before
  137. * acknowledging the message.
  138. */
  139. return !(readl(mbox->regs + REMOTE_IRQ_STAT_REG) & RX_IRQ(n));
  140. }
  141. static bool sun6i_msgbox_peek_data(struct mbox_chan *chan)
  142. {
  143. struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan);
  144. int n = channel_number(chan);
  145. return readl(mbox->regs + MSG_STAT_REG(n)) & MSG_STAT_MASK;
  146. }
  147. static const struct mbox_chan_ops sun6i_msgbox_chan_ops = {
  148. .send_data = sun6i_msgbox_send_data,
  149. .startup = sun6i_msgbox_startup,
  150. .shutdown = sun6i_msgbox_shutdown,
  151. .last_tx_done = sun6i_msgbox_last_tx_done,
  152. .peek_data = sun6i_msgbox_peek_data,
  153. };
  154. static int sun6i_msgbox_probe(struct platform_device *pdev)
  155. {
  156. struct device *dev = &pdev->dev;
  157. struct mbox_chan *chans;
  158. struct reset_control *reset;
  159. struct resource *res;
  160. struct sun6i_msgbox *mbox;
  161. int i, ret;
  162. mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
  163. if (!mbox)
  164. return -ENOMEM;
  165. chans = devm_kcalloc(dev, NUM_CHANS, sizeof(*chans), GFP_KERNEL);
  166. if (!chans)
  167. return -ENOMEM;
  168. for (i = 0; i < NUM_CHANS; ++i)
  169. chans[i].con_priv = mbox;
  170. mbox->clk = devm_clk_get(dev, NULL);
  171. if (IS_ERR(mbox->clk)) {
  172. ret = PTR_ERR(mbox->clk);
  173. dev_err(dev, "Failed to get clock: %d\n", ret);
  174. return ret;
  175. }
  176. ret = clk_prepare_enable(mbox->clk);
  177. if (ret) {
  178. dev_err(dev, "Failed to enable clock: %d\n", ret);
  179. return ret;
  180. }
  181. reset = devm_reset_control_get_exclusive(dev, NULL);
  182. if (IS_ERR(reset)) {
  183. ret = PTR_ERR(reset);
  184. dev_err(dev, "Failed to get reset control: %d\n", ret);
  185. goto err_disable_unprepare;
  186. }
  187. /*
  188. * NOTE: We rely on platform firmware to preconfigure the channel
  189. * directions, and we share this hardware block with other firmware
  190. * that runs concurrently with Linux (e.g. a trusted monitor).
  191. *
  192. * Therefore, we do *not* assert the reset line if probing fails or
  193. * when removing the device.
  194. */
  195. ret = reset_control_deassert(reset);
  196. if (ret) {
  197. dev_err(dev, "Failed to deassert reset: %d\n", ret);
  198. goto err_disable_unprepare;
  199. }
  200. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  201. if (!res) {
  202. ret = -ENODEV;
  203. goto err_disable_unprepare;
  204. }
  205. mbox->regs = devm_ioremap_resource(&pdev->dev, res);
  206. if (IS_ERR(mbox->regs)) {
  207. ret = PTR_ERR(mbox->regs);
  208. dev_err(dev, "Failed to map MMIO resource: %d\n", ret);
  209. goto err_disable_unprepare;
  210. }
  211. /* Disable all IRQs for this end of the msgbox. */
  212. writel(0, mbox->regs + LOCAL_IRQ_EN_REG);
  213. ret = devm_request_irq(dev, irq_of_parse_and_map(dev->of_node, 0),
  214. sun6i_msgbox_irq, 0, dev_name(dev), mbox);
  215. if (ret) {
  216. dev_err(dev, "Failed to register IRQ handler: %d\n", ret);
  217. goto err_disable_unprepare;
  218. }
  219. mbox->controller.dev = dev;
  220. mbox->controller.ops = &sun6i_msgbox_chan_ops;
  221. mbox->controller.chans = chans;
  222. mbox->controller.num_chans = NUM_CHANS;
  223. mbox->controller.txdone_irq = false;
  224. mbox->controller.txdone_poll = true;
  225. mbox->controller.txpoll_period = 5;
  226. spin_lock_init(&mbox->lock);
  227. platform_set_drvdata(pdev, mbox);
  228. ret = mbox_controller_register(&mbox->controller);
  229. if (ret) {
  230. dev_err(dev, "Failed to register controller: %d\n", ret);
  231. goto err_disable_unprepare;
  232. }
  233. return 0;
  234. err_disable_unprepare:
  235. clk_disable_unprepare(mbox->clk);
  236. return ret;
  237. }
  238. static int sun6i_msgbox_remove(struct platform_device *pdev)
  239. {
  240. struct sun6i_msgbox *mbox = platform_get_drvdata(pdev);
  241. mbox_controller_unregister(&mbox->controller);
  242. /* See the comment in sun6i_msgbox_probe about the reset line. */
  243. clk_disable_unprepare(mbox->clk);
  244. return 0;
  245. }
  246. static const struct of_device_id sun6i_msgbox_of_match[] = {
  247. { .compatible = "allwinner,sun6i-a31-msgbox", },
  248. {},
  249. };
  250. MODULE_DEVICE_TABLE(of, sun6i_msgbox_of_match);
  251. static struct platform_driver sun6i_msgbox_driver = {
  252. .driver = {
  253. .name = "sun6i-msgbox",
  254. .of_match_table = sun6i_msgbox_of_match,
  255. },
  256. .probe = sun6i_msgbox_probe,
  257. .remove = sun6i_msgbox_remove,
  258. };
  259. module_platform_driver(sun6i_msgbox_driver);
  260. MODULE_AUTHOR("Samuel Holland <samuel@sholland.org>");
  261. MODULE_DESCRIPTION("Allwinner sun6i/sun8i/sun9i/sun50i Message Box");
  262. MODULE_LICENSE("GPL v2");