sprd-mailbox.c 10.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Spreadtrum mailbox driver
  4. *
  5. * Copyright (c) 2020 Spreadtrum Communications Inc.
  6. */
  7. #include <linux/delay.h>
  8. #include <linux/err.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/io.h>
  11. #include <linux/mailbox_controller.h>
  12. #include <linux/module.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/clk.h>
  15. #define SPRD_MBOX_ID 0x0
  16. #define SPRD_MBOX_MSG_LOW 0x4
  17. #define SPRD_MBOX_MSG_HIGH 0x8
  18. #define SPRD_MBOX_TRIGGER 0xc
  19. #define SPRD_MBOX_FIFO_RST 0x10
  20. #define SPRD_MBOX_FIFO_STS 0x14
  21. #define SPRD_MBOX_IRQ_STS 0x18
  22. #define SPRD_MBOX_IRQ_MSK 0x1c
  23. #define SPRD_MBOX_LOCK 0x20
  24. #define SPRD_MBOX_FIFO_DEPTH 0x24
  25. /* Bit and mask definiation for inbox's SPRD_MBOX_FIFO_STS register */
  26. #define SPRD_INBOX_FIFO_DELIVER_MASK GENMASK(23, 16)
  27. #define SPRD_INBOX_FIFO_OVERLOW_MASK GENMASK(15, 8)
  28. #define SPRD_INBOX_FIFO_DELIVER_SHIFT 16
  29. #define SPRD_INBOX_FIFO_BUSY_MASK GENMASK(7, 0)
  30. /* Bit and mask definiation for SPRD_MBOX_IRQ_STS register */
  31. #define SPRD_MBOX_IRQ_CLR BIT(0)
  32. /* Bit and mask definiation for outbox's SPRD_MBOX_FIFO_STS register */
  33. #define SPRD_OUTBOX_FIFO_FULL BIT(2)
  34. #define SPRD_OUTBOX_FIFO_WR_SHIFT 16
  35. #define SPRD_OUTBOX_FIFO_RD_SHIFT 24
  36. #define SPRD_OUTBOX_FIFO_POS_MASK GENMASK(7, 0)
  37. /* Bit and mask definiation for inbox's SPRD_MBOX_IRQ_MSK register */
  38. #define SPRD_INBOX_FIFO_BLOCK_IRQ BIT(0)
  39. #define SPRD_INBOX_FIFO_OVERFLOW_IRQ BIT(1)
  40. #define SPRD_INBOX_FIFO_DELIVER_IRQ BIT(2)
  41. #define SPRD_INBOX_FIFO_IRQ_MASK GENMASK(2, 0)
  42. /* Bit and mask definiation for outbox's SPRD_MBOX_IRQ_MSK register */
  43. #define SPRD_OUTBOX_FIFO_NOT_EMPTY_IRQ BIT(0)
  44. #define SPRD_OUTBOX_FIFO_IRQ_MASK GENMASK(4, 0)
  45. #define SPRD_MBOX_CHAN_MAX 8
  46. struct sprd_mbox_priv {
  47. struct mbox_controller mbox;
  48. struct device *dev;
  49. void __iomem *inbox_base;
  50. void __iomem *outbox_base;
  51. struct clk *clk;
  52. u32 outbox_fifo_depth;
  53. struct mutex lock;
  54. u32 refcnt;
  55. struct mbox_chan chan[SPRD_MBOX_CHAN_MAX];
  56. };
  57. static struct sprd_mbox_priv *to_sprd_mbox_priv(struct mbox_controller *mbox)
  58. {
  59. return container_of(mbox, struct sprd_mbox_priv, mbox);
  60. }
  61. static u32 sprd_mbox_get_fifo_len(struct sprd_mbox_priv *priv, u32 fifo_sts)
  62. {
  63. u32 wr_pos = (fifo_sts >> SPRD_OUTBOX_FIFO_WR_SHIFT) &
  64. SPRD_OUTBOX_FIFO_POS_MASK;
  65. u32 rd_pos = (fifo_sts >> SPRD_OUTBOX_FIFO_RD_SHIFT) &
  66. SPRD_OUTBOX_FIFO_POS_MASK;
  67. u32 fifo_len;
  68. /*
  69. * If the read pointer is equal with write pointer, which means the fifo
  70. * is full or empty.
  71. */
  72. if (wr_pos == rd_pos) {
  73. if (fifo_sts & SPRD_OUTBOX_FIFO_FULL)
  74. fifo_len = priv->outbox_fifo_depth;
  75. else
  76. fifo_len = 0;
  77. } else if (wr_pos > rd_pos) {
  78. fifo_len = wr_pos - rd_pos;
  79. } else {
  80. fifo_len = priv->outbox_fifo_depth - rd_pos + wr_pos;
  81. }
  82. return fifo_len;
  83. }
  84. static irqreturn_t sprd_mbox_outbox_isr(int irq, void *data)
  85. {
  86. struct sprd_mbox_priv *priv = data;
  87. struct mbox_chan *chan;
  88. u32 fifo_sts, fifo_len, msg[2];
  89. int i, id;
  90. fifo_sts = readl(priv->outbox_base + SPRD_MBOX_FIFO_STS);
  91. fifo_len = sprd_mbox_get_fifo_len(priv, fifo_sts);
  92. if (!fifo_len) {
  93. dev_warn_ratelimited(priv->dev, "spurious outbox interrupt\n");
  94. return IRQ_NONE;
  95. }
  96. for (i = 0; i < fifo_len; i++) {
  97. msg[0] = readl(priv->outbox_base + SPRD_MBOX_MSG_LOW);
  98. msg[1] = readl(priv->outbox_base + SPRD_MBOX_MSG_HIGH);
  99. id = readl(priv->outbox_base + SPRD_MBOX_ID);
  100. chan = &priv->chan[id];
  101. if (chan->cl)
  102. mbox_chan_received_data(chan, (void *)msg);
  103. else
  104. dev_warn_ratelimited(priv->dev,
  105. "message's been dropped at ch[%d]\n", id);
  106. /* Trigger to update outbox FIFO pointer */
  107. writel(0x1, priv->outbox_base + SPRD_MBOX_TRIGGER);
  108. }
  109. /* Clear irq status after reading all message. */
  110. writel(SPRD_MBOX_IRQ_CLR, priv->outbox_base + SPRD_MBOX_IRQ_STS);
  111. return IRQ_HANDLED;
  112. }
  113. static irqreturn_t sprd_mbox_inbox_isr(int irq, void *data)
  114. {
  115. struct sprd_mbox_priv *priv = data;
  116. struct mbox_chan *chan;
  117. u32 fifo_sts, send_sts, busy, id;
  118. fifo_sts = readl(priv->inbox_base + SPRD_MBOX_FIFO_STS);
  119. /* Get the inbox data delivery status */
  120. send_sts = (fifo_sts & SPRD_INBOX_FIFO_DELIVER_MASK) >>
  121. SPRD_INBOX_FIFO_DELIVER_SHIFT;
  122. if (!send_sts) {
  123. dev_warn_ratelimited(priv->dev, "spurious inbox interrupt\n");
  124. return IRQ_NONE;
  125. }
  126. while (send_sts) {
  127. id = __ffs(send_sts);
  128. send_sts &= (send_sts - 1);
  129. chan = &priv->chan[id];
  130. /*
  131. * Check if the message was fetched by remote traget, if yes,
  132. * that means the transmission has been completed.
  133. */
  134. busy = fifo_sts & SPRD_INBOX_FIFO_BUSY_MASK;
  135. if (!(busy & BIT(id)))
  136. mbox_chan_txdone(chan, 0);
  137. }
  138. /* Clear FIFO delivery and overflow status */
  139. writel(fifo_sts &
  140. (SPRD_INBOX_FIFO_DELIVER_MASK | SPRD_INBOX_FIFO_OVERLOW_MASK),
  141. priv->inbox_base + SPRD_MBOX_FIFO_RST);
  142. /* Clear irq status */
  143. writel(SPRD_MBOX_IRQ_CLR, priv->inbox_base + SPRD_MBOX_IRQ_STS);
  144. return IRQ_HANDLED;
  145. }
  146. static int sprd_mbox_send_data(struct mbox_chan *chan, void *msg)
  147. {
  148. struct sprd_mbox_priv *priv = to_sprd_mbox_priv(chan->mbox);
  149. unsigned long id = (unsigned long)chan->con_priv;
  150. u32 *data = msg;
  151. /* Write data into inbox FIFO, and only support 8 bytes every time */
  152. writel(data[0], priv->inbox_base + SPRD_MBOX_MSG_LOW);
  153. writel(data[1], priv->inbox_base + SPRD_MBOX_MSG_HIGH);
  154. /* Set target core id */
  155. writel(id, priv->inbox_base + SPRD_MBOX_ID);
  156. /* Trigger remote request */
  157. writel(0x1, priv->inbox_base + SPRD_MBOX_TRIGGER);
  158. return 0;
  159. }
  160. static int sprd_mbox_flush(struct mbox_chan *chan, unsigned long timeout)
  161. {
  162. struct sprd_mbox_priv *priv = to_sprd_mbox_priv(chan->mbox);
  163. unsigned long id = (unsigned long)chan->con_priv;
  164. u32 busy;
  165. timeout = jiffies + msecs_to_jiffies(timeout);
  166. while (time_before(jiffies, timeout)) {
  167. busy = readl(priv->inbox_base + SPRD_MBOX_FIFO_STS) &
  168. SPRD_INBOX_FIFO_BUSY_MASK;
  169. if (!(busy & BIT(id))) {
  170. mbox_chan_txdone(chan, 0);
  171. return 0;
  172. }
  173. udelay(1);
  174. }
  175. return -ETIME;
  176. }
  177. static int sprd_mbox_startup(struct mbox_chan *chan)
  178. {
  179. struct sprd_mbox_priv *priv = to_sprd_mbox_priv(chan->mbox);
  180. u32 val;
  181. mutex_lock(&priv->lock);
  182. if (priv->refcnt++ == 0) {
  183. /* Select outbox FIFO mode and reset the outbox FIFO status */
  184. writel(0x0, priv->outbox_base + SPRD_MBOX_FIFO_RST);
  185. /* Enable inbox FIFO overflow and delivery interrupt */
  186. val = readl(priv->inbox_base + SPRD_MBOX_IRQ_MSK);
  187. val &= ~(SPRD_INBOX_FIFO_OVERFLOW_IRQ | SPRD_INBOX_FIFO_DELIVER_IRQ);
  188. writel(val, priv->inbox_base + SPRD_MBOX_IRQ_MSK);
  189. /* Enable outbox FIFO not empty interrupt */
  190. val = readl(priv->outbox_base + SPRD_MBOX_IRQ_MSK);
  191. val &= ~SPRD_OUTBOX_FIFO_NOT_EMPTY_IRQ;
  192. writel(val, priv->outbox_base + SPRD_MBOX_IRQ_MSK);
  193. }
  194. mutex_unlock(&priv->lock);
  195. return 0;
  196. }
  197. static void sprd_mbox_shutdown(struct mbox_chan *chan)
  198. {
  199. struct sprd_mbox_priv *priv = to_sprd_mbox_priv(chan->mbox);
  200. mutex_lock(&priv->lock);
  201. if (--priv->refcnt == 0) {
  202. /* Disable inbox & outbox interrupt */
  203. writel(SPRD_INBOX_FIFO_IRQ_MASK, priv->inbox_base + SPRD_MBOX_IRQ_MSK);
  204. writel(SPRD_OUTBOX_FIFO_IRQ_MASK, priv->outbox_base + SPRD_MBOX_IRQ_MSK);
  205. }
  206. mutex_unlock(&priv->lock);
  207. }
  208. static const struct mbox_chan_ops sprd_mbox_ops = {
  209. .send_data = sprd_mbox_send_data,
  210. .flush = sprd_mbox_flush,
  211. .startup = sprd_mbox_startup,
  212. .shutdown = sprd_mbox_shutdown,
  213. };
  214. static void sprd_mbox_disable(void *data)
  215. {
  216. struct sprd_mbox_priv *priv = data;
  217. clk_disable_unprepare(priv->clk);
  218. }
  219. static int sprd_mbox_probe(struct platform_device *pdev)
  220. {
  221. struct device *dev = &pdev->dev;
  222. struct sprd_mbox_priv *priv;
  223. int ret, inbox_irq, outbox_irq;
  224. unsigned long id;
  225. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  226. if (!priv)
  227. return -ENOMEM;
  228. priv->dev = dev;
  229. mutex_init(&priv->lock);
  230. /*
  231. * The Spreadtrum mailbox uses an inbox to send messages to the target
  232. * core, and uses an outbox to receive messages from other cores.
  233. *
  234. * Thus the mailbox controller supplies 2 different register addresses
  235. * and IRQ numbers for inbox and outbox.
  236. */
  237. priv->inbox_base = devm_platform_ioremap_resource(pdev, 0);
  238. if (IS_ERR(priv->inbox_base))
  239. return PTR_ERR(priv->inbox_base);
  240. priv->outbox_base = devm_platform_ioremap_resource(pdev, 1);
  241. if (IS_ERR(priv->outbox_base))
  242. return PTR_ERR(priv->outbox_base);
  243. priv->clk = devm_clk_get(dev, "enable");
  244. if (IS_ERR(priv->clk)) {
  245. dev_err(dev, "failed to get mailbox clock\n");
  246. return PTR_ERR(priv->clk);
  247. }
  248. ret = clk_prepare_enable(priv->clk);
  249. if (ret)
  250. return ret;
  251. ret = devm_add_action_or_reset(dev, sprd_mbox_disable, priv);
  252. if (ret) {
  253. dev_err(dev, "failed to add mailbox disable action\n");
  254. return ret;
  255. }
  256. inbox_irq = platform_get_irq(pdev, 0);
  257. if (inbox_irq < 0)
  258. return inbox_irq;
  259. ret = devm_request_irq(dev, inbox_irq, sprd_mbox_inbox_isr,
  260. IRQF_NO_SUSPEND, dev_name(dev), priv);
  261. if (ret) {
  262. dev_err(dev, "failed to request inbox IRQ: %d\n", ret);
  263. return ret;
  264. }
  265. outbox_irq = platform_get_irq(pdev, 1);
  266. if (outbox_irq < 0)
  267. return outbox_irq;
  268. ret = devm_request_irq(dev, outbox_irq, sprd_mbox_outbox_isr,
  269. IRQF_NO_SUSPEND, dev_name(dev), priv);
  270. if (ret) {
  271. dev_err(dev, "failed to request outbox IRQ: %d\n", ret);
  272. return ret;
  273. }
  274. /* Get the default outbox FIFO depth */
  275. priv->outbox_fifo_depth =
  276. readl(priv->outbox_base + SPRD_MBOX_FIFO_DEPTH) + 1;
  277. priv->mbox.dev = dev;
  278. priv->mbox.chans = &priv->chan[0];
  279. priv->mbox.num_chans = SPRD_MBOX_CHAN_MAX;
  280. priv->mbox.ops = &sprd_mbox_ops;
  281. priv->mbox.txdone_irq = true;
  282. for (id = 0; id < SPRD_MBOX_CHAN_MAX; id++)
  283. priv->chan[id].con_priv = (void *)id;
  284. ret = devm_mbox_controller_register(dev, &priv->mbox);
  285. if (ret) {
  286. dev_err(dev, "failed to register mailbox: %d\n", ret);
  287. return ret;
  288. }
  289. return 0;
  290. }
  291. static const struct of_device_id sprd_mbox_of_match[] = {
  292. { .compatible = "sprd,sc9860-mailbox", },
  293. { },
  294. };
  295. MODULE_DEVICE_TABLE(of, sprd_mbox_of_match);
  296. static struct platform_driver sprd_mbox_driver = {
  297. .driver = {
  298. .name = "sprd-mailbox",
  299. .of_match_table = sprd_mbox_of_match,
  300. },
  301. .probe = sprd_mbox_probe,
  302. };
  303. module_platform_driver(sprd_mbox_driver);
  304. MODULE_AUTHOR("Baolin Wang <baolin.wang@unisoc.com>");
  305. MODULE_DESCRIPTION("Spreadtrum mailbox driver");
  306. MODULE_LICENSE("GPL v2");