arm_mhu_db.c 8.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2013-2015 Fujitsu Semiconductor Ltd.
  4. * Copyright (C) 2015 Linaro Ltd.
  5. * Based on ARM MHU driver by Jassi Brar <jaswinder.singh@linaro.org>
  6. * Copyright (C) 2020 ARM Ltd.
  7. */
  8. #include <linux/amba/bus.h>
  9. #include <linux/device.h>
  10. #include <linux/err.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/io.h>
  13. #include <linux/kernel.h>
  14. #include <linux/mailbox_controller.h>
  15. #include <linux/module.h>
  16. #include <linux/of.h>
  17. #include <linux/of_device.h>
  18. #define INTR_STAT_OFS 0x0
  19. #define INTR_SET_OFS 0x8
  20. #define INTR_CLR_OFS 0x10
  21. #define MHU_LP_OFFSET 0x0
  22. #define MHU_HP_OFFSET 0x20
  23. #define MHU_SEC_OFFSET 0x200
  24. #define TX_REG_OFFSET 0x100
  25. #define MHU_CHANS 3 /* Secure, Non-Secure High and Low Priority */
  26. #define MHU_CHAN_MAX 20 /* Max channels to save on unused RAM */
  27. #define MHU_NUM_DOORBELLS 32
  28. struct mhu_db_link {
  29. unsigned int irq;
  30. void __iomem *tx_reg;
  31. void __iomem *rx_reg;
  32. };
  33. struct arm_mhu {
  34. void __iomem *base;
  35. struct mhu_db_link mlink[MHU_CHANS];
  36. struct mbox_controller mbox;
  37. struct device *dev;
  38. };
  39. /**
  40. * ARM MHU Mailbox allocated channel information
  41. *
  42. * @mhu: Pointer to parent mailbox device
  43. * @pchan: Physical channel within which this doorbell resides in
  44. * @doorbell: doorbell number pertaining to this channel
  45. */
  46. struct mhu_db_channel {
  47. struct arm_mhu *mhu;
  48. unsigned int pchan;
  49. unsigned int doorbell;
  50. };
  51. static inline struct mbox_chan *
  52. mhu_db_mbox_to_channel(struct mbox_controller *mbox, unsigned int pchan,
  53. unsigned int doorbell)
  54. {
  55. int i;
  56. struct mhu_db_channel *chan_info;
  57. for (i = 0; i < mbox->num_chans; i++) {
  58. chan_info = mbox->chans[i].con_priv;
  59. if (chan_info && chan_info->pchan == pchan &&
  60. chan_info->doorbell == doorbell)
  61. return &mbox->chans[i];
  62. }
  63. return NULL;
  64. }
  65. static void mhu_db_mbox_clear_irq(struct mbox_chan *chan)
  66. {
  67. struct mhu_db_channel *chan_info = chan->con_priv;
  68. void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].rx_reg;
  69. writel_relaxed(BIT(chan_info->doorbell), base + INTR_CLR_OFS);
  70. }
  71. static unsigned int mhu_db_mbox_irq_to_pchan_num(struct arm_mhu *mhu, int irq)
  72. {
  73. unsigned int pchan;
  74. for (pchan = 0; pchan < MHU_CHANS; pchan++)
  75. if (mhu->mlink[pchan].irq == irq)
  76. break;
  77. return pchan;
  78. }
  79. static struct mbox_chan *
  80. mhu_db_mbox_irq_to_channel(struct arm_mhu *mhu, unsigned int pchan)
  81. {
  82. unsigned long bits;
  83. unsigned int doorbell;
  84. struct mbox_chan *chan = NULL;
  85. struct mbox_controller *mbox = &mhu->mbox;
  86. void __iomem *base = mhu->mlink[pchan].rx_reg;
  87. bits = readl_relaxed(base + INTR_STAT_OFS);
  88. if (!bits)
  89. /* No IRQs fired in specified physical channel */
  90. return NULL;
  91. /* An IRQ has fired, find the associated channel */
  92. for (doorbell = 0; bits; doorbell++) {
  93. if (!test_and_clear_bit(doorbell, &bits))
  94. continue;
  95. chan = mhu_db_mbox_to_channel(mbox, pchan, doorbell);
  96. if (chan)
  97. break;
  98. dev_err(mbox->dev,
  99. "Channel not registered: pchan: %d doorbell: %d\n",
  100. pchan, doorbell);
  101. }
  102. return chan;
  103. }
  104. static irqreturn_t mhu_db_mbox_rx_handler(int irq, void *data)
  105. {
  106. struct mbox_chan *chan;
  107. struct arm_mhu *mhu = data;
  108. unsigned int pchan = mhu_db_mbox_irq_to_pchan_num(mhu, irq);
  109. while (NULL != (chan = mhu_db_mbox_irq_to_channel(mhu, pchan))) {
  110. mbox_chan_received_data(chan, NULL);
  111. mhu_db_mbox_clear_irq(chan);
  112. }
  113. return IRQ_HANDLED;
  114. }
  115. static bool mhu_db_last_tx_done(struct mbox_chan *chan)
  116. {
  117. struct mhu_db_channel *chan_info = chan->con_priv;
  118. void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg;
  119. if (readl_relaxed(base + INTR_STAT_OFS) & BIT(chan_info->doorbell))
  120. return false;
  121. return true;
  122. }
  123. static int mhu_db_send_data(struct mbox_chan *chan, void *data)
  124. {
  125. struct mhu_db_channel *chan_info = chan->con_priv;
  126. void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg;
  127. /* Send event to co-processor */
  128. writel_relaxed(BIT(chan_info->doorbell), base + INTR_SET_OFS);
  129. return 0;
  130. }
  131. static int mhu_db_startup(struct mbox_chan *chan)
  132. {
  133. mhu_db_mbox_clear_irq(chan);
  134. return 0;
  135. }
  136. static void mhu_db_shutdown(struct mbox_chan *chan)
  137. {
  138. struct mhu_db_channel *chan_info = chan->con_priv;
  139. struct mbox_controller *mbox = &chan_info->mhu->mbox;
  140. int i;
  141. for (i = 0; i < mbox->num_chans; i++)
  142. if (chan == &mbox->chans[i])
  143. break;
  144. if (mbox->num_chans == i) {
  145. dev_warn(mbox->dev, "Request to free non-existent channel\n");
  146. return;
  147. }
  148. /* Reset channel */
  149. mhu_db_mbox_clear_irq(chan);
  150. devm_kfree(mbox->dev, chan->con_priv);
  151. chan->con_priv = NULL;
  152. }
  153. static struct mbox_chan *mhu_db_mbox_xlate(struct mbox_controller *mbox,
  154. const struct of_phandle_args *spec)
  155. {
  156. struct arm_mhu *mhu = dev_get_drvdata(mbox->dev);
  157. struct mhu_db_channel *chan_info;
  158. struct mbox_chan *chan;
  159. unsigned int pchan = spec->args[0];
  160. unsigned int doorbell = spec->args[1];
  161. int i;
  162. /* Bounds checking */
  163. if (pchan >= MHU_CHANS || doorbell >= MHU_NUM_DOORBELLS) {
  164. dev_err(mbox->dev,
  165. "Invalid channel requested pchan: %d doorbell: %d\n",
  166. pchan, doorbell);
  167. return ERR_PTR(-EINVAL);
  168. }
  169. /* Is requested channel free? */
  170. chan = mhu_db_mbox_to_channel(mbox, pchan, doorbell);
  171. if (chan) {
  172. dev_err(mbox->dev, "Channel in use: pchan: %d doorbell: %d\n",
  173. pchan, doorbell);
  174. return ERR_PTR(-EBUSY);
  175. }
  176. /* Find the first free slot */
  177. for (i = 0; i < mbox->num_chans; i++)
  178. if (!mbox->chans[i].con_priv)
  179. break;
  180. if (mbox->num_chans == i) {
  181. dev_err(mbox->dev, "No free channels left\n");
  182. return ERR_PTR(-EBUSY);
  183. }
  184. chan = &mbox->chans[i];
  185. chan_info = devm_kzalloc(mbox->dev, sizeof(*chan_info), GFP_KERNEL);
  186. if (!chan_info)
  187. return ERR_PTR(-ENOMEM);
  188. chan_info->mhu = mhu;
  189. chan_info->pchan = pchan;
  190. chan_info->doorbell = doorbell;
  191. chan->con_priv = chan_info;
  192. dev_dbg(mbox->dev, "mbox: created channel phys: %d doorbell: %d\n",
  193. pchan, doorbell);
  194. return chan;
  195. }
  196. static const struct mbox_chan_ops mhu_db_ops = {
  197. .send_data = mhu_db_send_data,
  198. .startup = mhu_db_startup,
  199. .shutdown = mhu_db_shutdown,
  200. .last_tx_done = mhu_db_last_tx_done,
  201. };
  202. static int mhu_db_probe(struct amba_device *adev, const struct amba_id *id)
  203. {
  204. u32 cell_count;
  205. int i, err, max_chans;
  206. struct arm_mhu *mhu;
  207. struct mbox_chan *chans;
  208. struct device *dev = &adev->dev;
  209. struct device_node *np = dev->of_node;
  210. int mhu_reg[MHU_CHANS] = {
  211. MHU_LP_OFFSET, MHU_HP_OFFSET, MHU_SEC_OFFSET,
  212. };
  213. if (!of_device_is_compatible(np, "arm,mhu-doorbell"))
  214. return -ENODEV;
  215. err = of_property_read_u32(np, "#mbox-cells", &cell_count);
  216. if (err) {
  217. dev_err(dev, "failed to read #mbox-cells in '%pOF'\n", np);
  218. return err;
  219. }
  220. if (cell_count == 2) {
  221. max_chans = MHU_CHAN_MAX;
  222. } else {
  223. dev_err(dev, "incorrect value of #mbox-cells in '%pOF'\n", np);
  224. return -EINVAL;
  225. }
  226. mhu = devm_kzalloc(dev, sizeof(*mhu), GFP_KERNEL);
  227. if (!mhu)
  228. return -ENOMEM;
  229. mhu->base = devm_ioremap_resource(dev, &adev->res);
  230. if (IS_ERR(mhu->base)) {
  231. dev_err(dev, "ioremap failed\n");
  232. return PTR_ERR(mhu->base);
  233. }
  234. chans = devm_kcalloc(dev, max_chans, sizeof(*chans), GFP_KERNEL);
  235. if (!chans)
  236. return -ENOMEM;
  237. mhu->dev = dev;
  238. mhu->mbox.dev = dev;
  239. mhu->mbox.chans = chans;
  240. mhu->mbox.num_chans = max_chans;
  241. mhu->mbox.txdone_irq = false;
  242. mhu->mbox.txdone_poll = true;
  243. mhu->mbox.txpoll_period = 1;
  244. mhu->mbox.of_xlate = mhu_db_mbox_xlate;
  245. amba_set_drvdata(adev, mhu);
  246. mhu->mbox.ops = &mhu_db_ops;
  247. err = devm_mbox_controller_register(dev, &mhu->mbox);
  248. if (err) {
  249. dev_err(dev, "Failed to register mailboxes %d\n", err);
  250. return err;
  251. }
  252. for (i = 0; i < MHU_CHANS; i++) {
  253. int irq = mhu->mlink[i].irq = adev->irq[i];
  254. if (irq <= 0) {
  255. dev_dbg(dev, "No IRQ found for Channel %d\n", i);
  256. continue;
  257. }
  258. mhu->mlink[i].rx_reg = mhu->base + mhu_reg[i];
  259. mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET;
  260. err = devm_request_threaded_irq(dev, irq, NULL,
  261. mhu_db_mbox_rx_handler,
  262. IRQF_ONESHOT, "mhu_db_link", mhu);
  263. if (err) {
  264. dev_err(dev, "Can't claim IRQ %d\n", irq);
  265. mbox_controller_unregister(&mhu->mbox);
  266. return err;
  267. }
  268. }
  269. dev_info(dev, "ARM MHU Doorbell mailbox registered\n");
  270. return 0;
  271. }
  272. static struct amba_id mhu_ids[] = {
  273. {
  274. .id = 0x1bb098,
  275. .mask = 0xffffff,
  276. },
  277. { 0, 0 },
  278. };
  279. MODULE_DEVICE_TABLE(amba, mhu_ids);
  280. static struct amba_driver arm_mhu_db_driver = {
  281. .drv = {
  282. .name = "mhu-doorbell",
  283. },
  284. .id_table = mhu_ids,
  285. .probe = mhu_db_probe,
  286. };
  287. module_amba_driver(arm_mhu_db_driver);
  288. MODULE_LICENSE("GPL v2");
  289. MODULE_DESCRIPTION("ARM MHU Doorbell Driver");
  290. MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");