leds-is31fl32xx.c 13 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Driver for ISSI IS31FL32xx family of I2C LED controllers
  4. *
  5. * Copyright 2015 Allworx Corp.
  6. *
  7. * Datasheets:
  8. * http://www.issi.com/US/product-analog-fxled-driver.shtml
  9. * http://www.si-en.com/product.asp?parentid=890
  10. */
  11. #include <linux/device.h>
  12. #include <linux/i2c.h>
  13. #include <linux/kernel.h>
  14. #include <linux/leds.h>
  15. #include <linux/module.h>
  16. #include <linux/of.h>
  17. #include <linux/of_device.h>
  18. /* Used to indicate a device has no such register */
  19. #define IS31FL32XX_REG_NONE 0xFF
  20. /* Software Shutdown bit in Shutdown Register */
  21. #define IS31FL32XX_SHUTDOWN_SSD_ENABLE 0
  22. #define IS31FL32XX_SHUTDOWN_SSD_DISABLE BIT(0)
  23. /* IS31FL3216 has a number of unique registers */
  24. #define IS31FL3216_CONFIG_REG 0x00
  25. #define IS31FL3216_LIGHTING_EFFECT_REG 0x03
  26. #define IS31FL3216_CHANNEL_CONFIG_REG 0x04
  27. /* Software Shutdown bit in 3216 Config Register */
  28. #define IS31FL3216_CONFIG_SSD_ENABLE BIT(7)
  29. #define IS31FL3216_CONFIG_SSD_DISABLE 0
  30. struct is31fl32xx_priv;
  31. struct is31fl32xx_led_data {
  32. struct led_classdev cdev;
  33. u8 channel; /* 1-based, max priv->cdef->channels */
  34. struct is31fl32xx_priv *priv;
  35. };
  36. struct is31fl32xx_priv {
  37. const struct is31fl32xx_chipdef *cdef;
  38. struct i2c_client *client;
  39. unsigned int num_leds;
  40. struct is31fl32xx_led_data leds[];
  41. };
  42. /**
  43. * struct is31fl32xx_chipdef - chip-specific attributes
  44. * @channels : Number of LED channels
  45. * @shutdown_reg : address of Shutdown register (optional)
  46. * @pwm_update_reg : address of PWM Update register
  47. * @global_control_reg : address of Global Control register (optional)
  48. * @reset_reg : address of Reset register (optional)
  49. * @pwm_register_base : address of first PWM register
  50. * @pwm_registers_reversed: : true if PWM registers count down instead of up
  51. * @led_control_register_base : address of first LED control register (optional)
  52. * @enable_bits_per_led_control_register: number of LEDs enable bits in each
  53. * @reset_func: : pointer to reset function
  54. *
  55. * For all optional register addresses, the sentinel value %IS31FL32XX_REG_NONE
  56. * indicates that this chip has no such register.
  57. *
  58. * If non-NULL, @reset_func will be called during probing to set all
  59. * necessary registers to a known initialization state. This is needed
  60. * for chips that do not have a @reset_reg.
  61. *
  62. * @enable_bits_per_led_control_register must be >=1 if
  63. * @led_control_register_base != %IS31FL32XX_REG_NONE.
  64. */
  65. struct is31fl32xx_chipdef {
  66. u8 channels;
  67. u8 shutdown_reg;
  68. u8 pwm_update_reg;
  69. u8 global_control_reg;
  70. u8 reset_reg;
  71. u8 pwm_register_base;
  72. bool pwm_registers_reversed;
  73. u8 led_control_register_base;
  74. u8 enable_bits_per_led_control_register;
  75. int (*reset_func)(struct is31fl32xx_priv *priv);
  76. int (*sw_shutdown_func)(struct is31fl32xx_priv *priv, bool enable);
  77. };
  78. static const struct is31fl32xx_chipdef is31fl3236_cdef = {
  79. .channels = 36,
  80. .shutdown_reg = 0x00,
  81. .pwm_update_reg = 0x25,
  82. .global_control_reg = 0x4a,
  83. .reset_reg = 0x4f,
  84. .pwm_register_base = 0x01,
  85. .led_control_register_base = 0x26,
  86. .enable_bits_per_led_control_register = 1,
  87. };
  88. static const struct is31fl32xx_chipdef is31fl3235_cdef = {
  89. .channels = 28,
  90. .shutdown_reg = 0x00,
  91. .pwm_update_reg = 0x25,
  92. .global_control_reg = 0x4a,
  93. .reset_reg = 0x4f,
  94. .pwm_register_base = 0x05,
  95. .led_control_register_base = 0x2a,
  96. .enable_bits_per_led_control_register = 1,
  97. };
  98. static const struct is31fl32xx_chipdef is31fl3218_cdef = {
  99. .channels = 18,
  100. .shutdown_reg = 0x00,
  101. .pwm_update_reg = 0x16,
  102. .global_control_reg = IS31FL32XX_REG_NONE,
  103. .reset_reg = 0x17,
  104. .pwm_register_base = 0x01,
  105. .led_control_register_base = 0x13,
  106. .enable_bits_per_led_control_register = 6,
  107. };
  108. static int is31fl3216_reset(struct is31fl32xx_priv *priv);
  109. static int is31fl3216_software_shutdown(struct is31fl32xx_priv *priv,
  110. bool enable);
  111. static const struct is31fl32xx_chipdef is31fl3216_cdef = {
  112. .channels = 16,
  113. .shutdown_reg = IS31FL32XX_REG_NONE,
  114. .pwm_update_reg = 0xB0,
  115. .global_control_reg = IS31FL32XX_REG_NONE,
  116. .reset_reg = IS31FL32XX_REG_NONE,
  117. .pwm_register_base = 0x10,
  118. .pwm_registers_reversed = true,
  119. .led_control_register_base = 0x01,
  120. .enable_bits_per_led_control_register = 8,
  121. .reset_func = is31fl3216_reset,
  122. .sw_shutdown_func = is31fl3216_software_shutdown,
  123. };
  124. static int is31fl32xx_write(struct is31fl32xx_priv *priv, u8 reg, u8 val)
  125. {
  126. int ret;
  127. dev_dbg(&priv->client->dev, "writing register 0x%02X=0x%02X", reg, val);
  128. ret = i2c_smbus_write_byte_data(priv->client, reg, val);
  129. if (ret) {
  130. dev_err(&priv->client->dev,
  131. "register write to 0x%02X failed (error %d)",
  132. reg, ret);
  133. }
  134. return ret;
  135. }
  136. /*
  137. * Custom reset function for IS31FL3216 because it does not have a RESET
  138. * register the way that the other IS31FL32xx chips do. We don't bother
  139. * writing the GPIO and animation registers, because the registers we
  140. * do write ensure those will have no effect.
  141. */
  142. static int is31fl3216_reset(struct is31fl32xx_priv *priv)
  143. {
  144. unsigned int i;
  145. int ret;
  146. ret = is31fl32xx_write(priv, IS31FL3216_CONFIG_REG,
  147. IS31FL3216_CONFIG_SSD_ENABLE);
  148. if (ret)
  149. return ret;
  150. for (i = 0; i < priv->cdef->channels; i++) {
  151. ret = is31fl32xx_write(priv, priv->cdef->pwm_register_base+i,
  152. 0x00);
  153. if (ret)
  154. return ret;
  155. }
  156. ret = is31fl32xx_write(priv, priv->cdef->pwm_update_reg, 0);
  157. if (ret)
  158. return ret;
  159. ret = is31fl32xx_write(priv, IS31FL3216_LIGHTING_EFFECT_REG, 0x00);
  160. if (ret)
  161. return ret;
  162. ret = is31fl32xx_write(priv, IS31FL3216_CHANNEL_CONFIG_REG, 0x00);
  163. if (ret)
  164. return ret;
  165. return 0;
  166. }
  167. /*
  168. * Custom Software-Shutdown function for IS31FL3216 because it does not have
  169. * a SHUTDOWN register the way that the other IS31FL32xx chips do.
  170. * We don't bother doing a read/modify/write on the CONFIG register because
  171. * we only ever use a value of '0' for the other fields in that register.
  172. */
  173. static int is31fl3216_software_shutdown(struct is31fl32xx_priv *priv,
  174. bool enable)
  175. {
  176. u8 value = enable ? IS31FL3216_CONFIG_SSD_ENABLE :
  177. IS31FL3216_CONFIG_SSD_DISABLE;
  178. return is31fl32xx_write(priv, IS31FL3216_CONFIG_REG, value);
  179. }
  180. /*
  181. * NOTE: A mutex is not needed in this function because:
  182. * - All referenced data is read-only after probe()
  183. * - The I2C core has a mutex on to protect the bus
  184. * - There are no read/modify/write operations
  185. * - Intervening operations between the write of the PWM register
  186. * and the Update register are harmless.
  187. *
  188. * Example:
  189. * PWM_REG_1 write 16
  190. * UPDATE_REG write 0
  191. * PWM_REG_2 write 128
  192. * UPDATE_REG write 0
  193. * vs:
  194. * PWM_REG_1 write 16
  195. * PWM_REG_2 write 128
  196. * UPDATE_REG write 0
  197. * UPDATE_REG write 0
  198. * are equivalent. Poking the Update register merely applies all PWM
  199. * register writes up to that point.
  200. */
  201. static int is31fl32xx_brightness_set(struct led_classdev *led_cdev,
  202. enum led_brightness brightness)
  203. {
  204. const struct is31fl32xx_led_data *led_data =
  205. container_of(led_cdev, struct is31fl32xx_led_data, cdev);
  206. const struct is31fl32xx_chipdef *cdef = led_data->priv->cdef;
  207. u8 pwm_register_offset;
  208. int ret;
  209. dev_dbg(led_cdev->dev, "%s: %d\n", __func__, brightness);
  210. /* NOTE: led_data->channel is 1-based */
  211. if (cdef->pwm_registers_reversed)
  212. pwm_register_offset = cdef->channels - led_data->channel;
  213. else
  214. pwm_register_offset = led_data->channel - 1;
  215. ret = is31fl32xx_write(led_data->priv,
  216. cdef->pwm_register_base + pwm_register_offset,
  217. brightness);
  218. if (ret)
  219. return ret;
  220. return is31fl32xx_write(led_data->priv, cdef->pwm_update_reg, 0);
  221. }
  222. static int is31fl32xx_reset_regs(struct is31fl32xx_priv *priv)
  223. {
  224. const struct is31fl32xx_chipdef *cdef = priv->cdef;
  225. int ret;
  226. if (cdef->reset_reg != IS31FL32XX_REG_NONE) {
  227. ret = is31fl32xx_write(priv, cdef->reset_reg, 0);
  228. if (ret)
  229. return ret;
  230. }
  231. if (cdef->reset_func)
  232. return cdef->reset_func(priv);
  233. return 0;
  234. }
  235. static int is31fl32xx_software_shutdown(struct is31fl32xx_priv *priv,
  236. bool enable)
  237. {
  238. const struct is31fl32xx_chipdef *cdef = priv->cdef;
  239. int ret;
  240. if (cdef->shutdown_reg != IS31FL32XX_REG_NONE) {
  241. u8 value = enable ? IS31FL32XX_SHUTDOWN_SSD_ENABLE :
  242. IS31FL32XX_SHUTDOWN_SSD_DISABLE;
  243. ret = is31fl32xx_write(priv, cdef->shutdown_reg, value);
  244. if (ret)
  245. return ret;
  246. }
  247. if (cdef->sw_shutdown_func)
  248. return cdef->sw_shutdown_func(priv, enable);
  249. return 0;
  250. }
  251. static int is31fl32xx_init_regs(struct is31fl32xx_priv *priv)
  252. {
  253. const struct is31fl32xx_chipdef *cdef = priv->cdef;
  254. int ret;
  255. ret = is31fl32xx_reset_regs(priv);
  256. if (ret)
  257. return ret;
  258. /*
  259. * Set enable bit for all channels.
  260. * We will control state with PWM registers alone.
  261. */
  262. if (cdef->led_control_register_base != IS31FL32XX_REG_NONE) {
  263. u8 value =
  264. GENMASK(cdef->enable_bits_per_led_control_register-1, 0);
  265. u8 num_regs = cdef->channels /
  266. cdef->enable_bits_per_led_control_register;
  267. int i;
  268. for (i = 0; i < num_regs; i++) {
  269. ret = is31fl32xx_write(priv,
  270. cdef->led_control_register_base+i,
  271. value);
  272. if (ret)
  273. return ret;
  274. }
  275. }
  276. ret = is31fl32xx_software_shutdown(priv, false);
  277. if (ret)
  278. return ret;
  279. if (cdef->global_control_reg != IS31FL32XX_REG_NONE) {
  280. ret = is31fl32xx_write(priv, cdef->global_control_reg, 0x00);
  281. if (ret)
  282. return ret;
  283. }
  284. return 0;
  285. }
  286. static int is31fl32xx_parse_child_dt(const struct device *dev,
  287. const struct device_node *child,
  288. struct is31fl32xx_led_data *led_data)
  289. {
  290. struct led_classdev *cdev = &led_data->cdev;
  291. int ret = 0;
  292. u32 reg;
  293. ret = of_property_read_u32(child, "reg", &reg);
  294. if (ret || reg < 1 || reg > led_data->priv->cdef->channels) {
  295. dev_err(dev,
  296. "Child node %pOF does not have a valid reg property\n",
  297. child);
  298. return -EINVAL;
  299. }
  300. led_data->channel = reg;
  301. cdev->brightness_set_blocking = is31fl32xx_brightness_set;
  302. return 0;
  303. }
  304. static struct is31fl32xx_led_data *is31fl32xx_find_led_data(
  305. struct is31fl32xx_priv *priv,
  306. u8 channel)
  307. {
  308. size_t i;
  309. for (i = 0; i < priv->num_leds; i++) {
  310. if (priv->leds[i].channel == channel)
  311. return &priv->leds[i];
  312. }
  313. return NULL;
  314. }
  315. static int is31fl32xx_parse_dt(struct device *dev,
  316. struct is31fl32xx_priv *priv)
  317. {
  318. struct device_node *child;
  319. int ret = 0;
  320. for_each_available_child_of_node(dev_of_node(dev), child) {
  321. struct led_init_data init_data = {};
  322. struct is31fl32xx_led_data *led_data =
  323. &priv->leds[priv->num_leds];
  324. const struct is31fl32xx_led_data *other_led_data;
  325. led_data->priv = priv;
  326. ret = is31fl32xx_parse_child_dt(dev, child, led_data);
  327. if (ret)
  328. goto err;
  329. /* Detect if channel is already in use by another child */
  330. other_led_data = is31fl32xx_find_led_data(priv,
  331. led_data->channel);
  332. if (other_led_data) {
  333. dev_err(dev,
  334. "Node %pOF 'reg' conflicts with another LED\n",
  335. child);
  336. ret = -EINVAL;
  337. goto err;
  338. }
  339. init_data.fwnode = of_fwnode_handle(child);
  340. ret = devm_led_classdev_register_ext(dev, &led_data->cdev,
  341. &init_data);
  342. if (ret) {
  343. dev_err(dev, "Failed to register LED for %pOF: %d\n",
  344. child, ret);
  345. goto err;
  346. }
  347. priv->num_leds++;
  348. }
  349. return 0;
  350. err:
  351. of_node_put(child);
  352. return ret;
  353. }
  354. static const struct of_device_id of_is31fl32xx_match[] = {
  355. { .compatible = "issi,is31fl3236", .data = &is31fl3236_cdef, },
  356. { .compatible = "issi,is31fl3235", .data = &is31fl3235_cdef, },
  357. { .compatible = "issi,is31fl3218", .data = &is31fl3218_cdef, },
  358. { .compatible = "si-en,sn3218", .data = &is31fl3218_cdef, },
  359. { .compatible = "issi,is31fl3216", .data = &is31fl3216_cdef, },
  360. { .compatible = "si-en,sn3216", .data = &is31fl3216_cdef, },
  361. {},
  362. };
  363. MODULE_DEVICE_TABLE(of, of_is31fl32xx_match);
  364. static int is31fl32xx_probe(struct i2c_client *client,
  365. const struct i2c_device_id *id)
  366. {
  367. const struct is31fl32xx_chipdef *cdef;
  368. struct device *dev = &client->dev;
  369. struct is31fl32xx_priv *priv;
  370. int count;
  371. int ret = 0;
  372. cdef = device_get_match_data(dev);
  373. count = of_get_available_child_count(dev_of_node(dev));
  374. if (!count)
  375. return -EINVAL;
  376. priv = devm_kzalloc(dev, struct_size(priv, leds, count),
  377. GFP_KERNEL);
  378. if (!priv)
  379. return -ENOMEM;
  380. priv->client = client;
  381. priv->cdef = cdef;
  382. i2c_set_clientdata(client, priv);
  383. ret = is31fl32xx_init_regs(priv);
  384. if (ret)
  385. return ret;
  386. ret = is31fl32xx_parse_dt(dev, priv);
  387. if (ret)
  388. return ret;
  389. return 0;
  390. }
  391. static int is31fl32xx_remove(struct i2c_client *client)
  392. {
  393. struct is31fl32xx_priv *priv = i2c_get_clientdata(client);
  394. return is31fl32xx_reset_regs(priv);
  395. }
  396. /*
  397. * i2c-core (and modalias) requires that id_table be properly filled,
  398. * even though it is not used for DeviceTree based instantiation.
  399. */
  400. static const struct i2c_device_id is31fl32xx_id[] = {
  401. { "is31fl3236" },
  402. { "is31fl3235" },
  403. { "is31fl3218" },
  404. { "sn3218" },
  405. { "is31fl3216" },
  406. { "sn3216" },
  407. {},
  408. };
  409. MODULE_DEVICE_TABLE(i2c, is31fl32xx_id);
  410. static struct i2c_driver is31fl32xx_driver = {
  411. .driver = {
  412. .name = "is31fl32xx",
  413. .of_match_table = of_is31fl32xx_match,
  414. },
  415. .probe = is31fl32xx_probe,
  416. .remove = is31fl32xx_remove,
  417. .id_table = is31fl32xx_id,
  418. };
  419. module_i2c_driver(is31fl32xx_driver);
  420. MODULE_AUTHOR("David Rivshin <drivshin@allworx.com>");
  421. MODULE_DESCRIPTION("ISSI IS31FL32xx LED driver");
  422. MODULE_LICENSE("GPL v2");