irq-ti-sci-inta.c 22 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Texas Instruments' K3 Interrupt Aggregator irqchip driver
  4. *
  5. * Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
  6. * Lokesh Vutla <lokeshvutla@ti.com>
  7. */
  8. #include <linux/err.h>
  9. #include <linux/io.h>
  10. #include <linux/irq.h>
  11. #include <linux/irqchip.h>
  12. #include <linux/irqdomain.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/msi.h>
  15. #include <linux/module.h>
  16. #include <linux/moduleparam.h>
  17. #include <linux/of_address.h>
  18. #include <linux/of_irq.h>
  19. #include <linux/of_platform.h>
  20. #include <linux/irqchip/chained_irq.h>
  21. #include <linux/soc/ti/ti_sci_inta_msi.h>
  22. #include <linux/soc/ti/ti_sci_protocol.h>
  23. #include <asm-generic/msi.h>
  24. #define TI_SCI_DEV_ID_MASK 0xffff
  25. #define TI_SCI_DEV_ID_SHIFT 16
  26. #define TI_SCI_IRQ_ID_MASK 0xffff
  27. #define TI_SCI_IRQ_ID_SHIFT 0
  28. #define HWIRQ_TO_DEVID(hwirq) (((hwirq) >> (TI_SCI_DEV_ID_SHIFT)) & \
  29. (TI_SCI_DEV_ID_MASK))
  30. #define HWIRQ_TO_IRQID(hwirq) ((hwirq) & (TI_SCI_IRQ_ID_MASK))
  31. #define TO_HWIRQ(dev, index) ((((dev) & TI_SCI_DEV_ID_MASK) << \
  32. TI_SCI_DEV_ID_SHIFT) | \
  33. ((index) & TI_SCI_IRQ_ID_MASK))
  34. #define MAX_EVENTS_PER_VINT 64
  35. #define VINT_ENABLE_SET_OFFSET 0x0
  36. #define VINT_ENABLE_CLR_OFFSET 0x8
  37. #define VINT_STATUS_OFFSET 0x18
  38. #define VINT_STATUS_MASKED_OFFSET 0x20
  39. /**
  40. * struct ti_sci_inta_event_desc - Description of an event coming to
  41. * Interrupt Aggregator. This serves
  42. * as a mapping table for global event,
  43. * hwirq and vint bit.
  44. * @global_event: Global event number corresponding to this event
  45. * @hwirq: Hwirq of the incoming interrupt
  46. * @vint_bit: Corresponding vint bit to which this event is attached.
  47. */
  48. struct ti_sci_inta_event_desc {
  49. u16 global_event;
  50. u32 hwirq;
  51. u8 vint_bit;
  52. };
  53. /**
  54. * struct ti_sci_inta_vint_desc - Description of a virtual interrupt coming out
  55. * of Interrupt Aggregator.
  56. * @domain: Pointer to IRQ domain to which this vint belongs.
  57. * @list: List entry for the vint list
  58. * @event_map: Bitmap to manage the allocation of events to vint.
  59. * @events: Array of event descriptors assigned to this vint.
  60. * @parent_virq: Linux IRQ number that gets attached to parent
  61. * @vint_id: TISCI vint ID
  62. */
  63. struct ti_sci_inta_vint_desc {
  64. struct irq_domain *domain;
  65. struct list_head list;
  66. DECLARE_BITMAP(event_map, MAX_EVENTS_PER_VINT);
  67. struct ti_sci_inta_event_desc events[MAX_EVENTS_PER_VINT];
  68. unsigned int parent_virq;
  69. u16 vint_id;
  70. };
  71. /**
  72. * struct ti_sci_inta_irq_domain - Structure representing a TISCI based
  73. * Interrupt Aggregator IRQ domain.
  74. * @sci: Pointer to TISCI handle
  75. * @vint: TISCI resource pointer representing IA inerrupts.
  76. * @global_event: TISCI resource pointer representing global events.
  77. * @vint_list: List of the vints active in the system
  78. * @vint_mutex: Mutex to protect vint_list
  79. * @base: Base address of the memory mapped IO registers
  80. * @pdev: Pointer to platform device.
  81. * @ti_sci_id: TI-SCI device identifier
  82. * @unmapped_cnt: Number of @unmapped_dev_ids entries
  83. * @unmapped_dev_ids: Pointer to an array of TI-SCI device identifiers of
  84. * unmapped event sources.
  85. * Unmapped Events are not part of the Global Event Map and
  86. * they are converted to Global event within INTA to be
  87. * received by the same INTA to generate an interrupt.
  88. * In case an interrupt request comes for a device which is
  89. * generating Unmapped Event, we must use the INTA's TI-SCI
  90. * device identifier in place of the source device
  91. * identifier to let sysfw know where it has to program the
  92. * Global Event number.
  93. */
  94. struct ti_sci_inta_irq_domain {
  95. const struct ti_sci_handle *sci;
  96. struct ti_sci_resource *vint;
  97. struct ti_sci_resource *global_event;
  98. struct list_head vint_list;
  99. /* Mutex to protect vint list */
  100. struct mutex vint_mutex;
  101. void __iomem *base;
  102. struct platform_device *pdev;
  103. u32 ti_sci_id;
  104. int unmapped_cnt;
  105. u16 *unmapped_dev_ids;
  106. };
  107. #define to_vint_desc(e, i) container_of(e, struct ti_sci_inta_vint_desc, \
  108. events[i])
  109. static u16 ti_sci_inta_get_dev_id(struct ti_sci_inta_irq_domain *inta, u32 hwirq)
  110. {
  111. u16 dev_id = HWIRQ_TO_DEVID(hwirq);
  112. int i;
  113. if (inta->unmapped_cnt == 0)
  114. return dev_id;
  115. /*
  116. * For devices sending Unmapped Events we must use the INTA's TI-SCI
  117. * device identifier number to be able to convert it to a Global Event
  118. * and map it to an interrupt.
  119. */
  120. for (i = 0; i < inta->unmapped_cnt; i++) {
  121. if (dev_id == inta->unmapped_dev_ids[i]) {
  122. dev_id = inta->ti_sci_id;
  123. break;
  124. }
  125. }
  126. return dev_id;
  127. }
  128. /**
  129. * ti_sci_inta_irq_handler() - Chained IRQ handler for the vint irqs
  130. * @desc: Pointer to irq_desc corresponding to the irq
  131. */
  132. static void ti_sci_inta_irq_handler(struct irq_desc *desc)
  133. {
  134. struct ti_sci_inta_vint_desc *vint_desc;
  135. struct ti_sci_inta_irq_domain *inta;
  136. struct irq_domain *domain;
  137. unsigned int virq, bit;
  138. unsigned long val;
  139. vint_desc = irq_desc_get_handler_data(desc);
  140. domain = vint_desc->domain;
  141. inta = domain->host_data;
  142. chained_irq_enter(irq_desc_get_chip(desc), desc);
  143. val = readq_relaxed(inta->base + vint_desc->vint_id * 0x1000 +
  144. VINT_STATUS_MASKED_OFFSET);
  145. for_each_set_bit(bit, &val, MAX_EVENTS_PER_VINT) {
  146. virq = irq_find_mapping(domain, vint_desc->events[bit].hwirq);
  147. if (virq)
  148. generic_handle_irq(virq);
  149. }
  150. chained_irq_exit(irq_desc_get_chip(desc), desc);
  151. }
  152. /**
  153. * ti_sci_inta_xlate_irq() - Translate hwirq to parent's hwirq.
  154. * @inta: IRQ domain corresponding to Interrupt Aggregator
  155. * @irq: Hardware irq corresponding to the above irq domain
  156. *
  157. * Return parent irq number if translation is available else -ENOENT.
  158. */
  159. static int ti_sci_inta_xlate_irq(struct ti_sci_inta_irq_domain *inta,
  160. u16 vint_id)
  161. {
  162. struct device_node *np = dev_of_node(&inta->pdev->dev);
  163. u32 base, parent_base, size;
  164. const __be32 *range;
  165. int len;
  166. range = of_get_property(np, "ti,interrupt-ranges", &len);
  167. if (!range)
  168. return vint_id;
  169. for (len /= sizeof(*range); len >= 3; len -= 3) {
  170. base = be32_to_cpu(*range++);
  171. parent_base = be32_to_cpu(*range++);
  172. size = be32_to_cpu(*range++);
  173. if (base <= vint_id && vint_id < base + size)
  174. return vint_id - base + parent_base;
  175. }
  176. return -ENOENT;
  177. }
  178. /**
  179. * ti_sci_inta_alloc_parent_irq() - Allocate parent irq to Interrupt aggregator
  180. * @domain: IRQ domain corresponding to Interrupt Aggregator
  181. *
  182. * Return 0 if all went well else corresponding error value.
  183. */
  184. static struct ti_sci_inta_vint_desc *ti_sci_inta_alloc_parent_irq(struct irq_domain *domain)
  185. {
  186. struct ti_sci_inta_irq_domain *inta = domain->host_data;
  187. struct ti_sci_inta_vint_desc *vint_desc;
  188. struct irq_fwspec parent_fwspec;
  189. struct device_node *parent_node;
  190. unsigned int parent_virq;
  191. int p_hwirq, ret;
  192. u16 vint_id;
  193. vint_id = ti_sci_get_free_resource(inta->vint);
  194. if (vint_id == TI_SCI_RESOURCE_NULL)
  195. return ERR_PTR(-EINVAL);
  196. p_hwirq = ti_sci_inta_xlate_irq(inta, vint_id);
  197. if (p_hwirq < 0) {
  198. ret = p_hwirq;
  199. goto free_vint;
  200. }
  201. vint_desc = kzalloc(sizeof(*vint_desc), GFP_KERNEL);
  202. if (!vint_desc) {
  203. ret = -ENOMEM;
  204. goto free_vint;
  205. }
  206. vint_desc->domain = domain;
  207. vint_desc->vint_id = vint_id;
  208. INIT_LIST_HEAD(&vint_desc->list);
  209. parent_node = of_irq_find_parent(dev_of_node(&inta->pdev->dev));
  210. parent_fwspec.fwnode = of_node_to_fwnode(parent_node);
  211. if (of_device_is_compatible(parent_node, "arm,gic-v3")) {
  212. /* Parent is GIC */
  213. parent_fwspec.param_count = 3;
  214. parent_fwspec.param[0] = 0;
  215. parent_fwspec.param[1] = p_hwirq - 32;
  216. parent_fwspec.param[2] = IRQ_TYPE_LEVEL_HIGH;
  217. } else {
  218. /* Parent is Interrupt Router */
  219. parent_fwspec.param_count = 1;
  220. parent_fwspec.param[0] = p_hwirq;
  221. }
  222. parent_virq = irq_create_fwspec_mapping(&parent_fwspec);
  223. if (parent_virq == 0) {
  224. dev_err(&inta->pdev->dev, "Parent IRQ allocation failed\n");
  225. ret = -EINVAL;
  226. goto free_vint_desc;
  227. }
  228. vint_desc->parent_virq = parent_virq;
  229. list_add_tail(&vint_desc->list, &inta->vint_list);
  230. irq_set_chained_handler_and_data(vint_desc->parent_virq,
  231. ti_sci_inta_irq_handler, vint_desc);
  232. return vint_desc;
  233. free_vint_desc:
  234. kfree(vint_desc);
  235. free_vint:
  236. ti_sci_release_resource(inta->vint, vint_id);
  237. return ERR_PTR(ret);
  238. }
  239. /**
  240. * ti_sci_inta_alloc_event() - Attach an event to a IA vint.
  241. * @vint_desc: Pointer to vint_desc to which the event gets attached
  242. * @free_bit: Bit inside vint to which event gets attached
  243. * @hwirq: hwirq of the input event
  244. *
  245. * Return event_desc pointer if all went ok else appropriate error value.
  246. */
  247. static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_event(struct ti_sci_inta_vint_desc *vint_desc,
  248. u16 free_bit,
  249. u32 hwirq)
  250. {
  251. struct ti_sci_inta_irq_domain *inta = vint_desc->domain->host_data;
  252. struct ti_sci_inta_event_desc *event_desc;
  253. u16 dev_id, dev_index;
  254. int err;
  255. dev_id = ti_sci_inta_get_dev_id(inta, hwirq);
  256. dev_index = HWIRQ_TO_IRQID(hwirq);
  257. event_desc = &vint_desc->events[free_bit];
  258. event_desc->hwirq = hwirq;
  259. event_desc->vint_bit = free_bit;
  260. event_desc->global_event = ti_sci_get_free_resource(inta->global_event);
  261. if (event_desc->global_event == TI_SCI_RESOURCE_NULL)
  262. return ERR_PTR(-EINVAL);
  263. err = inta->sci->ops.rm_irq_ops.set_event_map(inta->sci,
  264. dev_id, dev_index,
  265. inta->ti_sci_id,
  266. vint_desc->vint_id,
  267. event_desc->global_event,
  268. free_bit);
  269. if (err)
  270. goto free_global_event;
  271. return event_desc;
  272. free_global_event:
  273. ti_sci_release_resource(inta->global_event, event_desc->global_event);
  274. return ERR_PTR(err);
  275. }
  276. /**
  277. * ti_sci_inta_alloc_irq() - Allocate an irq within INTA domain
  278. * @domain: irq_domain pointer corresponding to INTA
  279. * @hwirq: hwirq of the input event
  280. *
  281. * Note: Allocation happens in the following manner:
  282. * - Find a free bit available in any of the vints available in the list.
  283. * - If not found, allocate a vint from the vint pool
  284. * - Attach the free bit to input hwirq.
  285. * Return event_desc if all went ok else appropriate error value.
  286. */
  287. static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_irq(struct irq_domain *domain,
  288. u32 hwirq)
  289. {
  290. struct ti_sci_inta_irq_domain *inta = domain->host_data;
  291. struct ti_sci_inta_vint_desc *vint_desc = NULL;
  292. struct ti_sci_inta_event_desc *event_desc;
  293. u16 free_bit;
  294. mutex_lock(&inta->vint_mutex);
  295. list_for_each_entry(vint_desc, &inta->vint_list, list) {
  296. free_bit = find_first_zero_bit(vint_desc->event_map,
  297. MAX_EVENTS_PER_VINT);
  298. if (free_bit != MAX_EVENTS_PER_VINT) {
  299. set_bit(free_bit, vint_desc->event_map);
  300. goto alloc_event;
  301. }
  302. }
  303. /* No free bits available. Allocate a new vint */
  304. vint_desc = ti_sci_inta_alloc_parent_irq(domain);
  305. if (IS_ERR(vint_desc)) {
  306. event_desc = ERR_CAST(vint_desc);
  307. goto unlock;
  308. }
  309. free_bit = find_first_zero_bit(vint_desc->event_map,
  310. MAX_EVENTS_PER_VINT);
  311. set_bit(free_bit, vint_desc->event_map);
  312. alloc_event:
  313. event_desc = ti_sci_inta_alloc_event(vint_desc, free_bit, hwirq);
  314. if (IS_ERR(event_desc))
  315. clear_bit(free_bit, vint_desc->event_map);
  316. unlock:
  317. mutex_unlock(&inta->vint_mutex);
  318. return event_desc;
  319. }
  320. /**
  321. * ti_sci_inta_free_parent_irq() - Free a parent irq to INTA
  322. * @inta: Pointer to inta domain.
  323. * @vint_desc: Pointer to vint_desc that needs to be freed.
  324. */
  325. static void ti_sci_inta_free_parent_irq(struct ti_sci_inta_irq_domain *inta,
  326. struct ti_sci_inta_vint_desc *vint_desc)
  327. {
  328. if (find_first_bit(vint_desc->event_map, MAX_EVENTS_PER_VINT) == MAX_EVENTS_PER_VINT) {
  329. list_del(&vint_desc->list);
  330. ti_sci_release_resource(inta->vint, vint_desc->vint_id);
  331. irq_dispose_mapping(vint_desc->parent_virq);
  332. kfree(vint_desc);
  333. }
  334. }
  335. /**
  336. * ti_sci_inta_free_irq() - Free an IRQ within INTA domain
  337. * @event_desc: Pointer to event_desc that needs to be freed.
  338. * @hwirq: Hwirq number within INTA domain that needs to be freed
  339. */
  340. static void ti_sci_inta_free_irq(struct ti_sci_inta_event_desc *event_desc,
  341. u32 hwirq)
  342. {
  343. struct ti_sci_inta_vint_desc *vint_desc;
  344. struct ti_sci_inta_irq_domain *inta;
  345. u16 dev_id;
  346. vint_desc = to_vint_desc(event_desc, event_desc->vint_bit);
  347. inta = vint_desc->domain->host_data;
  348. dev_id = ti_sci_inta_get_dev_id(inta, hwirq);
  349. /* free event irq */
  350. mutex_lock(&inta->vint_mutex);
  351. inta->sci->ops.rm_irq_ops.free_event_map(inta->sci,
  352. dev_id, HWIRQ_TO_IRQID(hwirq),
  353. inta->ti_sci_id,
  354. vint_desc->vint_id,
  355. event_desc->global_event,
  356. event_desc->vint_bit);
  357. clear_bit(event_desc->vint_bit, vint_desc->event_map);
  358. ti_sci_release_resource(inta->global_event, event_desc->global_event);
  359. event_desc->global_event = TI_SCI_RESOURCE_NULL;
  360. event_desc->hwirq = 0;
  361. ti_sci_inta_free_parent_irq(inta, vint_desc);
  362. mutex_unlock(&inta->vint_mutex);
  363. }
  364. /**
  365. * ti_sci_inta_request_resources() - Allocate resources for input irq
  366. * @data: Pointer to corresponding irq_data
  367. *
  368. * Note: This is the core api where the actual allocation happens for input
  369. * hwirq. This allocation involves creating a parent irq for vint.
  370. * If this is done in irq_domain_ops.alloc() then a deadlock is reached
  371. * for allocation. So this allocation is being done in request_resources()
  372. *
  373. * Return: 0 if all went well else corresponding error.
  374. */
  375. static int ti_sci_inta_request_resources(struct irq_data *data)
  376. {
  377. struct ti_sci_inta_event_desc *event_desc;
  378. event_desc = ti_sci_inta_alloc_irq(data->domain, data->hwirq);
  379. if (IS_ERR(event_desc))
  380. return PTR_ERR(event_desc);
  381. data->chip_data = event_desc;
  382. return 0;
  383. }
  384. /**
  385. * ti_sci_inta_release_resources - Release resources for input irq
  386. * @data: Pointer to corresponding irq_data
  387. *
  388. * Note: Corresponding to request_resources(), all the unmapping and deletion
  389. * of parent vint irqs happens in this api.
  390. */
  391. static void ti_sci_inta_release_resources(struct irq_data *data)
  392. {
  393. struct ti_sci_inta_event_desc *event_desc;
  394. event_desc = irq_data_get_irq_chip_data(data);
  395. ti_sci_inta_free_irq(event_desc, data->hwirq);
  396. }
  397. /**
  398. * ti_sci_inta_manage_event() - Control the event based on the offset
  399. * @data: Pointer to corresponding irq_data
  400. * @offset: register offset using which event is controlled.
  401. */
  402. static void ti_sci_inta_manage_event(struct irq_data *data, u32 offset)
  403. {
  404. struct ti_sci_inta_event_desc *event_desc;
  405. struct ti_sci_inta_vint_desc *vint_desc;
  406. struct ti_sci_inta_irq_domain *inta;
  407. event_desc = irq_data_get_irq_chip_data(data);
  408. vint_desc = to_vint_desc(event_desc, event_desc->vint_bit);
  409. inta = data->domain->host_data;
  410. writeq_relaxed(BIT(event_desc->vint_bit),
  411. inta->base + vint_desc->vint_id * 0x1000 + offset);
  412. }
  413. /**
  414. * ti_sci_inta_mask_irq() - Mask an event
  415. * @data: Pointer to corresponding irq_data
  416. */
  417. static void ti_sci_inta_mask_irq(struct irq_data *data)
  418. {
  419. ti_sci_inta_manage_event(data, VINT_ENABLE_CLR_OFFSET);
  420. }
  421. /**
  422. * ti_sci_inta_unmask_irq() - Unmask an event
  423. * @data: Pointer to corresponding irq_data
  424. */
  425. static void ti_sci_inta_unmask_irq(struct irq_data *data)
  426. {
  427. ti_sci_inta_manage_event(data, VINT_ENABLE_SET_OFFSET);
  428. }
  429. /**
  430. * ti_sci_inta_ack_irq() - Ack an event
  431. * @data: Pointer to corresponding irq_data
  432. */
  433. static void ti_sci_inta_ack_irq(struct irq_data *data)
  434. {
  435. /*
  436. * Do not clear the event if hardware is capable of sending
  437. * a down event.
  438. */
  439. if (irqd_get_trigger_type(data) != IRQF_TRIGGER_HIGH)
  440. ti_sci_inta_manage_event(data, VINT_STATUS_OFFSET);
  441. }
  442. static int ti_sci_inta_set_affinity(struct irq_data *d,
  443. const struct cpumask *mask_val, bool force)
  444. {
  445. return -EINVAL;
  446. }
  447. /**
  448. * ti_sci_inta_set_type() - Update the trigger type of the irq.
  449. * @data: Pointer to corresponding irq_data
  450. * @type: Trigger type as specified by user
  451. *
  452. * Note: This updates the handle_irq callback for level msi.
  453. *
  454. * Return 0 if all went well else appropriate error.
  455. */
  456. static int ti_sci_inta_set_type(struct irq_data *data, unsigned int type)
  457. {
  458. /*
  459. * .alloc default sets handle_edge_irq. But if the user specifies
  460. * that IRQ is level MSI, then update the handle to handle_level_irq
  461. */
  462. switch (type & IRQ_TYPE_SENSE_MASK) {
  463. case IRQF_TRIGGER_HIGH:
  464. irq_set_handler_locked(data, handle_level_irq);
  465. return 0;
  466. case IRQF_TRIGGER_RISING:
  467. return 0;
  468. default:
  469. return -EINVAL;
  470. }
  471. }
  472. static struct irq_chip ti_sci_inta_irq_chip = {
  473. .name = "INTA",
  474. .irq_ack = ti_sci_inta_ack_irq,
  475. .irq_mask = ti_sci_inta_mask_irq,
  476. .irq_set_type = ti_sci_inta_set_type,
  477. .irq_unmask = ti_sci_inta_unmask_irq,
  478. .irq_set_affinity = ti_sci_inta_set_affinity,
  479. .irq_request_resources = ti_sci_inta_request_resources,
  480. .irq_release_resources = ti_sci_inta_release_resources,
  481. };
  482. /**
  483. * ti_sci_inta_irq_domain_free() - Free an IRQ from the IRQ domain
  484. * @domain: Domain to which the irqs belong
  485. * @virq: base linux virtual IRQ to be freed.
  486. * @nr_irqs: Number of continuous irqs to be freed
  487. */
  488. static void ti_sci_inta_irq_domain_free(struct irq_domain *domain,
  489. unsigned int virq, unsigned int nr_irqs)
  490. {
  491. struct irq_data *data = irq_domain_get_irq_data(domain, virq);
  492. irq_domain_reset_irq_data(data);
  493. }
  494. /**
  495. * ti_sci_inta_irq_domain_alloc() - Allocate Interrupt aggregator IRQs
  496. * @domain: Point to the interrupt aggregator IRQ domain
  497. * @virq: Corresponding Linux virtual IRQ number
  498. * @nr_irqs: Continuous irqs to be allocated
  499. * @data: Pointer to firmware specifier
  500. *
  501. * No actual allocation happens here.
  502. *
  503. * Return 0 if all went well else appropriate error value.
  504. */
  505. static int ti_sci_inta_irq_domain_alloc(struct irq_domain *domain,
  506. unsigned int virq, unsigned int nr_irqs,
  507. void *data)
  508. {
  509. msi_alloc_info_t *arg = data;
  510. irq_domain_set_info(domain, virq, arg->hwirq, &ti_sci_inta_irq_chip,
  511. NULL, handle_edge_irq, NULL, NULL);
  512. return 0;
  513. }
  514. static const struct irq_domain_ops ti_sci_inta_irq_domain_ops = {
  515. .free = ti_sci_inta_irq_domain_free,
  516. .alloc = ti_sci_inta_irq_domain_alloc,
  517. };
  518. static struct irq_chip ti_sci_inta_msi_irq_chip = {
  519. .name = "MSI-INTA",
  520. .flags = IRQCHIP_SUPPORTS_LEVEL_MSI,
  521. };
  522. static void ti_sci_inta_msi_set_desc(msi_alloc_info_t *arg,
  523. struct msi_desc *desc)
  524. {
  525. struct platform_device *pdev = to_platform_device(desc->dev);
  526. arg->desc = desc;
  527. arg->hwirq = TO_HWIRQ(pdev->id, desc->inta.dev_index);
  528. }
  529. static struct msi_domain_ops ti_sci_inta_msi_ops = {
  530. .set_desc = ti_sci_inta_msi_set_desc,
  531. };
  532. static struct msi_domain_info ti_sci_inta_msi_domain_info = {
  533. .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
  534. MSI_FLAG_LEVEL_CAPABLE),
  535. .ops = &ti_sci_inta_msi_ops,
  536. .chip = &ti_sci_inta_msi_irq_chip,
  537. };
  538. static int ti_sci_inta_get_unmapped_sources(struct ti_sci_inta_irq_domain *inta)
  539. {
  540. struct device *dev = &inta->pdev->dev;
  541. struct device_node *node = dev_of_node(dev);
  542. struct of_phandle_iterator it;
  543. int count, err, ret, i;
  544. count = of_count_phandle_with_args(node, "ti,unmapped-event-sources", NULL);
  545. if (count <= 0)
  546. return 0;
  547. inta->unmapped_dev_ids = devm_kcalloc(dev, count,
  548. sizeof(*inta->unmapped_dev_ids),
  549. GFP_KERNEL);
  550. if (!inta->unmapped_dev_ids)
  551. return -ENOMEM;
  552. i = 0;
  553. of_for_each_phandle(&it, err, node, "ti,unmapped-event-sources", NULL, 0) {
  554. u32 dev_id;
  555. ret = of_property_read_u32(it.node, "ti,sci-dev-id", &dev_id);
  556. if (ret) {
  557. dev_err(dev, "ti,sci-dev-id read failure for %pOFf\n", it.node);
  558. of_node_put(it.node);
  559. return ret;
  560. }
  561. inta->unmapped_dev_ids[i++] = dev_id;
  562. }
  563. inta->unmapped_cnt = count;
  564. return 0;
  565. }
  566. static int ti_sci_inta_irq_domain_probe(struct platform_device *pdev)
  567. {
  568. struct irq_domain *parent_domain, *domain, *msi_domain;
  569. struct device_node *parent_node, *node;
  570. struct ti_sci_inta_irq_domain *inta;
  571. struct device *dev = &pdev->dev;
  572. struct resource *res;
  573. int ret;
  574. node = dev_of_node(dev);
  575. parent_node = of_irq_find_parent(node);
  576. if (!parent_node) {
  577. dev_err(dev, "Failed to get IRQ parent node\n");
  578. return -ENODEV;
  579. }
  580. parent_domain = irq_find_host(parent_node);
  581. if (!parent_domain)
  582. return -EPROBE_DEFER;
  583. inta = devm_kzalloc(dev, sizeof(*inta), GFP_KERNEL);
  584. if (!inta)
  585. return -ENOMEM;
  586. inta->pdev = pdev;
  587. inta->sci = devm_ti_sci_get_by_phandle(dev, "ti,sci");
  588. if (IS_ERR(inta->sci))
  589. return dev_err_probe(dev, PTR_ERR(inta->sci),
  590. "ti,sci read fail\n");
  591. ret = of_property_read_u32(dev->of_node, "ti,sci-dev-id", &inta->ti_sci_id);
  592. if (ret) {
  593. dev_err(dev, "missing 'ti,sci-dev-id' property\n");
  594. return -EINVAL;
  595. }
  596. inta->vint = devm_ti_sci_get_resource(inta->sci, dev, inta->ti_sci_id,
  597. TI_SCI_RESASG_SUBTYPE_IA_VINT);
  598. if (IS_ERR(inta->vint)) {
  599. dev_err(dev, "VINT resource allocation failed\n");
  600. return PTR_ERR(inta->vint);
  601. }
  602. inta->global_event = devm_ti_sci_get_resource(inta->sci, dev, inta->ti_sci_id,
  603. TI_SCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT);
  604. if (IS_ERR(inta->global_event)) {
  605. dev_err(dev, "Global event resource allocation failed\n");
  606. return PTR_ERR(inta->global_event);
  607. }
  608. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  609. inta->base = devm_ioremap_resource(dev, res);
  610. if (IS_ERR(inta->base))
  611. return PTR_ERR(inta->base);
  612. ret = ti_sci_inta_get_unmapped_sources(inta);
  613. if (ret)
  614. return ret;
  615. domain = irq_domain_add_linear(dev_of_node(dev),
  616. ti_sci_get_num_resources(inta->vint),
  617. &ti_sci_inta_irq_domain_ops, inta);
  618. if (!domain) {
  619. dev_err(dev, "Failed to allocate IRQ domain\n");
  620. return -ENOMEM;
  621. }
  622. msi_domain = ti_sci_inta_msi_create_irq_domain(of_node_to_fwnode(node),
  623. &ti_sci_inta_msi_domain_info,
  624. domain);
  625. if (!msi_domain) {
  626. irq_domain_remove(domain);
  627. dev_err(dev, "Failed to allocate msi domain\n");
  628. return -ENOMEM;
  629. }
  630. INIT_LIST_HEAD(&inta->vint_list);
  631. mutex_init(&inta->vint_mutex);
  632. dev_info(dev, "Interrupt Aggregator domain %d created\n", inta->ti_sci_id);
  633. return 0;
  634. }
  635. static const struct of_device_id ti_sci_inta_irq_domain_of_match[] = {
  636. { .compatible = "ti,sci-inta", },
  637. { /* sentinel */ },
  638. };
  639. MODULE_DEVICE_TABLE(of, ti_sci_inta_irq_domain_of_match);
  640. static struct platform_driver ti_sci_inta_irq_domain_driver = {
  641. .probe = ti_sci_inta_irq_domain_probe,
  642. .driver = {
  643. .name = "ti-sci-inta",
  644. .of_match_table = ti_sci_inta_irq_domain_of_match,
  645. },
  646. };
  647. module_platform_driver(ti_sci_inta_irq_domain_driver);
  648. MODULE_AUTHOR("Lokesh Vutla <lokeshvutla@ti.com>");
  649. MODULE_DESCRIPTION("K3 Interrupt Aggregator driver over TI SCI protocol");
  650. MODULE_LICENSE("GPL v2");