irq-gic-realview.c 2.2 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Special GIC quirks for the ARM RealView
  4. * Copyright (C) 2015 Linus Walleij
  5. */
  6. #include <linux/of.h>
  7. #include <linux/regmap.h>
  8. #include <linux/mfd/syscon.h>
  9. #include <linux/bitops.h>
  10. #include <linux/irqchip.h>
  11. #include <linux/irqchip/arm-gic.h>
  12. #define REALVIEW_SYS_LOCK_OFFSET 0x20
  13. #define REALVIEW_SYS_PLD_CTRL1 0x74
  14. #define REALVIEW_EB_REVB_SYS_PLD_CTRL1 0xD8
  15. #define VERSATILE_LOCK_VAL 0xA05F
  16. #define PLD_INTMODE_MASK BIT(22)|BIT(23)|BIT(24)
  17. #define PLD_INTMODE_LEGACY 0x0
  18. #define PLD_INTMODE_NEW_DCC BIT(22)
  19. #define PLD_INTMODE_NEW_NO_DCC BIT(23)
  20. #define PLD_INTMODE_FIQ_ENABLE BIT(24)
  21. /* For some reason RealView EB Rev B moved this register */
  22. static const struct of_device_id syscon_pldset_of_match[] = {
  23. {
  24. .compatible = "arm,realview-eb11mp-revb-syscon",
  25. .data = (void *)REALVIEW_EB_REVB_SYS_PLD_CTRL1,
  26. },
  27. {
  28. .compatible = "arm,realview-eb11mp-revc-syscon",
  29. .data = (void *)REALVIEW_SYS_PLD_CTRL1,
  30. },
  31. {
  32. .compatible = "arm,realview-eb-syscon",
  33. .data = (void *)REALVIEW_SYS_PLD_CTRL1,
  34. },
  35. {
  36. .compatible = "arm,realview-pb11mp-syscon",
  37. .data = (void *)REALVIEW_SYS_PLD_CTRL1,
  38. },
  39. {},
  40. };
  41. static int __init
  42. realview_gic_of_init(struct device_node *node, struct device_node *parent)
  43. {
  44. struct regmap *map;
  45. struct device_node *np;
  46. const struct of_device_id *gic_id;
  47. u32 pld1_ctrl;
  48. np = of_find_matching_node_and_match(NULL, syscon_pldset_of_match,
  49. &gic_id);
  50. if (!np)
  51. return -ENODEV;
  52. pld1_ctrl = (u32)gic_id->data;
  53. /* The PB11MPCore GIC needs to be configured in the syscon */
  54. map = syscon_node_to_regmap(np);
  55. if (!IS_ERR(map)) {
  56. /* new irq mode with no DCC */
  57. regmap_write(map, REALVIEW_SYS_LOCK_OFFSET,
  58. VERSATILE_LOCK_VAL);
  59. regmap_update_bits(map, pld1_ctrl,
  60. PLD_INTMODE_NEW_NO_DCC,
  61. PLD_INTMODE_MASK);
  62. regmap_write(map, REALVIEW_SYS_LOCK_OFFSET, 0x0000);
  63. pr_info("RealView GIC: set up interrupt controller to NEW mode, no DCC\n");
  64. } else {
  65. pr_err("RealView GIC setup: could not find syscon\n");
  66. return -ENODEV;
  67. }
  68. return gic_of_init(node, parent);
  69. }
  70. IRQCHIP_DECLARE(armtc11mp_gic, "arm,tc11mp-gic", realview_gic_of_init);
  71. IRQCHIP_DECLARE(armeb11mp_gic, "arm,eb11mp-gic", realview_gic_of_init);