ad5770r.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * AD5770R Digital to analog converters driver
  4. *
  5. * Copyright 2018 Analog Devices Inc.
  6. */
  7. #include <linux/bits.h>
  8. #include <linux/delay.h>
  9. #include <linux/device.h>
  10. #include <linux/gpio/consumer.h>
  11. #include <linux/iio/iio.h>
  12. #include <linux/iio/sysfs.h>
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/property.h>
  16. #include <linux/regmap.h>
  17. #include <linux/regulator/consumer.h>
  18. #include <linux/spi/spi.h>
  19. #define ADI_SPI_IF_CONFIG_A 0x00
  20. #define ADI_SPI_IF_CONFIG_B 0x01
  21. #define ADI_SPI_IF_DEVICE_CONFIG 0x02
  22. #define ADI_SPI_IF_CHIP_TYPE 0x03
  23. #define ADI_SPI_IF_PRODUCT_ID_L 0x04
  24. #define ADI_SPI_IF_PRODUCT_ID_H 0x05
  25. #define ADI_SPI_IF_CHIP_GRADE 0x06
  26. #define ADI_SPI_IF_SCRACTH_PAD 0x0A
  27. #define ADI_SPI_IF_SPI_REVISION 0x0B
  28. #define ADI_SPI_IF_SPI_VENDOR_L 0x0C
  29. #define ADI_SPI_IF_SPI_VENDOR_H 0x0D
  30. #define ADI_SPI_IF_SPI_STREAM_MODE 0x0E
  31. #define ADI_SPI_IF_CONFIG_C 0x10
  32. #define ADI_SPI_IF_STATUS_A 0x11
  33. /* ADI_SPI_IF_CONFIG_A */
  34. #define ADI_SPI_IF_SW_RESET_MSK (BIT(0) | BIT(7))
  35. #define ADI_SPI_IF_SW_RESET_SEL(x) ((x) & ADI_SPI_IF_SW_RESET_MSK)
  36. #define ADI_SPI_IF_ADDR_ASC_MSK (BIT(2) | BIT(5))
  37. #define ADI_SPI_IF_ADDR_ASC_SEL(x) (((x) << 2) & ADI_SPI_IF_ADDR_ASC_MSK)
  38. /* ADI_SPI_IF_CONFIG_B */
  39. #define ADI_SPI_IF_SINGLE_INS_MSK BIT(7)
  40. #define ADI_SPI_IF_SINGLE_INS_SEL(x) FIELD_PREP(ADI_SPI_IF_SINGLE_INS_MSK, x)
  41. #define ADI_SPI_IF_SHORT_INS_MSK BIT(7)
  42. #define ADI_SPI_IF_SHORT_INS_SEL(x) FIELD_PREP(ADI_SPI_IF_SINGLE_INS_MSK, x)
  43. /* ADI_SPI_IF_CONFIG_C */
  44. #define ADI_SPI_IF_STRICT_REG_MSK BIT(5)
  45. #define ADI_SPI_IF_STRICT_REG_GET(x) FIELD_GET(ADI_SPI_IF_STRICT_REG_MSK, x)
  46. /* AD5770R configuration registers */
  47. #define AD5770R_CHANNEL_CONFIG 0x14
  48. #define AD5770R_OUTPUT_RANGE(ch) (0x15 + (ch))
  49. #define AD5770R_FILTER_RESISTOR(ch) (0x1D + (ch))
  50. #define AD5770R_REFERENCE 0x1B
  51. #define AD5770R_DAC_LSB(ch) (0x26 + 2 * (ch))
  52. #define AD5770R_DAC_MSB(ch) (0x27 + 2 * (ch))
  53. #define AD5770R_CH_SELECT 0x34
  54. #define AD5770R_CH_ENABLE 0x44
  55. /* AD5770R_CHANNEL_CONFIG */
  56. #define AD5770R_CFG_CH0_SINK_EN(x) (((x) & 0x1) << 7)
  57. #define AD5770R_CFG_SHUTDOWN_B(x, ch) (((x) & 0x1) << (ch))
  58. /* AD5770R_OUTPUT_RANGE */
  59. #define AD5770R_RANGE_OUTPUT_SCALING(x) (((x) & GENMASK(5, 0)) << 2)
  60. #define AD5770R_RANGE_MODE(x) ((x) & GENMASK(1, 0))
  61. /* AD5770R_REFERENCE */
  62. #define AD5770R_REF_RESISTOR_SEL(x) (((x) & 0x1) << 2)
  63. #define AD5770R_REF_SEL(x) ((x) & GENMASK(1, 0))
  64. /* AD5770R_CH_ENABLE */
  65. #define AD5770R_CH_SET(x, ch) (((x) & 0x1) << (ch))
  66. #define AD5770R_MAX_CHANNELS 6
  67. #define AD5770R_MAX_CH_MODES 14
  68. #define AD5770R_LOW_VREF_mV 1250
  69. #define AD5770R_HIGH_VREF_mV 2500
  70. enum ad5770r_ch0_modes {
  71. AD5770R_CH0_0_300 = 0,
  72. AD5770R_CH0_NEG_60_0,
  73. AD5770R_CH0_NEG_60_300
  74. };
  75. enum ad5770r_ch1_modes {
  76. AD5770R_CH1_0_140_LOW_HEAD = 1,
  77. AD5770R_CH1_0_140_LOW_NOISE,
  78. AD5770R_CH1_0_250
  79. };
  80. enum ad5770r_ch2_5_modes {
  81. AD5770R_CH_LOW_RANGE = 0,
  82. AD5770R_CH_HIGH_RANGE
  83. };
  84. enum ad5770r_ref_v {
  85. AD5770R_EXT_2_5_V = 0,
  86. AD5770R_INT_1_25_V_OUT_ON,
  87. AD5770R_EXT_1_25_V,
  88. AD5770R_INT_1_25_V_OUT_OFF
  89. };
  90. enum ad5770r_output_filter_resistor {
  91. AD5770R_FILTER_60_OHM = 0x0,
  92. AD5770R_FILTER_5_6_KOHM = 0x5,
  93. AD5770R_FILTER_11_2_KOHM,
  94. AD5770R_FILTER_22_2_KOHM,
  95. AD5770R_FILTER_44_4_KOHM,
  96. AD5770R_FILTER_104_KOHM,
  97. };
  98. struct ad5770r_out_range {
  99. u8 out_scale;
  100. u8 out_range_mode;
  101. };
  102. /**
  103. * struct ad5770R_state - driver instance specific data
  104. * @spi: spi_device
  105. * @regmap: regmap
  106. * @vref_reg: fixed regulator for reference configuration
  107. * @gpio_reset: gpio descriptor
  108. * @output_mode: array contains channels output ranges
  109. * @vref: reference value
  110. * @ch_pwr_down: powerdown flags
  111. * @internal_ref: internal reference flag
  112. * @external_res: external 2.5k resistor flag
  113. * @transf_buf: cache aligned buffer for spi read/write
  114. */
  115. struct ad5770r_state {
  116. struct spi_device *spi;
  117. struct regmap *regmap;
  118. struct regulator *vref_reg;
  119. struct gpio_desc *gpio_reset;
  120. struct ad5770r_out_range output_mode[AD5770R_MAX_CHANNELS];
  121. int vref;
  122. bool ch_pwr_down[AD5770R_MAX_CHANNELS];
  123. bool internal_ref;
  124. bool external_res;
  125. u8 transf_buf[2] ____cacheline_aligned;
  126. };
  127. static const struct regmap_config ad5770r_spi_regmap_config = {
  128. .reg_bits = 8,
  129. .val_bits = 8,
  130. .read_flag_mask = BIT(7),
  131. };
  132. struct ad5770r_output_modes {
  133. unsigned int ch;
  134. u8 mode;
  135. int min;
  136. int max;
  137. };
  138. static struct ad5770r_output_modes ad5770r_rng_tbl[] = {
  139. { 0, AD5770R_CH0_0_300, 0, 300 },
  140. { 0, AD5770R_CH0_NEG_60_0, -60, 0 },
  141. { 0, AD5770R_CH0_NEG_60_300, -60, 300 },
  142. { 1, AD5770R_CH1_0_140_LOW_HEAD, 0, 140 },
  143. { 1, AD5770R_CH1_0_140_LOW_NOISE, 0, 140 },
  144. { 1, AD5770R_CH1_0_250, 0, 250 },
  145. { 2, AD5770R_CH_LOW_RANGE, 0, 55 },
  146. { 2, AD5770R_CH_HIGH_RANGE, 0, 150 },
  147. { 3, AD5770R_CH_LOW_RANGE, 0, 45 },
  148. { 3, AD5770R_CH_HIGH_RANGE, 0, 100 },
  149. { 4, AD5770R_CH_LOW_RANGE, 0, 45 },
  150. { 4, AD5770R_CH_HIGH_RANGE, 0, 100 },
  151. { 5, AD5770R_CH_LOW_RANGE, 0, 45 },
  152. { 5, AD5770R_CH_HIGH_RANGE, 0, 100 },
  153. };
  154. static const unsigned int ad5770r_filter_freqs[] = {
  155. 153, 357, 715, 1400, 2800, 262000,
  156. };
  157. static const unsigned int ad5770r_filter_reg_vals[] = {
  158. AD5770R_FILTER_104_KOHM,
  159. AD5770R_FILTER_44_4_KOHM,
  160. AD5770R_FILTER_22_2_KOHM,
  161. AD5770R_FILTER_11_2_KOHM,
  162. AD5770R_FILTER_5_6_KOHM,
  163. AD5770R_FILTER_60_OHM
  164. };
  165. static int ad5770r_set_output_mode(struct ad5770r_state *st,
  166. const struct ad5770r_out_range *out_mode,
  167. int channel)
  168. {
  169. unsigned int regval;
  170. regval = AD5770R_RANGE_OUTPUT_SCALING(out_mode->out_scale) |
  171. AD5770R_RANGE_MODE(out_mode->out_range_mode);
  172. return regmap_write(st->regmap,
  173. AD5770R_OUTPUT_RANGE(channel), regval);
  174. }
  175. static int ad5770r_set_reference(struct ad5770r_state *st)
  176. {
  177. unsigned int regval;
  178. regval = AD5770R_REF_RESISTOR_SEL(st->external_res);
  179. if (st->internal_ref) {
  180. regval |= AD5770R_REF_SEL(AD5770R_INT_1_25_V_OUT_OFF);
  181. } else {
  182. switch (st->vref) {
  183. case AD5770R_LOW_VREF_mV:
  184. regval |= AD5770R_REF_SEL(AD5770R_EXT_1_25_V);
  185. break;
  186. case AD5770R_HIGH_VREF_mV:
  187. regval |= AD5770R_REF_SEL(AD5770R_EXT_2_5_V);
  188. break;
  189. default:
  190. regval = AD5770R_REF_SEL(AD5770R_INT_1_25_V_OUT_OFF);
  191. break;
  192. }
  193. }
  194. return regmap_write(st->regmap, AD5770R_REFERENCE, regval);
  195. }
  196. static int ad5770r_soft_reset(struct ad5770r_state *st)
  197. {
  198. return regmap_write(st->regmap, ADI_SPI_IF_CONFIG_A,
  199. ADI_SPI_IF_SW_RESET_SEL(1));
  200. }
  201. static int ad5770r_reset(struct ad5770r_state *st)
  202. {
  203. /* Perform software reset if no GPIO provided */
  204. if (!st->gpio_reset)
  205. return ad5770r_soft_reset(st);
  206. gpiod_set_value_cansleep(st->gpio_reset, 0);
  207. usleep_range(10, 20);
  208. gpiod_set_value_cansleep(st->gpio_reset, 1);
  209. /* data must not be written during reset timeframe */
  210. usleep_range(100, 200);
  211. return 0;
  212. }
  213. static int ad5770r_get_range(struct ad5770r_state *st,
  214. int ch, int *min, int *max)
  215. {
  216. int i;
  217. u8 tbl_ch, tbl_mode, out_range;
  218. out_range = st->output_mode[ch].out_range_mode;
  219. for (i = 0; i < AD5770R_MAX_CH_MODES; i++) {
  220. tbl_ch = ad5770r_rng_tbl[i].ch;
  221. tbl_mode = ad5770r_rng_tbl[i].mode;
  222. if (tbl_ch == ch && tbl_mode == out_range) {
  223. *min = ad5770r_rng_tbl[i].min;
  224. *max = ad5770r_rng_tbl[i].max;
  225. return 0;
  226. }
  227. }
  228. return -EINVAL;
  229. }
  230. static int ad5770r_get_filter_freq(struct iio_dev *indio_dev,
  231. const struct iio_chan_spec *chan, int *freq)
  232. {
  233. struct ad5770r_state *st = iio_priv(indio_dev);
  234. int ret;
  235. unsigned int regval, i;
  236. ret = regmap_read(st->regmap,
  237. AD5770R_FILTER_RESISTOR(chan->channel), &regval);
  238. if (ret < 0)
  239. return ret;
  240. for (i = 0; i < ARRAY_SIZE(ad5770r_filter_reg_vals); i++)
  241. if (regval == ad5770r_filter_reg_vals[i])
  242. break;
  243. if (i == ARRAY_SIZE(ad5770r_filter_reg_vals))
  244. return -EINVAL;
  245. *freq = ad5770r_filter_freqs[i];
  246. return IIO_VAL_INT;
  247. }
  248. static int ad5770r_set_filter_freq(struct iio_dev *indio_dev,
  249. const struct iio_chan_spec *chan,
  250. unsigned int freq)
  251. {
  252. struct ad5770r_state *st = iio_priv(indio_dev);
  253. unsigned int regval, i;
  254. for (i = 0; i < ARRAY_SIZE(ad5770r_filter_freqs); i++)
  255. if (ad5770r_filter_freqs[i] >= freq)
  256. break;
  257. if (i == ARRAY_SIZE(ad5770r_filter_freqs))
  258. return -EINVAL;
  259. regval = ad5770r_filter_reg_vals[i];
  260. return regmap_write(st->regmap, AD5770R_FILTER_RESISTOR(chan->channel),
  261. regval);
  262. }
  263. static int ad5770r_read_raw(struct iio_dev *indio_dev,
  264. struct iio_chan_spec const *chan,
  265. int *val, int *val2, long info)
  266. {
  267. struct ad5770r_state *st = iio_priv(indio_dev);
  268. int max, min, ret;
  269. u16 buf16;
  270. switch (info) {
  271. case IIO_CHAN_INFO_RAW:
  272. ret = regmap_bulk_read(st->regmap,
  273. chan->address,
  274. st->transf_buf, 2);
  275. if (ret)
  276. return 0;
  277. buf16 = st->transf_buf[0] + (st->transf_buf[1] << 8);
  278. *val = buf16 >> 2;
  279. return IIO_VAL_INT;
  280. case IIO_CHAN_INFO_SCALE:
  281. ret = ad5770r_get_range(st, chan->channel, &min, &max);
  282. if (ret < 0)
  283. return ret;
  284. *val = max - min;
  285. /* There is no sign bit. (negative current is mapped from 0)
  286. * (sourced/sinked) current = raw * scale + offset
  287. * where offset in case of CH0 can be negative.
  288. */
  289. *val2 = 14;
  290. return IIO_VAL_FRACTIONAL_LOG2;
  291. case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
  292. return ad5770r_get_filter_freq(indio_dev, chan, val);
  293. case IIO_CHAN_INFO_OFFSET:
  294. ret = ad5770r_get_range(st, chan->channel, &min, &max);
  295. if (ret < 0)
  296. return ret;
  297. *val = min;
  298. return IIO_VAL_INT;
  299. default:
  300. return -EINVAL;
  301. }
  302. }
  303. static int ad5770r_write_raw(struct iio_dev *indio_dev,
  304. struct iio_chan_spec const *chan,
  305. int val, int val2, long info)
  306. {
  307. struct ad5770r_state *st = iio_priv(indio_dev);
  308. switch (info) {
  309. case IIO_CHAN_INFO_RAW:
  310. st->transf_buf[0] = ((u16)val >> 6);
  311. st->transf_buf[1] = (val & GENMASK(5, 0)) << 2;
  312. return regmap_bulk_write(st->regmap, chan->address,
  313. st->transf_buf, 2);
  314. case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
  315. return ad5770r_set_filter_freq(indio_dev, chan, val);
  316. default:
  317. return -EINVAL;
  318. }
  319. }
  320. static int ad5770r_read_freq_avail(struct iio_dev *indio_dev,
  321. struct iio_chan_spec const *chan,
  322. const int **vals, int *type, int *length,
  323. long mask)
  324. {
  325. switch (mask) {
  326. case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
  327. *type = IIO_VAL_INT;
  328. *vals = ad5770r_filter_freqs;
  329. *length = ARRAY_SIZE(ad5770r_filter_freqs);
  330. return IIO_AVAIL_LIST;
  331. }
  332. return -EINVAL;
  333. }
  334. static int ad5770r_reg_access(struct iio_dev *indio_dev,
  335. unsigned int reg,
  336. unsigned int writeval,
  337. unsigned int *readval)
  338. {
  339. struct ad5770r_state *st = iio_priv(indio_dev);
  340. if (readval)
  341. return regmap_read(st->regmap, reg, readval);
  342. else
  343. return regmap_write(st->regmap, reg, writeval);
  344. }
  345. static const struct iio_info ad5770r_info = {
  346. .read_raw = ad5770r_read_raw,
  347. .write_raw = ad5770r_write_raw,
  348. .read_avail = ad5770r_read_freq_avail,
  349. .debugfs_reg_access = &ad5770r_reg_access,
  350. };
  351. static int ad5770r_store_output_range(struct ad5770r_state *st,
  352. int min, int max, int index)
  353. {
  354. int i;
  355. for (i = 0; i < AD5770R_MAX_CH_MODES; i++) {
  356. if (ad5770r_rng_tbl[i].ch != index)
  357. continue;
  358. if (ad5770r_rng_tbl[i].min != min ||
  359. ad5770r_rng_tbl[i].max != max)
  360. continue;
  361. st->output_mode[index].out_range_mode = ad5770r_rng_tbl[i].mode;
  362. return 0;
  363. }
  364. return -EINVAL;
  365. }
  366. static ssize_t ad5770r_read_dac_powerdown(struct iio_dev *indio_dev,
  367. uintptr_t private,
  368. const struct iio_chan_spec *chan,
  369. char *buf)
  370. {
  371. struct ad5770r_state *st = iio_priv(indio_dev);
  372. return sprintf(buf, "%d\n", st->ch_pwr_down[chan->channel]);
  373. }
  374. static ssize_t ad5770r_write_dac_powerdown(struct iio_dev *indio_dev,
  375. uintptr_t private,
  376. const struct iio_chan_spec *chan,
  377. const char *buf, size_t len)
  378. {
  379. struct ad5770r_state *st = iio_priv(indio_dev);
  380. unsigned int regval;
  381. unsigned int mask;
  382. bool readin;
  383. int ret;
  384. ret = kstrtobool(buf, &readin);
  385. if (ret)
  386. return ret;
  387. readin = !readin;
  388. regval = AD5770R_CFG_SHUTDOWN_B(readin, chan->channel);
  389. if (chan->channel == 0 &&
  390. st->output_mode[0].out_range_mode > AD5770R_CH0_0_300) {
  391. regval |= AD5770R_CFG_CH0_SINK_EN(readin);
  392. mask = BIT(chan->channel) + BIT(7);
  393. } else {
  394. mask = BIT(chan->channel);
  395. }
  396. ret = regmap_update_bits(st->regmap, AD5770R_CHANNEL_CONFIG, mask,
  397. regval);
  398. if (ret)
  399. return ret;
  400. regval = AD5770R_CH_SET(readin, chan->channel);
  401. ret = regmap_update_bits(st->regmap, AD5770R_CH_ENABLE,
  402. BIT(chan->channel), regval);
  403. if (ret)
  404. return ret;
  405. st->ch_pwr_down[chan->channel] = !readin;
  406. return len;
  407. }
  408. static const struct iio_chan_spec_ext_info ad5770r_ext_info[] = {
  409. {
  410. .name = "powerdown",
  411. .read = ad5770r_read_dac_powerdown,
  412. .write = ad5770r_write_dac_powerdown,
  413. .shared = IIO_SEPARATE,
  414. },
  415. { }
  416. };
  417. #define AD5770R_IDAC_CHANNEL(index, reg) { \
  418. .type = IIO_CURRENT, \
  419. .address = reg, \
  420. .indexed = 1, \
  421. .channel = index, \
  422. .output = 1, \
  423. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  424. BIT(IIO_CHAN_INFO_SCALE) | \
  425. BIT(IIO_CHAN_INFO_OFFSET) | \
  426. BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
  427. .info_mask_shared_by_type_available = \
  428. BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
  429. .ext_info = ad5770r_ext_info, \
  430. }
  431. static const struct iio_chan_spec ad5770r_channels[] = {
  432. AD5770R_IDAC_CHANNEL(0, AD5770R_DAC_MSB(0)),
  433. AD5770R_IDAC_CHANNEL(1, AD5770R_DAC_MSB(1)),
  434. AD5770R_IDAC_CHANNEL(2, AD5770R_DAC_MSB(2)),
  435. AD5770R_IDAC_CHANNEL(3, AD5770R_DAC_MSB(3)),
  436. AD5770R_IDAC_CHANNEL(4, AD5770R_DAC_MSB(4)),
  437. AD5770R_IDAC_CHANNEL(5, AD5770R_DAC_MSB(5)),
  438. };
  439. static int ad5770r_channel_config(struct ad5770r_state *st)
  440. {
  441. int ret, tmp[2], min, max;
  442. unsigned int num;
  443. struct fwnode_handle *child;
  444. num = device_get_child_node_count(&st->spi->dev);
  445. if (num != AD5770R_MAX_CHANNELS)
  446. return -EINVAL;
  447. device_for_each_child_node(&st->spi->dev, child) {
  448. ret = fwnode_property_read_u32(child, "reg", &num);
  449. if (ret)
  450. goto err_child_out;
  451. if (num >= AD5770R_MAX_CHANNELS) {
  452. ret = -EINVAL;
  453. goto err_child_out;
  454. }
  455. ret = fwnode_property_read_u32_array(child,
  456. "adi,range-microamp",
  457. tmp, 2);
  458. if (ret)
  459. goto err_child_out;
  460. min = tmp[0] / 1000;
  461. max = tmp[1] / 1000;
  462. ret = ad5770r_store_output_range(st, min, max, num);
  463. if (ret)
  464. goto err_child_out;
  465. }
  466. return 0;
  467. err_child_out:
  468. fwnode_handle_put(child);
  469. return ret;
  470. }
  471. static int ad5770r_init(struct ad5770r_state *st)
  472. {
  473. int ret, i;
  474. st->gpio_reset = devm_gpiod_get_optional(&st->spi->dev, "reset",
  475. GPIOD_OUT_HIGH);
  476. if (IS_ERR(st->gpio_reset))
  477. return PTR_ERR(st->gpio_reset);
  478. /* Perform a reset */
  479. ret = ad5770r_reset(st);
  480. if (ret)
  481. return ret;
  482. /* Set output range */
  483. ret = ad5770r_channel_config(st);
  484. if (ret)
  485. return ret;
  486. for (i = 0; i < AD5770R_MAX_CHANNELS; i++) {
  487. ret = ad5770r_set_output_mode(st, &st->output_mode[i], i);
  488. if (ret)
  489. return ret;
  490. }
  491. st->external_res = fwnode_property_read_bool(st->spi->dev.fwnode,
  492. "adi,external-resistor");
  493. ret = ad5770r_set_reference(st);
  494. if (ret)
  495. return ret;
  496. /* Set outputs off */
  497. ret = regmap_write(st->regmap, AD5770R_CHANNEL_CONFIG, 0x00);
  498. if (ret)
  499. return ret;
  500. ret = regmap_write(st->regmap, AD5770R_CH_ENABLE, 0x00);
  501. if (ret)
  502. return ret;
  503. for (i = 0; i < AD5770R_MAX_CHANNELS; i++)
  504. st->ch_pwr_down[i] = true;
  505. return ret;
  506. }
  507. static void ad5770r_disable_regulator(void *data)
  508. {
  509. struct ad5770r_state *st = data;
  510. regulator_disable(st->vref_reg);
  511. }
  512. static int ad5770r_probe(struct spi_device *spi)
  513. {
  514. struct ad5770r_state *st;
  515. struct iio_dev *indio_dev;
  516. struct regmap *regmap;
  517. int ret;
  518. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  519. if (!indio_dev)
  520. return -ENOMEM;
  521. st = iio_priv(indio_dev);
  522. spi_set_drvdata(spi, indio_dev);
  523. st->spi = spi;
  524. regmap = devm_regmap_init_spi(spi, &ad5770r_spi_regmap_config);
  525. if (IS_ERR(regmap)) {
  526. dev_err(&spi->dev, "Error initializing spi regmap: %ld\n",
  527. PTR_ERR(regmap));
  528. return PTR_ERR(regmap);
  529. }
  530. st->regmap = regmap;
  531. st->vref_reg = devm_regulator_get_optional(&spi->dev, "vref");
  532. if (!IS_ERR(st->vref_reg)) {
  533. ret = regulator_enable(st->vref_reg);
  534. if (ret) {
  535. dev_err(&spi->dev,
  536. "Failed to enable vref regulators: %d\n", ret);
  537. return ret;
  538. }
  539. ret = devm_add_action_or_reset(&spi->dev,
  540. ad5770r_disable_regulator,
  541. st);
  542. if (ret < 0)
  543. return ret;
  544. ret = regulator_get_voltage(st->vref_reg);
  545. if (ret < 0)
  546. return ret;
  547. st->vref = ret / 1000;
  548. } else {
  549. if (PTR_ERR(st->vref_reg) == -ENODEV) {
  550. st->vref = AD5770R_LOW_VREF_mV;
  551. st->internal_ref = true;
  552. } else {
  553. return PTR_ERR(st->vref_reg);
  554. }
  555. }
  556. indio_dev->name = spi_get_device_id(spi)->name;
  557. indio_dev->info = &ad5770r_info;
  558. indio_dev->modes = INDIO_DIRECT_MODE;
  559. indio_dev->channels = ad5770r_channels;
  560. indio_dev->num_channels = ARRAY_SIZE(ad5770r_channels);
  561. ret = ad5770r_init(st);
  562. if (ret < 0) {
  563. dev_err(&spi->dev, "AD5770R init failed\n");
  564. return ret;
  565. }
  566. return devm_iio_device_register(&st->spi->dev, indio_dev);
  567. }
  568. static const struct of_device_id ad5770r_of_id[] = {
  569. { .compatible = "adi,ad5770r", },
  570. {},
  571. };
  572. MODULE_DEVICE_TABLE(of, ad5770r_of_id);
  573. static const struct spi_device_id ad5770r_id[] = {
  574. { "ad5770r", 0 },
  575. {},
  576. };
  577. MODULE_DEVICE_TABLE(spi, ad5770r_id);
  578. static struct spi_driver ad5770r_driver = {
  579. .driver = {
  580. .name = KBUILD_MODNAME,
  581. .of_match_table = ad5770r_of_id,
  582. },
  583. .probe = ad5770r_probe,
  584. .id_table = ad5770r_id,
  585. };
  586. module_spi_driver(ad5770r_driver);
  587. MODULE_AUTHOR("Mircea Caprioru <mircea.caprioru@analog.com>");
  588. MODULE_DESCRIPTION("Analog Devices AD5770R IDAC");
  589. MODULE_LICENSE("GPL v2");