ad5761.c 9.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * AD5721, AD5721R, AD5761, AD5761R, Voltage Output Digital to Analog Converter
  4. *
  5. * Copyright 2016 Qtechnology A/S
  6. * 2016 Ricardo Ribalda <ribalda@kernel.org>
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/spi/spi.h>
  11. #include <linux/bitops.h>
  12. #include <linux/iio/iio.h>
  13. #include <linux/iio/sysfs.h>
  14. #include <linux/regulator/consumer.h>
  15. #include <linux/platform_data/ad5761.h>
  16. #define AD5761_ADDR(addr) ((addr & 0xf) << 16)
  17. #define AD5761_ADDR_NOOP 0x0
  18. #define AD5761_ADDR_DAC_WRITE 0x3
  19. #define AD5761_ADDR_CTRL_WRITE_REG 0x4
  20. #define AD5761_ADDR_SW_DATA_RESET 0x7
  21. #define AD5761_ADDR_DAC_READ 0xb
  22. #define AD5761_ADDR_CTRL_READ_REG 0xc
  23. #define AD5761_ADDR_SW_FULL_RESET 0xf
  24. #define AD5761_CTRL_USE_INTVREF BIT(5)
  25. #define AD5761_CTRL_ETS BIT(6)
  26. /**
  27. * struct ad5761_chip_info - chip specific information
  28. * @int_vref: Value of the internal reference voltage in mV - 0 if external
  29. * reference voltage is used
  30. * @channel: channel specification
  31. */
  32. struct ad5761_chip_info {
  33. unsigned long int_vref;
  34. const struct iio_chan_spec channel;
  35. };
  36. struct ad5761_range_params {
  37. int m;
  38. int c;
  39. };
  40. enum ad5761_supported_device_ids {
  41. ID_AD5721,
  42. ID_AD5721R,
  43. ID_AD5761,
  44. ID_AD5761R,
  45. };
  46. /**
  47. * struct ad5761_state - driver instance specific data
  48. * @spi: spi_device
  49. * @vref_reg: reference voltage regulator
  50. * @use_intref: true when the internal voltage reference is used
  51. * @vref: actual voltage reference in mVolts
  52. * @range: output range mode used
  53. * @lock: lock to protect the data buffer during SPI ops
  54. * @data: cache aligned spi buffer
  55. */
  56. struct ad5761_state {
  57. struct spi_device *spi;
  58. struct regulator *vref_reg;
  59. struct mutex lock;
  60. bool use_intref;
  61. int vref;
  62. enum ad5761_voltage_range range;
  63. /*
  64. * DMA (thus cache coherency maintenance) requires the
  65. * transfer buffers to live in their own cache lines.
  66. */
  67. union {
  68. __be32 d32;
  69. u8 d8[4];
  70. } data[3] ____cacheline_aligned;
  71. };
  72. static const struct ad5761_range_params ad5761_range_params[] = {
  73. [AD5761_VOLTAGE_RANGE_M10V_10V] = {
  74. .m = 80,
  75. .c = 40,
  76. },
  77. [AD5761_VOLTAGE_RANGE_0V_10V] = {
  78. .m = 40,
  79. .c = 0,
  80. },
  81. [AD5761_VOLTAGE_RANGE_M5V_5V] = {
  82. .m = 40,
  83. .c = 20,
  84. },
  85. [AD5761_VOLTAGE_RANGE_0V_5V] = {
  86. .m = 20,
  87. .c = 0,
  88. },
  89. [AD5761_VOLTAGE_RANGE_M2V5_7V5] = {
  90. .m = 40,
  91. .c = 10,
  92. },
  93. [AD5761_VOLTAGE_RANGE_M3V_3V] = {
  94. .m = 24,
  95. .c = 12,
  96. },
  97. [AD5761_VOLTAGE_RANGE_0V_16V] = {
  98. .m = 64,
  99. .c = 0,
  100. },
  101. [AD5761_VOLTAGE_RANGE_0V_20V] = {
  102. .m = 80,
  103. .c = 0,
  104. },
  105. };
  106. static int _ad5761_spi_write(struct ad5761_state *st, u8 addr, u16 val)
  107. {
  108. st->data[0].d32 = cpu_to_be32(AD5761_ADDR(addr) | val);
  109. return spi_write(st->spi, &st->data[0].d8[1], 3);
  110. }
  111. static int ad5761_spi_write(struct iio_dev *indio_dev, u8 addr, u16 val)
  112. {
  113. struct ad5761_state *st = iio_priv(indio_dev);
  114. int ret;
  115. mutex_lock(&st->lock);
  116. ret = _ad5761_spi_write(st, addr, val);
  117. mutex_unlock(&st->lock);
  118. return ret;
  119. }
  120. static int _ad5761_spi_read(struct ad5761_state *st, u8 addr, u16 *val)
  121. {
  122. int ret;
  123. struct spi_transfer xfers[] = {
  124. {
  125. .tx_buf = &st->data[0].d8[1],
  126. .bits_per_word = 8,
  127. .len = 3,
  128. .cs_change = true,
  129. }, {
  130. .tx_buf = &st->data[1].d8[1],
  131. .rx_buf = &st->data[2].d8[1],
  132. .bits_per_word = 8,
  133. .len = 3,
  134. },
  135. };
  136. st->data[0].d32 = cpu_to_be32(AD5761_ADDR(addr));
  137. st->data[1].d32 = cpu_to_be32(AD5761_ADDR(AD5761_ADDR_NOOP));
  138. ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
  139. *val = be32_to_cpu(st->data[2].d32);
  140. return ret;
  141. }
  142. static int ad5761_spi_read(struct iio_dev *indio_dev, u8 addr, u16 *val)
  143. {
  144. struct ad5761_state *st = iio_priv(indio_dev);
  145. int ret;
  146. mutex_lock(&st->lock);
  147. ret = _ad5761_spi_read(st, addr, val);
  148. mutex_unlock(&st->lock);
  149. return ret;
  150. }
  151. static int ad5761_spi_set_range(struct ad5761_state *st,
  152. enum ad5761_voltage_range range)
  153. {
  154. u16 aux;
  155. int ret;
  156. aux = (range & 0x7) | AD5761_CTRL_ETS;
  157. if (st->use_intref)
  158. aux |= AD5761_CTRL_USE_INTVREF;
  159. ret = _ad5761_spi_write(st, AD5761_ADDR_SW_FULL_RESET, 0);
  160. if (ret)
  161. return ret;
  162. ret = _ad5761_spi_write(st, AD5761_ADDR_CTRL_WRITE_REG, aux);
  163. if (ret)
  164. return ret;
  165. st->range = range;
  166. return 0;
  167. }
  168. static int ad5761_read_raw(struct iio_dev *indio_dev,
  169. struct iio_chan_spec const *chan,
  170. int *val,
  171. int *val2,
  172. long mask)
  173. {
  174. struct ad5761_state *st;
  175. int ret;
  176. u16 aux;
  177. switch (mask) {
  178. case IIO_CHAN_INFO_RAW:
  179. ret = ad5761_spi_read(indio_dev, AD5761_ADDR_DAC_READ, &aux);
  180. if (ret)
  181. return ret;
  182. *val = aux >> chan->scan_type.shift;
  183. return IIO_VAL_INT;
  184. case IIO_CHAN_INFO_SCALE:
  185. st = iio_priv(indio_dev);
  186. *val = st->vref * ad5761_range_params[st->range].m;
  187. *val /= 10;
  188. *val2 = chan->scan_type.realbits;
  189. return IIO_VAL_FRACTIONAL_LOG2;
  190. case IIO_CHAN_INFO_OFFSET:
  191. st = iio_priv(indio_dev);
  192. *val = -(1 << chan->scan_type.realbits);
  193. *val *= ad5761_range_params[st->range].c;
  194. *val /= ad5761_range_params[st->range].m;
  195. return IIO_VAL_INT;
  196. default:
  197. return -EINVAL;
  198. }
  199. }
  200. static int ad5761_write_raw(struct iio_dev *indio_dev,
  201. struct iio_chan_spec const *chan,
  202. int val,
  203. int val2,
  204. long mask)
  205. {
  206. u16 aux;
  207. if (mask != IIO_CHAN_INFO_RAW)
  208. return -EINVAL;
  209. if (val2 || (val << chan->scan_type.shift) > 0xffff || val < 0)
  210. return -EINVAL;
  211. aux = val << chan->scan_type.shift;
  212. return ad5761_spi_write(indio_dev, AD5761_ADDR_DAC_WRITE, aux);
  213. }
  214. static const struct iio_info ad5761_info = {
  215. .read_raw = &ad5761_read_raw,
  216. .write_raw = &ad5761_write_raw,
  217. };
  218. #define AD5761_CHAN(_bits) { \
  219. .type = IIO_VOLTAGE, \
  220. .output = 1, \
  221. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  222. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
  223. BIT(IIO_CHAN_INFO_OFFSET), \
  224. .scan_type = { \
  225. .sign = 'u', \
  226. .realbits = (_bits), \
  227. .storagebits = 16, \
  228. .shift = 16 - (_bits), \
  229. }, \
  230. }
  231. static const struct ad5761_chip_info ad5761_chip_infos[] = {
  232. [ID_AD5721] = {
  233. .int_vref = 0,
  234. .channel = AD5761_CHAN(12),
  235. },
  236. [ID_AD5721R] = {
  237. .int_vref = 2500,
  238. .channel = AD5761_CHAN(12),
  239. },
  240. [ID_AD5761] = {
  241. .int_vref = 0,
  242. .channel = AD5761_CHAN(16),
  243. },
  244. [ID_AD5761R] = {
  245. .int_vref = 2500,
  246. .channel = AD5761_CHAN(16),
  247. },
  248. };
  249. static int ad5761_get_vref(struct ad5761_state *st,
  250. const struct ad5761_chip_info *chip_info)
  251. {
  252. int ret;
  253. st->vref_reg = devm_regulator_get_optional(&st->spi->dev, "vref");
  254. if (PTR_ERR(st->vref_reg) == -ENODEV) {
  255. /* Use Internal regulator */
  256. if (!chip_info->int_vref) {
  257. dev_err(&st->spi->dev,
  258. "Voltage reference not found\n");
  259. return -EIO;
  260. }
  261. st->use_intref = true;
  262. st->vref = chip_info->int_vref;
  263. return 0;
  264. }
  265. if (IS_ERR(st->vref_reg)) {
  266. dev_err(&st->spi->dev,
  267. "Error getting voltage reference regulator\n");
  268. return PTR_ERR(st->vref_reg);
  269. }
  270. ret = regulator_enable(st->vref_reg);
  271. if (ret) {
  272. dev_err(&st->spi->dev,
  273. "Failed to enable voltage reference\n");
  274. return ret;
  275. }
  276. ret = regulator_get_voltage(st->vref_reg);
  277. if (ret < 0) {
  278. dev_err(&st->spi->dev,
  279. "Failed to get voltage reference value\n");
  280. goto disable_regulator_vref;
  281. }
  282. if (ret < 2000000 || ret > 3000000) {
  283. dev_warn(&st->spi->dev,
  284. "Invalid external voltage ref. value %d uV\n", ret);
  285. ret = -EIO;
  286. goto disable_regulator_vref;
  287. }
  288. st->vref = ret / 1000;
  289. st->use_intref = false;
  290. return 0;
  291. disable_regulator_vref:
  292. regulator_disable(st->vref_reg);
  293. st->vref_reg = NULL;
  294. return ret;
  295. }
  296. static int ad5761_probe(struct spi_device *spi)
  297. {
  298. struct iio_dev *iio_dev;
  299. struct ad5761_state *st;
  300. int ret;
  301. const struct ad5761_chip_info *chip_info =
  302. &ad5761_chip_infos[spi_get_device_id(spi)->driver_data];
  303. enum ad5761_voltage_range voltage_range = AD5761_VOLTAGE_RANGE_0V_5V;
  304. struct ad5761_platform_data *pdata = dev_get_platdata(&spi->dev);
  305. iio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  306. if (!iio_dev)
  307. return -ENOMEM;
  308. st = iio_priv(iio_dev);
  309. st->spi = spi;
  310. spi_set_drvdata(spi, iio_dev);
  311. ret = ad5761_get_vref(st, chip_info);
  312. if (ret)
  313. return ret;
  314. if (pdata)
  315. voltage_range = pdata->voltage_range;
  316. mutex_init(&st->lock);
  317. ret = ad5761_spi_set_range(st, voltage_range);
  318. if (ret)
  319. goto disable_regulator_err;
  320. iio_dev->info = &ad5761_info;
  321. iio_dev->modes = INDIO_DIRECT_MODE;
  322. iio_dev->channels = &chip_info->channel;
  323. iio_dev->num_channels = 1;
  324. iio_dev->name = spi_get_device_id(st->spi)->name;
  325. ret = iio_device_register(iio_dev);
  326. if (ret)
  327. goto disable_regulator_err;
  328. return 0;
  329. disable_regulator_err:
  330. if (!IS_ERR_OR_NULL(st->vref_reg))
  331. regulator_disable(st->vref_reg);
  332. return ret;
  333. }
  334. static int ad5761_remove(struct spi_device *spi)
  335. {
  336. struct iio_dev *iio_dev = spi_get_drvdata(spi);
  337. struct ad5761_state *st = iio_priv(iio_dev);
  338. iio_device_unregister(iio_dev);
  339. if (!IS_ERR_OR_NULL(st->vref_reg))
  340. regulator_disable(st->vref_reg);
  341. return 0;
  342. }
  343. static const struct spi_device_id ad5761_id[] = {
  344. {"ad5721", ID_AD5721},
  345. {"ad5721r", ID_AD5721R},
  346. {"ad5761", ID_AD5761},
  347. {"ad5761r", ID_AD5761R},
  348. {}
  349. };
  350. MODULE_DEVICE_TABLE(spi, ad5761_id);
  351. static struct spi_driver ad5761_driver = {
  352. .driver = {
  353. .name = "ad5761",
  354. },
  355. .probe = ad5761_probe,
  356. .remove = ad5761_remove,
  357. .id_table = ad5761_id,
  358. };
  359. module_spi_driver(ad5761_driver);
  360. MODULE_AUTHOR("Ricardo Ribalda <ribalda@kernel.org>");
  361. MODULE_DESCRIPTION("Analog Devices AD5721, AD5721R, AD5761, AD5761R driver");
  362. MODULE_LICENSE("GPL v2");