twl4030-madc.c 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. *
  4. * TWL4030 MADC module driver-This driver monitors the real time
  5. * conversion of analog signals like battery temperature,
  6. * battery type, battery level etc.
  7. *
  8. * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
  9. * J Keerthy <j-keerthy@ti.com>
  10. *
  11. * Based on twl4030-madc.c
  12. * Copyright (C) 2008 Nokia Corporation
  13. * Mikko Ylinen <mikko.k.ylinen@nokia.com>
  14. *
  15. * Amit Kucheria <amit.kucheria@canonical.com>
  16. */
  17. #include <linux/device.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/kernel.h>
  20. #include <linux/delay.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/slab.h>
  23. #include <linux/mfd/twl.h>
  24. #include <linux/module.h>
  25. #include <linux/stddef.h>
  26. #include <linux/mutex.h>
  27. #include <linux/bitops.h>
  28. #include <linux/jiffies.h>
  29. #include <linux/types.h>
  30. #include <linux/gfp.h>
  31. #include <linux/err.h>
  32. #include <linux/regulator/consumer.h>
  33. #include <linux/iio/iio.h>
  34. #define TWL4030_MADC_MAX_CHANNELS 16
  35. #define TWL4030_MADC_CTRL1 0x00
  36. #define TWL4030_MADC_CTRL2 0x01
  37. #define TWL4030_MADC_RTSELECT_LSB 0x02
  38. #define TWL4030_MADC_SW1SELECT_LSB 0x06
  39. #define TWL4030_MADC_SW2SELECT_LSB 0x0A
  40. #define TWL4030_MADC_RTAVERAGE_LSB 0x04
  41. #define TWL4030_MADC_SW1AVERAGE_LSB 0x08
  42. #define TWL4030_MADC_SW2AVERAGE_LSB 0x0C
  43. #define TWL4030_MADC_CTRL_SW1 0x12
  44. #define TWL4030_MADC_CTRL_SW2 0x13
  45. #define TWL4030_MADC_RTCH0_LSB 0x17
  46. #define TWL4030_MADC_GPCH0_LSB 0x37
  47. #define TWL4030_MADC_MADCON (1 << 0) /* MADC power on */
  48. #define TWL4030_MADC_BUSY (1 << 0) /* MADC busy */
  49. /* MADC conversion completion */
  50. #define TWL4030_MADC_EOC_SW (1 << 1)
  51. /* MADC SWx start conversion */
  52. #define TWL4030_MADC_SW_START (1 << 5)
  53. #define TWL4030_MADC_ADCIN0 (1 << 0)
  54. #define TWL4030_MADC_ADCIN1 (1 << 1)
  55. #define TWL4030_MADC_ADCIN2 (1 << 2)
  56. #define TWL4030_MADC_ADCIN3 (1 << 3)
  57. #define TWL4030_MADC_ADCIN4 (1 << 4)
  58. #define TWL4030_MADC_ADCIN5 (1 << 5)
  59. #define TWL4030_MADC_ADCIN6 (1 << 6)
  60. #define TWL4030_MADC_ADCIN7 (1 << 7)
  61. #define TWL4030_MADC_ADCIN8 (1 << 8)
  62. #define TWL4030_MADC_ADCIN9 (1 << 9)
  63. #define TWL4030_MADC_ADCIN10 (1 << 10)
  64. #define TWL4030_MADC_ADCIN11 (1 << 11)
  65. #define TWL4030_MADC_ADCIN12 (1 << 12)
  66. #define TWL4030_MADC_ADCIN13 (1 << 13)
  67. #define TWL4030_MADC_ADCIN14 (1 << 14)
  68. #define TWL4030_MADC_ADCIN15 (1 << 15)
  69. /* Fixed channels */
  70. #define TWL4030_MADC_BTEMP TWL4030_MADC_ADCIN1
  71. #define TWL4030_MADC_VBUS TWL4030_MADC_ADCIN8
  72. #define TWL4030_MADC_VBKB TWL4030_MADC_ADCIN9
  73. #define TWL4030_MADC_ICHG TWL4030_MADC_ADCIN10
  74. #define TWL4030_MADC_VCHG TWL4030_MADC_ADCIN11
  75. #define TWL4030_MADC_VBAT TWL4030_MADC_ADCIN12
  76. /* Step size and prescaler ratio */
  77. #define TEMP_STEP_SIZE 147
  78. #define TEMP_PSR_R 100
  79. #define CURR_STEP_SIZE 147
  80. #define CURR_PSR_R1 44
  81. #define CURR_PSR_R2 88
  82. #define TWL4030_BCI_BCICTL1 0x23
  83. #define TWL4030_BCI_CGAIN 0x020
  84. #define TWL4030_BCI_MESBAT (1 << 1)
  85. #define TWL4030_BCI_TYPEN (1 << 4)
  86. #define TWL4030_BCI_ITHEN (1 << 3)
  87. #define REG_BCICTL2 0x024
  88. #define TWL4030_BCI_ITHSENS 0x007
  89. /* Register and bits for GPBR1 register */
  90. #define TWL4030_REG_GPBR1 0x0c
  91. #define TWL4030_GPBR1_MADC_HFCLK_EN (1 << 7)
  92. #define TWL4030_USB_SEL_MADC_MCPC (1<<3)
  93. #define TWL4030_USB_CARKIT_ANA_CTRL 0xBB
  94. struct twl4030_madc_conversion_method {
  95. u8 sel;
  96. u8 avg;
  97. u8 rbase;
  98. u8 ctrl;
  99. };
  100. /**
  101. * struct twl4030_madc_request - madc request packet for channel conversion
  102. * @channels: 16 bit bitmap for individual channels
  103. * @do_avg: sample the input channel for 4 consecutive cycles
  104. * @method: RT, SW1, SW2
  105. * @type: Polling or interrupt based method
  106. * @active: Flag if request is active
  107. * @result_pending: Flag from irq handler, that result is ready
  108. * @raw: Return raw value, do not convert it
  109. * @rbuf: Result buffer
  110. */
  111. struct twl4030_madc_request {
  112. unsigned long channels;
  113. bool do_avg;
  114. u16 method;
  115. u16 type;
  116. bool active;
  117. bool result_pending;
  118. bool raw;
  119. int rbuf[TWL4030_MADC_MAX_CHANNELS];
  120. };
  121. enum conversion_methods {
  122. TWL4030_MADC_RT,
  123. TWL4030_MADC_SW1,
  124. TWL4030_MADC_SW2,
  125. TWL4030_MADC_NUM_METHODS
  126. };
  127. enum sample_type {
  128. TWL4030_MADC_WAIT,
  129. TWL4030_MADC_IRQ_ONESHOT,
  130. TWL4030_MADC_IRQ_REARM
  131. };
  132. /**
  133. * struct twl4030_madc_data - a container for madc info
  134. * @dev: Pointer to device structure for madc
  135. * @lock: Mutex protecting this data structure
  136. * @usb3v1: Pointer to bias regulator for madc
  137. * @requests: Array of request struct corresponding to SW1, SW2 and RT
  138. * @use_second_irq: IRQ selection (main or co-processor)
  139. * @imr: Interrupt mask register of MADC
  140. * @isr: Interrupt status register of MADC
  141. */
  142. struct twl4030_madc_data {
  143. struct device *dev;
  144. struct mutex lock;
  145. struct regulator *usb3v1;
  146. struct twl4030_madc_request requests[TWL4030_MADC_NUM_METHODS];
  147. bool use_second_irq;
  148. u8 imr;
  149. u8 isr;
  150. };
  151. static int twl4030_madc_conversion(struct twl4030_madc_request *req);
  152. static int twl4030_madc_read(struct iio_dev *iio_dev,
  153. const struct iio_chan_spec *chan,
  154. int *val, int *val2, long mask)
  155. {
  156. struct twl4030_madc_data *madc = iio_priv(iio_dev);
  157. struct twl4030_madc_request req;
  158. int ret;
  159. req.method = madc->use_second_irq ? TWL4030_MADC_SW2 : TWL4030_MADC_SW1;
  160. req.channels = BIT(chan->channel);
  161. req.active = false;
  162. req.type = TWL4030_MADC_WAIT;
  163. req.raw = !(mask == IIO_CHAN_INFO_PROCESSED);
  164. req.do_avg = (mask == IIO_CHAN_INFO_AVERAGE_RAW);
  165. ret = twl4030_madc_conversion(&req);
  166. if (ret < 0)
  167. return ret;
  168. *val = req.rbuf[chan->channel];
  169. return IIO_VAL_INT;
  170. }
  171. static const struct iio_info twl4030_madc_iio_info = {
  172. .read_raw = &twl4030_madc_read,
  173. };
  174. #define TWL4030_ADC_CHANNEL(_channel, _type, _name) { \
  175. .type = _type, \
  176. .channel = _channel, \
  177. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  178. BIT(IIO_CHAN_INFO_AVERAGE_RAW) | \
  179. BIT(IIO_CHAN_INFO_PROCESSED), \
  180. .datasheet_name = _name, \
  181. .indexed = 1, \
  182. }
  183. static const struct iio_chan_spec twl4030_madc_iio_channels[] = {
  184. TWL4030_ADC_CHANNEL(0, IIO_VOLTAGE, "ADCIN0"),
  185. TWL4030_ADC_CHANNEL(1, IIO_TEMP, "ADCIN1"),
  186. TWL4030_ADC_CHANNEL(2, IIO_VOLTAGE, "ADCIN2"),
  187. TWL4030_ADC_CHANNEL(3, IIO_VOLTAGE, "ADCIN3"),
  188. TWL4030_ADC_CHANNEL(4, IIO_VOLTAGE, "ADCIN4"),
  189. TWL4030_ADC_CHANNEL(5, IIO_VOLTAGE, "ADCIN5"),
  190. TWL4030_ADC_CHANNEL(6, IIO_VOLTAGE, "ADCIN6"),
  191. TWL4030_ADC_CHANNEL(7, IIO_VOLTAGE, "ADCIN7"),
  192. TWL4030_ADC_CHANNEL(8, IIO_VOLTAGE, "ADCIN8"),
  193. TWL4030_ADC_CHANNEL(9, IIO_VOLTAGE, "ADCIN9"),
  194. TWL4030_ADC_CHANNEL(10, IIO_CURRENT, "ADCIN10"),
  195. TWL4030_ADC_CHANNEL(11, IIO_VOLTAGE, "ADCIN11"),
  196. TWL4030_ADC_CHANNEL(12, IIO_VOLTAGE, "ADCIN12"),
  197. TWL4030_ADC_CHANNEL(13, IIO_VOLTAGE, "ADCIN13"),
  198. TWL4030_ADC_CHANNEL(14, IIO_VOLTAGE, "ADCIN14"),
  199. TWL4030_ADC_CHANNEL(15, IIO_VOLTAGE, "ADCIN15"),
  200. };
  201. static struct twl4030_madc_data *twl4030_madc;
  202. struct twl4030_prescale_divider_ratios {
  203. s16 numerator;
  204. s16 denominator;
  205. };
  206. static const struct twl4030_prescale_divider_ratios
  207. twl4030_divider_ratios[16] = {
  208. {1, 1}, /* CHANNEL 0 No Prescaler */
  209. {1, 1}, /* CHANNEL 1 No Prescaler */
  210. {6, 10}, /* CHANNEL 2 */
  211. {6, 10}, /* CHANNEL 3 */
  212. {6, 10}, /* CHANNEL 4 */
  213. {6, 10}, /* CHANNEL 5 */
  214. {6, 10}, /* CHANNEL 6 */
  215. {6, 10}, /* CHANNEL 7 */
  216. {3, 14}, /* CHANNEL 8 */
  217. {1, 3}, /* CHANNEL 9 */
  218. {1, 1}, /* CHANNEL 10 No Prescaler */
  219. {15, 100}, /* CHANNEL 11 */
  220. {1, 4}, /* CHANNEL 12 */
  221. {1, 1}, /* CHANNEL 13 Reserved channels */
  222. {1, 1}, /* CHANNEL 14 Reseved channels */
  223. {5, 11}, /* CHANNEL 15 */
  224. };
  225. /* Conversion table from -3 to 55 degrees Celcius */
  226. static int twl4030_therm_tbl[] = {
  227. 30800, 29500, 28300, 27100,
  228. 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700,
  229. 17900, 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100,
  230. 12600, 12100, 11600, 11200, 10800, 10400, 10000, 9630, 9280,
  231. 8950, 8620, 8310, 8020, 7730, 7460, 7200, 6950, 6710,
  232. 6470, 6250, 6040, 5830, 5640, 5450, 5260, 5090, 4920,
  233. 4760, 4600, 4450, 4310, 4170, 4040, 3910, 3790, 3670,
  234. 3550
  235. };
  236. /*
  237. * Structure containing the registers
  238. * of different conversion methods supported by MADC.
  239. * Hardware or RT real time conversion request initiated by external host
  240. * processor for RT Signal conversions.
  241. * External host processors can also request for non RT conversions
  242. * SW1 and SW2 software conversions also called asynchronous or GPC request.
  243. */
  244. static
  245. const struct twl4030_madc_conversion_method twl4030_conversion_methods[] = {
  246. [TWL4030_MADC_RT] = {
  247. .sel = TWL4030_MADC_RTSELECT_LSB,
  248. .avg = TWL4030_MADC_RTAVERAGE_LSB,
  249. .rbase = TWL4030_MADC_RTCH0_LSB,
  250. },
  251. [TWL4030_MADC_SW1] = {
  252. .sel = TWL4030_MADC_SW1SELECT_LSB,
  253. .avg = TWL4030_MADC_SW1AVERAGE_LSB,
  254. .rbase = TWL4030_MADC_GPCH0_LSB,
  255. .ctrl = TWL4030_MADC_CTRL_SW1,
  256. },
  257. [TWL4030_MADC_SW2] = {
  258. .sel = TWL4030_MADC_SW2SELECT_LSB,
  259. .avg = TWL4030_MADC_SW2AVERAGE_LSB,
  260. .rbase = TWL4030_MADC_GPCH0_LSB,
  261. .ctrl = TWL4030_MADC_CTRL_SW2,
  262. },
  263. };
  264. /**
  265. * twl4030_madc_channel_raw_read() - Function to read a particular channel value
  266. * @madc: pointer to struct twl4030_madc_data
  267. * @reg: lsb of ADC Channel
  268. *
  269. * Return: 0 on success, an error code otherwise.
  270. */
  271. static int twl4030_madc_channel_raw_read(struct twl4030_madc_data *madc, u8 reg)
  272. {
  273. u16 val;
  274. int ret;
  275. /*
  276. * For each ADC channel, we have MSB and LSB register pair. MSB address
  277. * is always LSB address+1. reg parameter is the address of LSB register
  278. */
  279. ret = twl_i2c_read_u16(TWL4030_MODULE_MADC, &val, reg);
  280. if (ret) {
  281. dev_err(madc->dev, "unable to read register 0x%X\n", reg);
  282. return ret;
  283. }
  284. return (int)(val >> 6);
  285. }
  286. /*
  287. * Return battery temperature in degrees Celsius
  288. * Or < 0 on failure.
  289. */
  290. static int twl4030battery_temperature(int raw_volt)
  291. {
  292. u8 val;
  293. int temp, curr, volt, res, ret;
  294. volt = (raw_volt * TEMP_STEP_SIZE) / TEMP_PSR_R;
  295. /* Getting and calculating the supply current in micro amperes */
  296. ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE, &val,
  297. REG_BCICTL2);
  298. if (ret < 0)
  299. return ret;
  300. curr = ((val & TWL4030_BCI_ITHSENS) + 1) * 10;
  301. /* Getting and calculating the thermistor resistance in ohms */
  302. res = volt * 1000 / curr;
  303. /* calculating temperature */
  304. for (temp = 58; temp >= 0; temp--) {
  305. int actual = twl4030_therm_tbl[temp];
  306. if ((actual - res) >= 0)
  307. break;
  308. }
  309. return temp + 1;
  310. }
  311. static int twl4030battery_current(int raw_volt)
  312. {
  313. int ret;
  314. u8 val;
  315. ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE, &val,
  316. TWL4030_BCI_BCICTL1);
  317. if (ret)
  318. return ret;
  319. if (val & TWL4030_BCI_CGAIN) /* slope of 0.44 mV/mA */
  320. return (raw_volt * CURR_STEP_SIZE) / CURR_PSR_R1;
  321. else /* slope of 0.88 mV/mA */
  322. return (raw_volt * CURR_STEP_SIZE) / CURR_PSR_R2;
  323. }
  324. /*
  325. * Function to read channel values
  326. * @madc - pointer to twl4030_madc_data struct
  327. * @reg_base - Base address of the first channel
  328. * @Channels - 16 bit bitmap. If the bit is set, channel's value is read
  329. * @buf - The channel values are stored here. if read fails error
  330. * @raw - Return raw values without conversion
  331. * value is stored
  332. * Returns the number of successfully read channels.
  333. */
  334. static int twl4030_madc_read_channels(struct twl4030_madc_data *madc,
  335. u8 reg_base, unsigned
  336. long channels, int *buf,
  337. bool raw)
  338. {
  339. int count = 0;
  340. int i;
  341. u8 reg;
  342. for_each_set_bit(i, &channels, TWL4030_MADC_MAX_CHANNELS) {
  343. reg = reg_base + (2 * i);
  344. buf[i] = twl4030_madc_channel_raw_read(madc, reg);
  345. if (buf[i] < 0) {
  346. dev_err(madc->dev, "Unable to read register 0x%X\n",
  347. reg);
  348. return buf[i];
  349. }
  350. if (raw) {
  351. count++;
  352. continue;
  353. }
  354. switch (i) {
  355. case 10:
  356. buf[i] = twl4030battery_current(buf[i]);
  357. if (buf[i] < 0) {
  358. dev_err(madc->dev, "err reading current\n");
  359. return buf[i];
  360. } else {
  361. count++;
  362. buf[i] = buf[i] - 750;
  363. }
  364. break;
  365. case 1:
  366. buf[i] = twl4030battery_temperature(buf[i]);
  367. if (buf[i] < 0) {
  368. dev_err(madc->dev, "err reading temperature\n");
  369. return buf[i];
  370. } else {
  371. buf[i] -= 3;
  372. count++;
  373. }
  374. break;
  375. default:
  376. count++;
  377. /* Analog Input (V) = conv_result * step_size / R
  378. * conv_result = decimal value of 10-bit conversion
  379. * result
  380. * step size = 1.5 / (2 ^ 10 -1)
  381. * R = Prescaler ratio for input channels.
  382. * Result given in mV hence multiplied by 1000.
  383. */
  384. buf[i] = (buf[i] * 3 * 1000 *
  385. twl4030_divider_ratios[i].denominator)
  386. / (2 * 1023 *
  387. twl4030_divider_ratios[i].numerator);
  388. }
  389. }
  390. return count;
  391. }
  392. /*
  393. * Disables irq.
  394. * @madc - pointer to twl4030_madc_data struct
  395. * @id - irq number to be disabled
  396. * can take one of TWL4030_MADC_RT, TWL4030_MADC_SW1, TWL4030_MADC_SW2
  397. * corresponding to RT, SW1, SW2 conversion requests.
  398. * Returns error if i2c read/write fails.
  399. */
  400. static int twl4030_madc_disable_irq(struct twl4030_madc_data *madc, u8 id)
  401. {
  402. u8 val;
  403. int ret;
  404. ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &val, madc->imr);
  405. if (ret) {
  406. dev_err(madc->dev, "unable to read imr register 0x%X\n",
  407. madc->imr);
  408. return ret;
  409. }
  410. val |= (1 << id);
  411. ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, val, madc->imr);
  412. if (ret) {
  413. dev_err(madc->dev,
  414. "unable to write imr register 0x%X\n", madc->imr);
  415. return ret;
  416. }
  417. return 0;
  418. }
  419. static irqreturn_t twl4030_madc_threaded_irq_handler(int irq, void *_madc)
  420. {
  421. struct twl4030_madc_data *madc = _madc;
  422. const struct twl4030_madc_conversion_method *method;
  423. u8 isr_val, imr_val;
  424. int i, ret;
  425. struct twl4030_madc_request *r;
  426. mutex_lock(&madc->lock);
  427. ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &isr_val, madc->isr);
  428. if (ret) {
  429. dev_err(madc->dev, "unable to read isr register 0x%X\n",
  430. madc->isr);
  431. goto err_i2c;
  432. }
  433. ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &imr_val, madc->imr);
  434. if (ret) {
  435. dev_err(madc->dev, "unable to read imr register 0x%X\n",
  436. madc->imr);
  437. goto err_i2c;
  438. }
  439. isr_val &= ~imr_val;
  440. for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) {
  441. if (!(isr_val & (1 << i)))
  442. continue;
  443. ret = twl4030_madc_disable_irq(madc, i);
  444. if (ret < 0)
  445. dev_dbg(madc->dev, "Disable interrupt failed %d\n", i);
  446. madc->requests[i].result_pending = true;
  447. }
  448. for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) {
  449. r = &madc->requests[i];
  450. /* No pending results for this method, move to next one */
  451. if (!r->result_pending)
  452. continue;
  453. method = &twl4030_conversion_methods[r->method];
  454. /* Read results */
  455. twl4030_madc_read_channels(madc, method->rbase,
  456. r->channels, r->rbuf, r->raw);
  457. /* Free request */
  458. r->result_pending = false;
  459. r->active = false;
  460. }
  461. mutex_unlock(&madc->lock);
  462. return IRQ_HANDLED;
  463. err_i2c:
  464. /*
  465. * In case of error check whichever request is active
  466. * and service the same.
  467. */
  468. for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) {
  469. r = &madc->requests[i];
  470. if (!r->active)
  471. continue;
  472. method = &twl4030_conversion_methods[r->method];
  473. /* Read results */
  474. twl4030_madc_read_channels(madc, method->rbase,
  475. r->channels, r->rbuf, r->raw);
  476. /* Free request */
  477. r->result_pending = false;
  478. r->active = false;
  479. }
  480. mutex_unlock(&madc->lock);
  481. return IRQ_HANDLED;
  482. }
  483. /*
  484. * Function which enables the madc conversion
  485. * by writing to the control register.
  486. * @madc - pointer to twl4030_madc_data struct
  487. * @conv_method - can be TWL4030_MADC_RT, TWL4030_MADC_SW2, TWL4030_MADC_SW1
  488. * corresponding to RT SW1 or SW2 conversion methods.
  489. * Returns 0 if succeeds else a negative error value
  490. */
  491. static int twl4030_madc_start_conversion(struct twl4030_madc_data *madc,
  492. int conv_method)
  493. {
  494. const struct twl4030_madc_conversion_method *method;
  495. int ret = 0;
  496. if (conv_method != TWL4030_MADC_SW1 && conv_method != TWL4030_MADC_SW2)
  497. return -ENOTSUPP;
  498. method = &twl4030_conversion_methods[conv_method];
  499. ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, TWL4030_MADC_SW_START,
  500. method->ctrl);
  501. if (ret) {
  502. dev_err(madc->dev, "unable to write ctrl register 0x%X\n",
  503. method->ctrl);
  504. return ret;
  505. }
  506. return 0;
  507. }
  508. /*
  509. * Function that waits for conversion to be ready
  510. * @madc - pointer to twl4030_madc_data struct
  511. * @timeout_ms - timeout value in milliseconds
  512. * @status_reg - ctrl register
  513. * returns 0 if succeeds else a negative error value
  514. */
  515. static int twl4030_madc_wait_conversion_ready(struct twl4030_madc_data *madc,
  516. unsigned int timeout_ms,
  517. u8 status_reg)
  518. {
  519. unsigned long timeout;
  520. int ret;
  521. timeout = jiffies + msecs_to_jiffies(timeout_ms);
  522. do {
  523. u8 reg;
  524. ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &reg, status_reg);
  525. if (ret) {
  526. dev_err(madc->dev,
  527. "unable to read status register 0x%X\n",
  528. status_reg);
  529. return ret;
  530. }
  531. if (!(reg & TWL4030_MADC_BUSY) && (reg & TWL4030_MADC_EOC_SW))
  532. return 0;
  533. usleep_range(500, 2000);
  534. } while (!time_after(jiffies, timeout));
  535. dev_err(madc->dev, "conversion timeout!\n");
  536. return -EAGAIN;
  537. }
  538. /*
  539. * An exported function which can be called from other kernel drivers.
  540. * @req twl4030_madc_request structure
  541. * req->rbuf will be filled with read values of channels based on the
  542. * channel index. If a particular channel reading fails there will
  543. * be a negative error value in the corresponding array element.
  544. * returns 0 if succeeds else error value
  545. */
  546. static int twl4030_madc_conversion(struct twl4030_madc_request *req)
  547. {
  548. const struct twl4030_madc_conversion_method *method;
  549. int ret;
  550. if (!req || !twl4030_madc)
  551. return -EINVAL;
  552. mutex_lock(&twl4030_madc->lock);
  553. if (req->method < TWL4030_MADC_RT || req->method > TWL4030_MADC_SW2) {
  554. ret = -EINVAL;
  555. goto out;
  556. }
  557. /* Do we have a conversion request ongoing */
  558. if (twl4030_madc->requests[req->method].active) {
  559. ret = -EBUSY;
  560. goto out;
  561. }
  562. method = &twl4030_conversion_methods[req->method];
  563. /* Select channels to be converted */
  564. ret = twl_i2c_write_u16(TWL4030_MODULE_MADC, req->channels, method->sel);
  565. if (ret) {
  566. dev_err(twl4030_madc->dev,
  567. "unable to write sel register 0x%X\n", method->sel);
  568. goto out;
  569. }
  570. /* Select averaging for all channels if do_avg is set */
  571. if (req->do_avg) {
  572. ret = twl_i2c_write_u16(TWL4030_MODULE_MADC, req->channels,
  573. method->avg);
  574. if (ret) {
  575. dev_err(twl4030_madc->dev,
  576. "unable to write avg register 0x%X\n",
  577. method->avg);
  578. goto out;
  579. }
  580. }
  581. /* With RT method we should not be here anymore */
  582. if (req->method == TWL4030_MADC_RT) {
  583. ret = -EINVAL;
  584. goto out;
  585. }
  586. ret = twl4030_madc_start_conversion(twl4030_madc, req->method);
  587. if (ret < 0)
  588. goto out;
  589. twl4030_madc->requests[req->method].active = true;
  590. /* Wait until conversion is ready (ctrl register returns EOC) */
  591. ret = twl4030_madc_wait_conversion_ready(twl4030_madc, 5, method->ctrl);
  592. if (ret) {
  593. twl4030_madc->requests[req->method].active = false;
  594. goto out;
  595. }
  596. ret = twl4030_madc_read_channels(twl4030_madc, method->rbase,
  597. req->channels, req->rbuf, req->raw);
  598. twl4030_madc->requests[req->method].active = false;
  599. out:
  600. mutex_unlock(&twl4030_madc->lock);
  601. return ret;
  602. }
  603. /**
  604. * twl4030_madc_set_current_generator() - setup bias current
  605. *
  606. * @madc: pointer to twl4030_madc_data struct
  607. * @chan: can be one of the two values:
  608. * 0 - Enables bias current for main battery type reading
  609. * 1 - Enables bias current for main battery temperature sensing
  610. * @on: enable or disable chan.
  611. *
  612. * Function to enable or disable bias current for
  613. * main battery type reading or temperature sensing
  614. */
  615. static int twl4030_madc_set_current_generator(struct twl4030_madc_data *madc,
  616. int chan, int on)
  617. {
  618. int ret;
  619. int regmask;
  620. u8 regval;
  621. ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE,
  622. &regval, TWL4030_BCI_BCICTL1);
  623. if (ret) {
  624. dev_err(madc->dev, "unable to read BCICTL1 reg 0x%X",
  625. TWL4030_BCI_BCICTL1);
  626. return ret;
  627. }
  628. regmask = chan ? TWL4030_BCI_ITHEN : TWL4030_BCI_TYPEN;
  629. if (on)
  630. regval |= regmask;
  631. else
  632. regval &= ~regmask;
  633. ret = twl_i2c_write_u8(TWL_MODULE_MAIN_CHARGE,
  634. regval, TWL4030_BCI_BCICTL1);
  635. if (ret) {
  636. dev_err(madc->dev, "unable to write BCICTL1 reg 0x%X\n",
  637. TWL4030_BCI_BCICTL1);
  638. return ret;
  639. }
  640. return 0;
  641. }
  642. /*
  643. * Function that sets MADC software power on bit to enable MADC
  644. * @madc - pointer to twl4030_madc_data struct
  645. * @on - Enable or disable MADC software power on bit.
  646. * returns error if i2c read/write fails else 0
  647. */
  648. static int twl4030_madc_set_power(struct twl4030_madc_data *madc, int on)
  649. {
  650. u8 regval;
  651. int ret;
  652. ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE,
  653. &regval, TWL4030_MADC_CTRL1);
  654. if (ret) {
  655. dev_err(madc->dev, "unable to read madc ctrl1 reg 0x%X\n",
  656. TWL4030_MADC_CTRL1);
  657. return ret;
  658. }
  659. if (on)
  660. regval |= TWL4030_MADC_MADCON;
  661. else
  662. regval &= ~TWL4030_MADC_MADCON;
  663. ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, regval, TWL4030_MADC_CTRL1);
  664. if (ret) {
  665. dev_err(madc->dev, "unable to write madc ctrl1 reg 0x%X\n",
  666. TWL4030_MADC_CTRL1);
  667. return ret;
  668. }
  669. return 0;
  670. }
  671. /*
  672. * Initialize MADC and request for threaded irq
  673. */
  674. static int twl4030_madc_probe(struct platform_device *pdev)
  675. {
  676. struct twl4030_madc_data *madc;
  677. struct twl4030_madc_platform_data *pdata = dev_get_platdata(&pdev->dev);
  678. struct device_node *np = pdev->dev.of_node;
  679. int irq, ret;
  680. u8 regval;
  681. struct iio_dev *iio_dev = NULL;
  682. if (!pdata && !np) {
  683. dev_err(&pdev->dev, "neither platform data nor Device Tree node available\n");
  684. return -EINVAL;
  685. }
  686. iio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*madc));
  687. if (!iio_dev) {
  688. dev_err(&pdev->dev, "failed allocating iio device\n");
  689. return -ENOMEM;
  690. }
  691. madc = iio_priv(iio_dev);
  692. madc->dev = &pdev->dev;
  693. iio_dev->name = dev_name(&pdev->dev);
  694. iio_dev->info = &twl4030_madc_iio_info;
  695. iio_dev->modes = INDIO_DIRECT_MODE;
  696. iio_dev->channels = twl4030_madc_iio_channels;
  697. iio_dev->num_channels = ARRAY_SIZE(twl4030_madc_iio_channels);
  698. /*
  699. * Phoenix provides 2 interrupt lines. The first one is connected to
  700. * the OMAP. The other one can be connected to the other processor such
  701. * as modem. Hence two separate ISR and IMR registers.
  702. */
  703. if (pdata)
  704. madc->use_second_irq = (pdata->irq_line != 1);
  705. else
  706. madc->use_second_irq = of_property_read_bool(np,
  707. "ti,system-uses-second-madc-irq");
  708. madc->imr = madc->use_second_irq ? TWL4030_MADC_IMR2 :
  709. TWL4030_MADC_IMR1;
  710. madc->isr = madc->use_second_irq ? TWL4030_MADC_ISR2 :
  711. TWL4030_MADC_ISR1;
  712. ret = twl4030_madc_set_power(madc, 1);
  713. if (ret < 0)
  714. return ret;
  715. ret = twl4030_madc_set_current_generator(madc, 0, 1);
  716. if (ret < 0)
  717. goto err_current_generator;
  718. ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE,
  719. &regval, TWL4030_BCI_BCICTL1);
  720. if (ret) {
  721. dev_err(&pdev->dev, "unable to read reg BCI CTL1 0x%X\n",
  722. TWL4030_BCI_BCICTL1);
  723. goto err_i2c;
  724. }
  725. regval |= TWL4030_BCI_MESBAT;
  726. ret = twl_i2c_write_u8(TWL_MODULE_MAIN_CHARGE,
  727. regval, TWL4030_BCI_BCICTL1);
  728. if (ret) {
  729. dev_err(&pdev->dev, "unable to write reg BCI Ctl1 0x%X\n",
  730. TWL4030_BCI_BCICTL1);
  731. goto err_i2c;
  732. }
  733. /* Check that MADC clock is on */
  734. ret = twl_i2c_read_u8(TWL4030_MODULE_INTBR, &regval, TWL4030_REG_GPBR1);
  735. if (ret) {
  736. dev_err(&pdev->dev, "unable to read reg GPBR1 0x%X\n",
  737. TWL4030_REG_GPBR1);
  738. goto err_i2c;
  739. }
  740. /* If MADC clk is not on, turn it on */
  741. if (!(regval & TWL4030_GPBR1_MADC_HFCLK_EN)) {
  742. dev_info(&pdev->dev, "clk disabled, enabling\n");
  743. regval |= TWL4030_GPBR1_MADC_HFCLK_EN;
  744. ret = twl_i2c_write_u8(TWL4030_MODULE_INTBR, regval,
  745. TWL4030_REG_GPBR1);
  746. if (ret) {
  747. dev_err(&pdev->dev, "unable to write reg GPBR1 0x%X\n",
  748. TWL4030_REG_GPBR1);
  749. goto err_i2c;
  750. }
  751. }
  752. platform_set_drvdata(pdev, iio_dev);
  753. mutex_init(&madc->lock);
  754. irq = platform_get_irq(pdev, 0);
  755. ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
  756. twl4030_madc_threaded_irq_handler,
  757. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  758. "twl4030_madc", madc);
  759. if (ret) {
  760. dev_err(&pdev->dev, "could not request irq\n");
  761. goto err_i2c;
  762. }
  763. twl4030_madc = madc;
  764. /* Configure MADC[3:6] */
  765. ret = twl_i2c_read_u8(TWL_MODULE_USB, &regval,
  766. TWL4030_USB_CARKIT_ANA_CTRL);
  767. if (ret) {
  768. dev_err(&pdev->dev, "unable to read reg CARKIT_ANA_CTRL 0x%X\n",
  769. TWL4030_USB_CARKIT_ANA_CTRL);
  770. goto err_i2c;
  771. }
  772. regval |= TWL4030_USB_SEL_MADC_MCPC;
  773. ret = twl_i2c_write_u8(TWL_MODULE_USB, regval,
  774. TWL4030_USB_CARKIT_ANA_CTRL);
  775. if (ret) {
  776. dev_err(&pdev->dev, "unable to write reg CARKIT_ANA_CTRL 0x%X\n",
  777. TWL4030_USB_CARKIT_ANA_CTRL);
  778. goto err_i2c;
  779. }
  780. /* Enable 3v1 bias regulator for MADC[3:6] */
  781. madc->usb3v1 = devm_regulator_get(madc->dev, "vusb3v1");
  782. if (IS_ERR(madc->usb3v1)) {
  783. ret = -ENODEV;
  784. goto err_i2c;
  785. }
  786. ret = regulator_enable(madc->usb3v1);
  787. if (ret) {
  788. dev_err(madc->dev, "could not enable 3v1 bias regulator\n");
  789. goto err_i2c;
  790. }
  791. ret = iio_device_register(iio_dev);
  792. if (ret) {
  793. dev_err(&pdev->dev, "could not register iio device\n");
  794. goto err_usb3v1;
  795. }
  796. return 0;
  797. err_usb3v1:
  798. regulator_disable(madc->usb3v1);
  799. err_i2c:
  800. twl4030_madc_set_current_generator(madc, 0, 0);
  801. err_current_generator:
  802. twl4030_madc_set_power(madc, 0);
  803. return ret;
  804. }
  805. static int twl4030_madc_remove(struct platform_device *pdev)
  806. {
  807. struct iio_dev *iio_dev = platform_get_drvdata(pdev);
  808. struct twl4030_madc_data *madc = iio_priv(iio_dev);
  809. iio_device_unregister(iio_dev);
  810. twl4030_madc_set_current_generator(madc, 0, 0);
  811. twl4030_madc_set_power(madc, 0);
  812. regulator_disable(madc->usb3v1);
  813. return 0;
  814. }
  815. #ifdef CONFIG_OF
  816. static const struct of_device_id twl_madc_of_match[] = {
  817. { .compatible = "ti,twl4030-madc", },
  818. { },
  819. };
  820. MODULE_DEVICE_TABLE(of, twl_madc_of_match);
  821. #endif
  822. static struct platform_driver twl4030_madc_driver = {
  823. .probe = twl4030_madc_probe,
  824. .remove = twl4030_madc_remove,
  825. .driver = {
  826. .name = "twl4030_madc",
  827. .of_match_table = of_match_ptr(twl_madc_of_match),
  828. },
  829. };
  830. module_platform_driver(twl4030_madc_driver);
  831. MODULE_DESCRIPTION("TWL4030 ADC driver");
  832. MODULE_LICENSE("GPL");
  833. MODULE_AUTHOR("J Keerthy");
  834. MODULE_ALIAS("platform:twl4030_madc");