sun4i-gpadc-iio.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* ADC driver for sunxi platforms' (A10, A13 and A31) GPADC
  3. *
  4. * Copyright (c) 2016 Quentin Schulz <quentin.schulz@free-electrons.com>
  5. *
  6. * The Allwinner SoCs all have an ADC that can also act as a touchscreen
  7. * controller and a thermal sensor.
  8. * The thermal sensor works only when the ADC acts as a touchscreen controller
  9. * and is configured to throw an interrupt every fixed periods of time (let say
  10. * every X seconds).
  11. * One would be tempted to disable the IP on the hardware side rather than
  12. * disabling interrupts to save some power but that resets the internal clock of
  13. * the IP, resulting in having to wait X seconds every time we want to read the
  14. * value of the thermal sensor.
  15. * This is also the reason of using autosuspend in pm_runtime. If there was no
  16. * autosuspend, the thermal sensor would need X seconds after every
  17. * pm_runtime_get_sync to get a value from the ADC. The autosuspend allows the
  18. * thermal sensor to be requested again in a certain time span before it gets
  19. * shutdown for not being used.
  20. */
  21. #include <linux/completion.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/io.h>
  24. #include <linux/module.h>
  25. #include <linux/of.h>
  26. #include <linux/of_device.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/pm_runtime.h>
  29. #include <linux/regmap.h>
  30. #include <linux/thermal.h>
  31. #include <linux/delay.h>
  32. #include <linux/iio/iio.h>
  33. #include <linux/iio/driver.h>
  34. #include <linux/iio/machine.h>
  35. #include <linux/mfd/sun4i-gpadc.h>
  36. static unsigned int sun4i_gpadc_chan_select(unsigned int chan)
  37. {
  38. return SUN4I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
  39. }
  40. static unsigned int sun6i_gpadc_chan_select(unsigned int chan)
  41. {
  42. return SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
  43. }
  44. struct gpadc_data {
  45. int temp_offset;
  46. int temp_scale;
  47. unsigned int tp_mode_en;
  48. unsigned int tp_adc_select;
  49. unsigned int (*adc_chan_select)(unsigned int chan);
  50. unsigned int adc_chan_mask;
  51. };
  52. static const struct gpadc_data sun4i_gpadc_data = {
  53. .temp_offset = -1932,
  54. .temp_scale = 133,
  55. .tp_mode_en = SUN4I_GPADC_CTRL1_TP_MODE_EN,
  56. .tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
  57. .adc_chan_select = &sun4i_gpadc_chan_select,
  58. .adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
  59. };
  60. static const struct gpadc_data sun5i_gpadc_data = {
  61. .temp_offset = -1447,
  62. .temp_scale = 100,
  63. .tp_mode_en = SUN4I_GPADC_CTRL1_TP_MODE_EN,
  64. .tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
  65. .adc_chan_select = &sun4i_gpadc_chan_select,
  66. .adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
  67. };
  68. static const struct gpadc_data sun6i_gpadc_data = {
  69. .temp_offset = -1623,
  70. .temp_scale = 167,
  71. .tp_mode_en = SUN6I_GPADC_CTRL1_TP_MODE_EN,
  72. .tp_adc_select = SUN6I_GPADC_CTRL1_TP_ADC_SELECT,
  73. .adc_chan_select = &sun6i_gpadc_chan_select,
  74. .adc_chan_mask = SUN6I_GPADC_CTRL1_ADC_CHAN_MASK,
  75. };
  76. static const struct gpadc_data sun8i_a33_gpadc_data = {
  77. .temp_offset = -1662,
  78. .temp_scale = 162,
  79. .tp_mode_en = SUN8I_GPADC_CTRL1_CHOP_TEMP_EN,
  80. };
  81. struct sun4i_gpadc_iio {
  82. struct iio_dev *indio_dev;
  83. struct completion completion;
  84. int temp_data;
  85. u32 adc_data;
  86. struct regmap *regmap;
  87. unsigned int fifo_data_irq;
  88. atomic_t ignore_fifo_data_irq;
  89. unsigned int temp_data_irq;
  90. atomic_t ignore_temp_data_irq;
  91. const struct gpadc_data *data;
  92. bool no_irq;
  93. /* prevents concurrent reads of temperature and ADC */
  94. struct mutex mutex;
  95. struct thermal_zone_device *tzd;
  96. struct device *sensor_device;
  97. };
  98. #define SUN4I_GPADC_ADC_CHANNEL(_channel, _name) { \
  99. .type = IIO_VOLTAGE, \
  100. .indexed = 1, \
  101. .channel = _channel, \
  102. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  103. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  104. .datasheet_name = _name, \
  105. }
  106. static struct iio_map sun4i_gpadc_hwmon_maps[] = {
  107. {
  108. .adc_channel_label = "temp_adc",
  109. .consumer_dev_name = "iio_hwmon.0",
  110. },
  111. { /* sentinel */ },
  112. };
  113. static const struct iio_chan_spec sun4i_gpadc_channels[] = {
  114. SUN4I_GPADC_ADC_CHANNEL(0, "adc_chan0"),
  115. SUN4I_GPADC_ADC_CHANNEL(1, "adc_chan1"),
  116. SUN4I_GPADC_ADC_CHANNEL(2, "adc_chan2"),
  117. SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
  118. {
  119. .type = IIO_TEMP,
  120. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  121. BIT(IIO_CHAN_INFO_SCALE) |
  122. BIT(IIO_CHAN_INFO_OFFSET),
  123. .datasheet_name = "temp_adc",
  124. },
  125. };
  126. static const struct iio_chan_spec sun4i_gpadc_channels_no_temp[] = {
  127. SUN4I_GPADC_ADC_CHANNEL(0, "adc_chan0"),
  128. SUN4I_GPADC_ADC_CHANNEL(1, "adc_chan1"),
  129. SUN4I_GPADC_ADC_CHANNEL(2, "adc_chan2"),
  130. SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
  131. };
  132. static const struct iio_chan_spec sun8i_a33_gpadc_channels[] = {
  133. {
  134. .type = IIO_TEMP,
  135. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  136. BIT(IIO_CHAN_INFO_SCALE) |
  137. BIT(IIO_CHAN_INFO_OFFSET),
  138. .datasheet_name = "temp_adc",
  139. },
  140. };
  141. static const struct regmap_config sun4i_gpadc_regmap_config = {
  142. .reg_bits = 32,
  143. .val_bits = 32,
  144. .reg_stride = 4,
  145. .fast_io = true,
  146. };
  147. static int sun4i_prepare_for_irq(struct iio_dev *indio_dev, int channel,
  148. unsigned int irq)
  149. {
  150. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  151. int ret;
  152. u32 reg;
  153. pm_runtime_get_sync(indio_dev->dev.parent);
  154. reinit_completion(&info->completion);
  155. ret = regmap_write(info->regmap, SUN4I_GPADC_INT_FIFOC,
  156. SUN4I_GPADC_INT_FIFOC_TP_FIFO_TRIG_LEVEL(1) |
  157. SUN4I_GPADC_INT_FIFOC_TP_FIFO_FLUSH);
  158. if (ret)
  159. return ret;
  160. ret = regmap_read(info->regmap, SUN4I_GPADC_CTRL1, &reg);
  161. if (ret)
  162. return ret;
  163. if (irq == info->fifo_data_irq) {
  164. ret = regmap_write(info->regmap, SUN4I_GPADC_CTRL1,
  165. info->data->tp_mode_en |
  166. info->data->tp_adc_select |
  167. info->data->adc_chan_select(channel));
  168. /*
  169. * When the IP changes channel, it needs a bit of time to get
  170. * correct values.
  171. */
  172. if ((reg & info->data->adc_chan_mask) !=
  173. info->data->adc_chan_select(channel))
  174. mdelay(10);
  175. } else {
  176. /*
  177. * The temperature sensor returns valid data only when the ADC
  178. * operates in touchscreen mode.
  179. */
  180. ret = regmap_write(info->regmap, SUN4I_GPADC_CTRL1,
  181. info->data->tp_mode_en);
  182. }
  183. if (ret)
  184. return ret;
  185. /*
  186. * When the IP changes mode between ADC or touchscreen, it
  187. * needs a bit of time to get correct values.
  188. */
  189. if ((reg & info->data->tp_adc_select) != info->data->tp_adc_select)
  190. mdelay(100);
  191. return 0;
  192. }
  193. static int sun4i_gpadc_read(struct iio_dev *indio_dev, int channel, int *val,
  194. unsigned int irq)
  195. {
  196. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  197. int ret;
  198. mutex_lock(&info->mutex);
  199. ret = sun4i_prepare_for_irq(indio_dev, channel, irq);
  200. if (ret)
  201. goto err;
  202. enable_irq(irq);
  203. /*
  204. * The temperature sensor throws an interruption periodically (currently
  205. * set at periods of ~0.6s in sun4i_gpadc_runtime_resume). A 1s delay
  206. * makes sure an interruption occurs in normal conditions. If it doesn't
  207. * occur, then there is a timeout.
  208. */
  209. if (!wait_for_completion_timeout(&info->completion,
  210. msecs_to_jiffies(1000))) {
  211. ret = -ETIMEDOUT;
  212. goto err;
  213. }
  214. if (irq == info->fifo_data_irq)
  215. *val = info->adc_data;
  216. else
  217. *val = info->temp_data;
  218. ret = 0;
  219. pm_runtime_mark_last_busy(indio_dev->dev.parent);
  220. err:
  221. pm_runtime_put_autosuspend(indio_dev->dev.parent);
  222. disable_irq(irq);
  223. mutex_unlock(&info->mutex);
  224. return ret;
  225. }
  226. static int sun4i_gpadc_adc_read(struct iio_dev *indio_dev, int channel,
  227. int *val)
  228. {
  229. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  230. return sun4i_gpadc_read(indio_dev, channel, val, info->fifo_data_irq);
  231. }
  232. static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val)
  233. {
  234. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  235. if (info->no_irq) {
  236. pm_runtime_get_sync(indio_dev->dev.parent);
  237. regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, val);
  238. pm_runtime_mark_last_busy(indio_dev->dev.parent);
  239. pm_runtime_put_autosuspend(indio_dev->dev.parent);
  240. return 0;
  241. }
  242. return sun4i_gpadc_read(indio_dev, 0, val, info->temp_data_irq);
  243. }
  244. static int sun4i_gpadc_temp_offset(struct iio_dev *indio_dev, int *val)
  245. {
  246. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  247. *val = info->data->temp_offset;
  248. return 0;
  249. }
  250. static int sun4i_gpadc_temp_scale(struct iio_dev *indio_dev, int *val)
  251. {
  252. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  253. *val = info->data->temp_scale;
  254. return 0;
  255. }
  256. static int sun4i_gpadc_read_raw(struct iio_dev *indio_dev,
  257. struct iio_chan_spec const *chan, int *val,
  258. int *val2, long mask)
  259. {
  260. int ret;
  261. switch (mask) {
  262. case IIO_CHAN_INFO_OFFSET:
  263. ret = sun4i_gpadc_temp_offset(indio_dev, val);
  264. if (ret)
  265. return ret;
  266. return IIO_VAL_INT;
  267. case IIO_CHAN_INFO_RAW:
  268. if (chan->type == IIO_VOLTAGE)
  269. ret = sun4i_gpadc_adc_read(indio_dev, chan->channel,
  270. val);
  271. else
  272. ret = sun4i_gpadc_temp_read(indio_dev, val);
  273. if (ret)
  274. return ret;
  275. return IIO_VAL_INT;
  276. case IIO_CHAN_INFO_SCALE:
  277. if (chan->type == IIO_VOLTAGE) {
  278. /* 3000mV / 4096 * raw */
  279. *val = 0;
  280. *val2 = 732421875;
  281. return IIO_VAL_INT_PLUS_NANO;
  282. }
  283. ret = sun4i_gpadc_temp_scale(indio_dev, val);
  284. if (ret)
  285. return ret;
  286. return IIO_VAL_INT;
  287. default:
  288. return -EINVAL;
  289. }
  290. return -EINVAL;
  291. }
  292. static const struct iio_info sun4i_gpadc_iio_info = {
  293. .read_raw = sun4i_gpadc_read_raw,
  294. };
  295. static irqreturn_t sun4i_gpadc_temp_data_irq_handler(int irq, void *dev_id)
  296. {
  297. struct sun4i_gpadc_iio *info = dev_id;
  298. if (atomic_read(&info->ignore_temp_data_irq))
  299. goto out;
  300. if (!regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, &info->temp_data))
  301. complete(&info->completion);
  302. out:
  303. return IRQ_HANDLED;
  304. }
  305. static irqreturn_t sun4i_gpadc_fifo_data_irq_handler(int irq, void *dev_id)
  306. {
  307. struct sun4i_gpadc_iio *info = dev_id;
  308. if (atomic_read(&info->ignore_fifo_data_irq))
  309. goto out;
  310. if (!regmap_read(info->regmap, SUN4I_GPADC_DATA, &info->adc_data))
  311. complete(&info->completion);
  312. out:
  313. return IRQ_HANDLED;
  314. }
  315. static int sun4i_gpadc_runtime_suspend(struct device *dev)
  316. {
  317. struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
  318. /* Disable the ADC on IP */
  319. regmap_write(info->regmap, SUN4I_GPADC_CTRL1, 0);
  320. /* Disable temperature sensor on IP */
  321. regmap_write(info->regmap, SUN4I_GPADC_TPR, 0);
  322. return 0;
  323. }
  324. static int sun4i_gpadc_runtime_resume(struct device *dev)
  325. {
  326. struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
  327. /* clkin = 6MHz */
  328. regmap_write(info->regmap, SUN4I_GPADC_CTRL0,
  329. SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(2) |
  330. SUN4I_GPADC_CTRL0_FS_DIV(7) |
  331. SUN4I_GPADC_CTRL0_T_ACQ(63));
  332. regmap_write(info->regmap, SUN4I_GPADC_CTRL1, info->data->tp_mode_en);
  333. regmap_write(info->regmap, SUN4I_GPADC_CTRL3,
  334. SUN4I_GPADC_CTRL3_FILTER_EN |
  335. SUN4I_GPADC_CTRL3_FILTER_TYPE(1));
  336. /* period = SUN4I_GPADC_TPR_TEMP_PERIOD * 256 * 16 / clkin; ~0.6s */
  337. regmap_write(info->regmap, SUN4I_GPADC_TPR,
  338. SUN4I_GPADC_TPR_TEMP_ENABLE |
  339. SUN4I_GPADC_TPR_TEMP_PERIOD(800));
  340. return 0;
  341. }
  342. static int sun4i_gpadc_get_temp(void *data, int *temp)
  343. {
  344. struct sun4i_gpadc_iio *info = data;
  345. int val, scale, offset;
  346. if (sun4i_gpadc_temp_read(info->indio_dev, &val))
  347. return -ETIMEDOUT;
  348. sun4i_gpadc_temp_scale(info->indio_dev, &scale);
  349. sun4i_gpadc_temp_offset(info->indio_dev, &offset);
  350. *temp = (val + offset) * scale;
  351. return 0;
  352. }
  353. static const struct thermal_zone_of_device_ops sun4i_ts_tz_ops = {
  354. .get_temp = &sun4i_gpadc_get_temp,
  355. };
  356. static const struct dev_pm_ops sun4i_gpadc_pm_ops = {
  357. .runtime_suspend = &sun4i_gpadc_runtime_suspend,
  358. .runtime_resume = &sun4i_gpadc_runtime_resume,
  359. };
  360. static int sun4i_irq_init(struct platform_device *pdev, const char *name,
  361. irq_handler_t handler, const char *devname,
  362. unsigned int *irq, atomic_t *atomic)
  363. {
  364. int ret;
  365. struct sun4i_gpadc_dev *mfd_dev = dev_get_drvdata(pdev->dev.parent);
  366. struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(&pdev->dev));
  367. /*
  368. * Once the interrupt is activated, the IP continuously performs
  369. * conversions thus throws interrupts. The interrupt is activated right
  370. * after being requested but we want to control when these interrupts
  371. * occur thus we disable it right after being requested. However, an
  372. * interrupt might occur between these two instructions and we have to
  373. * make sure that does not happen, by using atomic flags. We set the
  374. * flag before requesting the interrupt and unset it right after
  375. * disabling the interrupt. When an interrupt occurs between these two
  376. * instructions, reading the atomic flag will tell us to ignore the
  377. * interrupt.
  378. */
  379. atomic_set(atomic, 1);
  380. ret = platform_get_irq_byname(pdev, name);
  381. if (ret < 0)
  382. return ret;
  383. ret = regmap_irq_get_virq(mfd_dev->regmap_irqc, ret);
  384. if (ret < 0) {
  385. dev_err(&pdev->dev, "failed to get virq for irq %s\n", name);
  386. return ret;
  387. }
  388. *irq = ret;
  389. ret = devm_request_any_context_irq(&pdev->dev, *irq, handler, 0,
  390. devname, info);
  391. if (ret < 0) {
  392. dev_err(&pdev->dev, "could not request %s interrupt: %d\n",
  393. name, ret);
  394. return ret;
  395. }
  396. disable_irq(*irq);
  397. atomic_set(atomic, 0);
  398. return 0;
  399. }
  400. static const struct of_device_id sun4i_gpadc_of_id[] = {
  401. {
  402. .compatible = "allwinner,sun8i-a33-ths",
  403. .data = &sun8i_a33_gpadc_data,
  404. },
  405. { /* sentinel */ }
  406. };
  407. static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
  408. struct iio_dev *indio_dev)
  409. {
  410. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  411. void __iomem *base;
  412. int ret;
  413. info->data = of_device_get_match_data(&pdev->dev);
  414. if (!info->data)
  415. return -ENODEV;
  416. info->no_irq = true;
  417. indio_dev->num_channels = ARRAY_SIZE(sun8i_a33_gpadc_channels);
  418. indio_dev->channels = sun8i_a33_gpadc_channels;
  419. base = devm_platform_ioremap_resource(pdev, 0);
  420. if (IS_ERR(base))
  421. return PTR_ERR(base);
  422. info->regmap = devm_regmap_init_mmio(&pdev->dev, base,
  423. &sun4i_gpadc_regmap_config);
  424. if (IS_ERR(info->regmap)) {
  425. ret = PTR_ERR(info->regmap);
  426. dev_err(&pdev->dev, "failed to init regmap: %d\n", ret);
  427. return ret;
  428. }
  429. if (IS_ENABLED(CONFIG_THERMAL_OF))
  430. info->sensor_device = &pdev->dev;
  431. return 0;
  432. }
  433. static int sun4i_gpadc_probe_mfd(struct platform_device *pdev,
  434. struct iio_dev *indio_dev)
  435. {
  436. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  437. struct sun4i_gpadc_dev *sun4i_gpadc_dev =
  438. dev_get_drvdata(pdev->dev.parent);
  439. int ret;
  440. info->no_irq = false;
  441. info->regmap = sun4i_gpadc_dev->regmap;
  442. indio_dev->num_channels = ARRAY_SIZE(sun4i_gpadc_channels);
  443. indio_dev->channels = sun4i_gpadc_channels;
  444. info->data = (struct gpadc_data *)platform_get_device_id(pdev)->driver_data;
  445. /*
  446. * Since the controller needs to be in touchscreen mode for its thermal
  447. * sensor to operate properly, and that switching between the two modes
  448. * needs a delay, always registering in the thermal framework will
  449. * significantly slow down the conversion rate of the ADCs.
  450. *
  451. * Therefore, instead of depending on THERMAL_OF in Kconfig, we only
  452. * register the sensor if that option is enabled, eventually leaving
  453. * that choice to the user.
  454. */
  455. if (IS_ENABLED(CONFIG_THERMAL_OF)) {
  456. /*
  457. * This driver is a child of an MFD which has a node in the DT
  458. * but not its children, because of DT backward compatibility
  459. * for A10, A13 and A31 SoCs. Therefore, the resulting devices
  460. * of this driver do not have an of_node variable.
  461. * However, its parent (the MFD driver) has an of_node variable
  462. * and since devm_thermal_zone_of_sensor_register uses its first
  463. * argument to match the phandle defined in the node of the
  464. * thermal driver with the of_node of the device passed as first
  465. * argument and the third argument to call ops from
  466. * thermal_zone_of_device_ops, the solution is to use the parent
  467. * device as first argument to match the phandle with its
  468. * of_node, and the device from this driver as third argument to
  469. * return the temperature.
  470. */
  471. info->sensor_device = pdev->dev.parent;
  472. } else {
  473. indio_dev->num_channels =
  474. ARRAY_SIZE(sun4i_gpadc_channels_no_temp);
  475. indio_dev->channels = sun4i_gpadc_channels_no_temp;
  476. }
  477. if (IS_ENABLED(CONFIG_THERMAL_OF)) {
  478. ret = sun4i_irq_init(pdev, "TEMP_DATA_PENDING",
  479. sun4i_gpadc_temp_data_irq_handler,
  480. "temp_data", &info->temp_data_irq,
  481. &info->ignore_temp_data_irq);
  482. if (ret < 0)
  483. return ret;
  484. }
  485. ret = sun4i_irq_init(pdev, "FIFO_DATA_PENDING",
  486. sun4i_gpadc_fifo_data_irq_handler, "fifo_data",
  487. &info->fifo_data_irq, &info->ignore_fifo_data_irq);
  488. if (ret < 0)
  489. return ret;
  490. if (IS_ENABLED(CONFIG_THERMAL_OF)) {
  491. ret = iio_map_array_register(indio_dev, sun4i_gpadc_hwmon_maps);
  492. if (ret < 0) {
  493. dev_err(&pdev->dev,
  494. "failed to register iio map array\n");
  495. return ret;
  496. }
  497. }
  498. return 0;
  499. }
  500. static int sun4i_gpadc_probe(struct platform_device *pdev)
  501. {
  502. struct sun4i_gpadc_iio *info;
  503. struct iio_dev *indio_dev;
  504. int ret;
  505. indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
  506. if (!indio_dev)
  507. return -ENOMEM;
  508. info = iio_priv(indio_dev);
  509. platform_set_drvdata(pdev, indio_dev);
  510. mutex_init(&info->mutex);
  511. info->indio_dev = indio_dev;
  512. init_completion(&info->completion);
  513. indio_dev->name = dev_name(&pdev->dev);
  514. indio_dev->info = &sun4i_gpadc_iio_info;
  515. indio_dev->modes = INDIO_DIRECT_MODE;
  516. if (pdev->dev.of_node)
  517. ret = sun4i_gpadc_probe_dt(pdev, indio_dev);
  518. else
  519. ret = sun4i_gpadc_probe_mfd(pdev, indio_dev);
  520. if (ret)
  521. return ret;
  522. pm_runtime_set_autosuspend_delay(&pdev->dev,
  523. SUN4I_GPADC_AUTOSUSPEND_DELAY);
  524. pm_runtime_use_autosuspend(&pdev->dev);
  525. pm_runtime_set_suspended(&pdev->dev);
  526. pm_runtime_enable(&pdev->dev);
  527. if (IS_ENABLED(CONFIG_THERMAL_OF)) {
  528. info->tzd = thermal_zone_of_sensor_register(info->sensor_device,
  529. 0, info,
  530. &sun4i_ts_tz_ops);
  531. /*
  532. * Do not fail driver probing when failing to register in
  533. * thermal because no thermal DT node is found.
  534. */
  535. if (IS_ERR(info->tzd) && PTR_ERR(info->tzd) != -ENODEV) {
  536. dev_err(&pdev->dev,
  537. "could not register thermal sensor: %ld\n",
  538. PTR_ERR(info->tzd));
  539. return PTR_ERR(info->tzd);
  540. }
  541. }
  542. ret = devm_iio_device_register(&pdev->dev, indio_dev);
  543. if (ret < 0) {
  544. dev_err(&pdev->dev, "could not register the device\n");
  545. goto err_map;
  546. }
  547. return 0;
  548. err_map:
  549. if (!info->no_irq && IS_ENABLED(CONFIG_THERMAL_OF))
  550. iio_map_array_unregister(indio_dev);
  551. pm_runtime_put(&pdev->dev);
  552. pm_runtime_disable(&pdev->dev);
  553. return ret;
  554. }
  555. static int sun4i_gpadc_remove(struct platform_device *pdev)
  556. {
  557. struct iio_dev *indio_dev = platform_get_drvdata(pdev);
  558. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  559. pm_runtime_put(&pdev->dev);
  560. pm_runtime_disable(&pdev->dev);
  561. if (!IS_ENABLED(CONFIG_THERMAL_OF))
  562. return 0;
  563. thermal_zone_of_sensor_unregister(info->sensor_device, info->tzd);
  564. if (!info->no_irq)
  565. iio_map_array_unregister(indio_dev);
  566. return 0;
  567. }
  568. static const struct platform_device_id sun4i_gpadc_id[] = {
  569. { "sun4i-a10-gpadc-iio", (kernel_ulong_t)&sun4i_gpadc_data },
  570. { "sun5i-a13-gpadc-iio", (kernel_ulong_t)&sun5i_gpadc_data },
  571. { "sun6i-a31-gpadc-iio", (kernel_ulong_t)&sun6i_gpadc_data },
  572. { /* sentinel */ },
  573. };
  574. MODULE_DEVICE_TABLE(platform, sun4i_gpadc_id);
  575. static struct platform_driver sun4i_gpadc_driver = {
  576. .driver = {
  577. .name = "sun4i-gpadc-iio",
  578. .of_match_table = sun4i_gpadc_of_id,
  579. .pm = &sun4i_gpadc_pm_ops,
  580. },
  581. .id_table = sun4i_gpadc_id,
  582. .probe = sun4i_gpadc_probe,
  583. .remove = sun4i_gpadc_remove,
  584. };
  585. MODULE_DEVICE_TABLE(of, sun4i_gpadc_of_id);
  586. module_platform_driver(sun4i_gpadc_driver);
  587. MODULE_DESCRIPTION("ADC driver for sunxi platforms");
  588. MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
  589. MODULE_LICENSE("GPL v2");