stmpe-adc.c 8.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * STMicroelectronics STMPE811 IIO ADC Driver
  4. *
  5. * 4 channel, 10/12-bit ADC
  6. *
  7. * Copyright (C) 2013-2018 Toradex AG <stefan.agner@toradex.com>
  8. */
  9. #include <linux/completion.h>
  10. #include <linux/err.h>
  11. #include <linux/iio/iio.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/kernel.h>
  14. #include <linux/mfd/stmpe.h>
  15. #include <linux/module.h>
  16. #include <linux/of_platform.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/device.h>
  19. #define STMPE_REG_INT_STA 0x0B
  20. #define STMPE_REG_ADC_INT_EN 0x0E
  21. #define STMPE_REG_ADC_INT_STA 0x0F
  22. #define STMPE_REG_ADC_CTRL1 0x20
  23. #define STMPE_REG_ADC_CTRL2 0x21
  24. #define STMPE_REG_ADC_CAPT 0x22
  25. #define STMPE_REG_ADC_DATA_CH(channel) (0x30 + 2 * (channel))
  26. #define STMPE_REG_TEMP_CTRL 0x60
  27. #define STMPE_TEMP_CTRL_ENABLE BIT(0)
  28. #define STMPE_TEMP_CTRL_ACQ BIT(1)
  29. #define STMPE_TEMP_CTRL_THRES_EN BIT(3)
  30. #define STMPE_START_ONE_TEMP_CONV (STMPE_TEMP_CTRL_ENABLE | \
  31. STMPE_TEMP_CTRL_ACQ | \
  32. STMPE_TEMP_CTRL_THRES_EN)
  33. #define STMPE_REG_TEMP_DATA 0x61
  34. #define STMPE_REG_TEMP_TH 0x63
  35. #define STMPE_ADC_LAST_NR 7
  36. #define STMPE_TEMP_CHANNEL (STMPE_ADC_LAST_NR + 1)
  37. #define STMPE_ADC_CH(channel) ((1 << (channel)) & 0xff)
  38. #define STMPE_ADC_TIMEOUT msecs_to_jiffies(1000)
  39. struct stmpe_adc {
  40. struct stmpe *stmpe;
  41. struct clk *clk;
  42. struct device *dev;
  43. struct mutex lock;
  44. /* We are allocating plus one for the temperature channel */
  45. struct iio_chan_spec stmpe_adc_iio_channels[STMPE_ADC_LAST_NR + 2];
  46. struct completion completion;
  47. u8 channel;
  48. u32 value;
  49. };
  50. static int stmpe_read_voltage(struct stmpe_adc *info,
  51. struct iio_chan_spec const *chan, int *val)
  52. {
  53. long ret;
  54. mutex_lock(&info->lock);
  55. reinit_completion(&info->completion);
  56. info->channel = (u8)chan->channel;
  57. if (info->channel > STMPE_ADC_LAST_NR) {
  58. mutex_unlock(&info->lock);
  59. return -EINVAL;
  60. }
  61. stmpe_reg_write(info->stmpe, STMPE_REG_ADC_CAPT,
  62. STMPE_ADC_CH(info->channel));
  63. ret = wait_for_completion_timeout(&info->completion, STMPE_ADC_TIMEOUT);
  64. if (ret <= 0) {
  65. stmpe_reg_write(info->stmpe, STMPE_REG_ADC_INT_STA,
  66. STMPE_ADC_CH(info->channel));
  67. mutex_unlock(&info->lock);
  68. return -ETIMEDOUT;
  69. }
  70. *val = info->value;
  71. mutex_unlock(&info->lock);
  72. return 0;
  73. }
  74. static int stmpe_read_temp(struct stmpe_adc *info,
  75. struct iio_chan_spec const *chan, int *val)
  76. {
  77. long ret;
  78. mutex_lock(&info->lock);
  79. reinit_completion(&info->completion);
  80. info->channel = (u8)chan->channel;
  81. if (info->channel != STMPE_TEMP_CHANNEL) {
  82. mutex_unlock(&info->lock);
  83. return -EINVAL;
  84. }
  85. stmpe_reg_write(info->stmpe, STMPE_REG_TEMP_CTRL,
  86. STMPE_START_ONE_TEMP_CONV);
  87. ret = wait_for_completion_timeout(&info->completion, STMPE_ADC_TIMEOUT);
  88. if (ret <= 0) {
  89. mutex_unlock(&info->lock);
  90. return -ETIMEDOUT;
  91. }
  92. /*
  93. * absolute temp = +V3.3 * value /7.51 [K]
  94. * scale to [milli °C]
  95. */
  96. *val = ((449960l * info->value) / 1024l) - 273150;
  97. mutex_unlock(&info->lock);
  98. return 0;
  99. }
  100. static int stmpe_read_raw(struct iio_dev *indio_dev,
  101. struct iio_chan_spec const *chan,
  102. int *val,
  103. int *val2,
  104. long mask)
  105. {
  106. struct stmpe_adc *info = iio_priv(indio_dev);
  107. long ret;
  108. switch (mask) {
  109. case IIO_CHAN_INFO_RAW:
  110. case IIO_CHAN_INFO_PROCESSED:
  111. switch (chan->type) {
  112. case IIO_VOLTAGE:
  113. ret = stmpe_read_voltage(info, chan, val);
  114. break;
  115. case IIO_TEMP:
  116. ret = stmpe_read_temp(info, chan, val);
  117. break;
  118. default:
  119. return -EINVAL;
  120. }
  121. if (ret < 0)
  122. return ret;
  123. return IIO_VAL_INT;
  124. case IIO_CHAN_INFO_SCALE:
  125. *val = 3300;
  126. *val2 = info->stmpe->mod_12b ? 12 : 10;
  127. return IIO_VAL_FRACTIONAL_LOG2;
  128. default:
  129. break;
  130. }
  131. return -EINVAL;
  132. }
  133. static irqreturn_t stmpe_adc_isr(int irq, void *dev_id)
  134. {
  135. struct stmpe_adc *info = (struct stmpe_adc *)dev_id;
  136. __be16 data;
  137. if (info->channel <= STMPE_ADC_LAST_NR) {
  138. int int_sta;
  139. int_sta = stmpe_reg_read(info->stmpe, STMPE_REG_ADC_INT_STA);
  140. /* Is the interrupt relevant */
  141. if (!(int_sta & STMPE_ADC_CH(info->channel)))
  142. return IRQ_NONE;
  143. /* Read value */
  144. stmpe_block_read(info->stmpe,
  145. STMPE_REG_ADC_DATA_CH(info->channel), 2, (u8 *) &data);
  146. stmpe_reg_write(info->stmpe, STMPE_REG_ADC_INT_STA, int_sta);
  147. } else if (info->channel == STMPE_TEMP_CHANNEL) {
  148. /* Read value */
  149. stmpe_block_read(info->stmpe, STMPE_REG_TEMP_DATA, 2,
  150. (u8 *) &data);
  151. } else {
  152. return IRQ_NONE;
  153. }
  154. info->value = (u32) be16_to_cpu(data);
  155. complete(&info->completion);
  156. return IRQ_HANDLED;
  157. }
  158. static const struct iio_info stmpe_adc_iio_info = {
  159. .read_raw = &stmpe_read_raw,
  160. };
  161. static void stmpe_adc_voltage_chan(struct iio_chan_spec *ics, int chan)
  162. {
  163. ics->type = IIO_VOLTAGE;
  164. ics->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
  165. ics->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
  166. ics->indexed = 1;
  167. ics->channel = chan;
  168. }
  169. static void stmpe_adc_temp_chan(struct iio_chan_spec *ics, int chan)
  170. {
  171. ics->type = IIO_TEMP;
  172. ics->info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED);
  173. ics->indexed = 1;
  174. ics->channel = chan;
  175. }
  176. static int stmpe_adc_init_hw(struct stmpe_adc *adc)
  177. {
  178. int ret;
  179. struct stmpe *stmpe = adc->stmpe;
  180. ret = stmpe_enable(stmpe, STMPE_BLOCK_ADC);
  181. if (ret) {
  182. dev_err(stmpe->dev, "Could not enable clock for ADC\n");
  183. return ret;
  184. }
  185. ret = stmpe811_adc_common_init(stmpe);
  186. if (ret) {
  187. stmpe_disable(stmpe, STMPE_BLOCK_ADC);
  188. return ret;
  189. }
  190. /* use temp irq for each conversion completion */
  191. stmpe_reg_write(stmpe, STMPE_REG_TEMP_TH, 0);
  192. stmpe_reg_write(stmpe, STMPE_REG_TEMP_TH + 1, 0);
  193. return 0;
  194. }
  195. static int stmpe_adc_probe(struct platform_device *pdev)
  196. {
  197. struct iio_dev *indio_dev;
  198. struct stmpe_adc *info;
  199. struct device_node *np;
  200. u32 norequest_mask = 0;
  201. int irq_temp, irq_adc;
  202. int num_chan = 0;
  203. int i = 0;
  204. int ret;
  205. irq_adc = platform_get_irq_byname(pdev, "STMPE_ADC");
  206. if (irq_adc < 0)
  207. return irq_adc;
  208. indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(struct stmpe_adc));
  209. if (!indio_dev) {
  210. dev_err(&pdev->dev, "failed allocating iio device\n");
  211. return -ENOMEM;
  212. }
  213. info = iio_priv(indio_dev);
  214. mutex_init(&info->lock);
  215. init_completion(&info->completion);
  216. ret = devm_request_threaded_irq(&pdev->dev, irq_adc, NULL,
  217. stmpe_adc_isr, IRQF_ONESHOT,
  218. "stmpe-adc", info);
  219. if (ret < 0) {
  220. dev_err(&pdev->dev, "failed requesting irq, irq = %d\n",
  221. irq_adc);
  222. return ret;
  223. }
  224. irq_temp = platform_get_irq_byname(pdev, "STMPE_TEMP_SENS");
  225. if (irq_temp >= 0) {
  226. ret = devm_request_threaded_irq(&pdev->dev, irq_temp, NULL,
  227. stmpe_adc_isr, IRQF_ONESHOT,
  228. "stmpe-adc", info);
  229. if (ret < 0)
  230. dev_warn(&pdev->dev, "failed requesting irq for"
  231. " temp sensor, irq = %d\n", irq_temp);
  232. }
  233. platform_set_drvdata(pdev, indio_dev);
  234. indio_dev->name = dev_name(&pdev->dev);
  235. indio_dev->info = &stmpe_adc_iio_info;
  236. indio_dev->modes = INDIO_DIRECT_MODE;
  237. info->stmpe = dev_get_drvdata(pdev->dev.parent);
  238. np = pdev->dev.of_node;
  239. if (!np)
  240. dev_err(&pdev->dev, "no device tree node found\n");
  241. of_property_read_u32(np, "st,norequest-mask", &norequest_mask);
  242. for_each_clear_bit(i, (unsigned long *) &norequest_mask,
  243. (STMPE_ADC_LAST_NR + 1)) {
  244. stmpe_adc_voltage_chan(&info->stmpe_adc_iio_channels[num_chan], i);
  245. num_chan++;
  246. }
  247. stmpe_adc_temp_chan(&info->stmpe_adc_iio_channels[num_chan], i);
  248. num_chan++;
  249. indio_dev->channels = info->stmpe_adc_iio_channels;
  250. indio_dev->num_channels = num_chan;
  251. ret = stmpe_adc_init_hw(info);
  252. if (ret)
  253. return ret;
  254. stmpe_reg_write(info->stmpe, STMPE_REG_ADC_INT_EN,
  255. ~(norequest_mask & 0xFF));
  256. stmpe_reg_write(info->stmpe, STMPE_REG_ADC_INT_STA,
  257. ~(norequest_mask & 0xFF));
  258. return devm_iio_device_register(&pdev->dev, indio_dev);
  259. }
  260. static int __maybe_unused stmpe_adc_resume(struct device *dev)
  261. {
  262. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  263. struct stmpe_adc *info = iio_priv(indio_dev);
  264. stmpe_adc_init_hw(info);
  265. return 0;
  266. }
  267. static SIMPLE_DEV_PM_OPS(stmpe_adc_pm_ops, NULL, stmpe_adc_resume);
  268. static struct platform_driver stmpe_adc_driver = {
  269. .probe = stmpe_adc_probe,
  270. .driver = {
  271. .name = "stmpe-adc",
  272. .pm = &stmpe_adc_pm_ops,
  273. },
  274. };
  275. module_platform_driver(stmpe_adc_driver);
  276. static const struct of_device_id stmpe_adc_ids[] = {
  277. { .compatible = "st,stmpe-adc", },
  278. { },
  279. };
  280. MODULE_DEVICE_TABLE(of, stmpe_adc_ids);
  281. MODULE_AUTHOR("Stefan Agner <stefan.agner@toradex.com>");
  282. MODULE_DESCRIPTION("STMPEXXX ADC driver");
  283. MODULE_LICENSE("GPL v2");
  284. MODULE_ALIAS("platform:stmpe-adc");