qcom-pm8xxx-xoadc.c 34 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Qualcomm PM8xxx PMIC XOADC driver
  4. *
  5. * These ADCs are known as HK/XO (house keeping / chrystal oscillator)
  6. * "XO" in "XOADC" means Chrystal Oscillator. It's a bunch of
  7. * specific-purpose and general purpose ADC converters and channels.
  8. *
  9. * Copyright (C) 2017 Linaro Ltd.
  10. * Author: Linus Walleij <linus.walleij@linaro.org>
  11. */
  12. #include <linux/iio/iio.h>
  13. #include <linux/iio/sysfs.h>
  14. #include <linux/module.h>
  15. #include <linux/of.h>
  16. #include <linux/of_device.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/regmap.h>
  19. #include <linux/init.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/regulator/consumer.h>
  22. #include "qcom-vadc-common.h"
  23. /*
  24. * Definitions for the "user processor" registers lifted from the v3.4
  25. * Qualcomm tree. Their kernel has two out-of-tree drivers for the ADC:
  26. * drivers/misc/pmic8058-xoadc.c
  27. * drivers/hwmon/pm8xxx-adc.c
  28. * None of them contain any complete register specification, so this is
  29. * a best effort of combining the information.
  30. */
  31. /* These appear to be "battery monitor" registers */
  32. #define ADC_ARB_BTM_CNTRL1 0x17e
  33. #define ADC_ARB_BTM_CNTRL1_EN_BTM BIT(0)
  34. #define ADC_ARB_BTM_CNTRL1_SEL_OP_MODE BIT(1)
  35. #define ADC_ARB_BTM_CNTRL1_MEAS_INTERVAL1 BIT(2)
  36. #define ADC_ARB_BTM_CNTRL1_MEAS_INTERVAL2 BIT(3)
  37. #define ADC_ARB_BTM_CNTRL1_MEAS_INTERVAL3 BIT(4)
  38. #define ADC_ARB_BTM_CNTRL1_MEAS_INTERVAL4 BIT(5)
  39. #define ADC_ARB_BTM_CNTRL1_EOC BIT(6)
  40. #define ADC_ARB_BTM_CNTRL1_REQ BIT(7)
  41. #define ADC_ARB_BTM_AMUX_CNTRL 0x17f
  42. #define ADC_ARB_BTM_ANA_PARAM 0x180
  43. #define ADC_ARB_BTM_DIG_PARAM 0x181
  44. #define ADC_ARB_BTM_RSV 0x182
  45. #define ADC_ARB_BTM_DATA1 0x183
  46. #define ADC_ARB_BTM_DATA0 0x184
  47. #define ADC_ARB_BTM_BAT_COOL_THR1 0x185
  48. #define ADC_ARB_BTM_BAT_COOL_THR0 0x186
  49. #define ADC_ARB_BTM_BAT_WARM_THR1 0x187
  50. #define ADC_ARB_BTM_BAT_WARM_THR0 0x188
  51. #define ADC_ARB_BTM_CNTRL2 0x18c
  52. /* Proper ADC registers */
  53. #define ADC_ARB_USRP_CNTRL 0x197
  54. #define ADC_ARB_USRP_CNTRL_EN_ARB BIT(0)
  55. #define ADC_ARB_USRP_CNTRL_RSV1 BIT(1)
  56. #define ADC_ARB_USRP_CNTRL_RSV2 BIT(2)
  57. #define ADC_ARB_USRP_CNTRL_RSV3 BIT(3)
  58. #define ADC_ARB_USRP_CNTRL_RSV4 BIT(4)
  59. #define ADC_ARB_USRP_CNTRL_RSV5 BIT(5)
  60. #define ADC_ARB_USRP_CNTRL_EOC BIT(6)
  61. #define ADC_ARB_USRP_CNTRL_REQ BIT(7)
  62. #define ADC_ARB_USRP_AMUX_CNTRL 0x198
  63. /*
  64. * The channel mask includes the bits selecting channel mux and prescaler
  65. * on PM8058, or channel mux and premux on PM8921.
  66. */
  67. #define ADC_ARB_USRP_AMUX_CNTRL_CHAN_MASK 0xfc
  68. #define ADC_ARB_USRP_AMUX_CNTRL_RSV0 BIT(0)
  69. #define ADC_ARB_USRP_AMUX_CNTRL_RSV1 BIT(1)
  70. /* On PM8058 this is prescaling, on PM8921 this is premux */
  71. #define ADC_ARB_USRP_AMUX_CNTRL_PRESCALEMUX0 BIT(2)
  72. #define ADC_ARB_USRP_AMUX_CNTRL_PRESCALEMUX1 BIT(3)
  73. #define ADC_ARB_USRP_AMUX_CNTRL_SEL0 BIT(4)
  74. #define ADC_ARB_USRP_AMUX_CNTRL_SEL1 BIT(5)
  75. #define ADC_ARB_USRP_AMUX_CNTRL_SEL2 BIT(6)
  76. #define ADC_ARB_USRP_AMUX_CNTRL_SEL3 BIT(7)
  77. #define ADC_AMUX_PREMUX_SHIFT 2
  78. #define ADC_AMUX_SEL_SHIFT 4
  79. /* We know very little about the bits in this register */
  80. #define ADC_ARB_USRP_ANA_PARAM 0x199
  81. #define ADC_ARB_USRP_ANA_PARAM_DIS 0xFE
  82. #define ADC_ARB_USRP_ANA_PARAM_EN 0xFF
  83. #define ADC_ARB_USRP_DIG_PARAM 0x19A
  84. #define ADC_ARB_USRP_DIG_PARAM_SEL_SHIFT0 BIT(0)
  85. #define ADC_ARB_USRP_DIG_PARAM_SEL_SHIFT1 BIT(1)
  86. #define ADC_ARB_USRP_DIG_PARAM_CLK_RATE0 BIT(2)
  87. #define ADC_ARB_USRP_DIG_PARAM_CLK_RATE1 BIT(3)
  88. #define ADC_ARB_USRP_DIG_PARAM_EOC BIT(4)
  89. /*
  90. * On a later ADC the decimation factors are defined as
  91. * 00 = 512, 01 = 1024, 10 = 2048, 11 = 4096 so assume this
  92. * holds also for this older XOADC.
  93. */
  94. #define ADC_ARB_USRP_DIG_PARAM_DEC_RATE0 BIT(5)
  95. #define ADC_ARB_USRP_DIG_PARAM_DEC_RATE1 BIT(6)
  96. #define ADC_ARB_USRP_DIG_PARAM_EN BIT(7)
  97. #define ADC_DIG_PARAM_DEC_SHIFT 5
  98. #define ADC_ARB_USRP_RSV 0x19B
  99. #define ADC_ARB_USRP_RSV_RST BIT(0)
  100. #define ADC_ARB_USRP_RSV_DTEST0 BIT(1)
  101. #define ADC_ARB_USRP_RSV_DTEST1 BIT(2)
  102. #define ADC_ARB_USRP_RSV_OP BIT(3)
  103. #define ADC_ARB_USRP_RSV_IP_SEL0 BIT(4)
  104. #define ADC_ARB_USRP_RSV_IP_SEL1 BIT(5)
  105. #define ADC_ARB_USRP_RSV_IP_SEL2 BIT(6)
  106. #define ADC_ARB_USRP_RSV_TRM BIT(7)
  107. #define ADC_RSV_IP_SEL_SHIFT 4
  108. #define ADC_ARB_USRP_DATA0 0x19D
  109. #define ADC_ARB_USRP_DATA1 0x19C
  110. /*
  111. * Physical channels which MUST exist on all PM variants in order to provide
  112. * proper reference points for calibration.
  113. *
  114. * @PM8XXX_CHANNEL_INTERNAL: 625mV reference channel
  115. * @PM8XXX_CHANNEL_125V: 1250mV reference channel
  116. * @PM8XXX_CHANNEL_INTERNAL_2: 325mV reference channel
  117. * @PM8XXX_CHANNEL_MUXOFF: channel to reduce input load on mux, apparently also
  118. * measures XO temperature
  119. */
  120. #define PM8XXX_CHANNEL_INTERNAL 0x0c
  121. #define PM8XXX_CHANNEL_125V 0x0d
  122. #define PM8XXX_CHANNEL_INTERNAL_2 0x0e
  123. #define PM8XXX_CHANNEL_MUXOFF 0x0f
  124. /*
  125. * PM8058 AMUX premux scaling, two bits. This is done of the channel before
  126. * reaching the AMUX.
  127. */
  128. #define PM8058_AMUX_PRESCALE_0 0x0 /* No scaling on the signal */
  129. #define PM8058_AMUX_PRESCALE_1 0x1 /* Unity scaling selected by the user */
  130. #define PM8058_AMUX_PRESCALE_1_DIV3 0x2 /* 1/3 prescaler on the input */
  131. /* Defines reference voltage for the XOADC */
  132. #define AMUX_RSV0 0x0 /* XO_IN/XOADC_GND, special selection to read XO temp */
  133. #define AMUX_RSV1 0x1 /* PMIC_IN/XOADC_GND */
  134. #define AMUX_RSV2 0x2 /* PMIC_IN/BMS_CSP */
  135. #define AMUX_RSV3 0x3 /* not used */
  136. #define AMUX_RSV4 0x4 /* XOADC_GND/XOADC_GND */
  137. #define AMUX_RSV5 0x5 /* XOADC_VREF/XOADC_GND */
  138. #define XOADC_RSV_MAX 5 /* 3 bits 0..7, 3 and 6,7 are invalid */
  139. /**
  140. * struct xoadc_channel - encodes channel properties and defaults
  141. * @datasheet_name: the hardwarename of this channel
  142. * @pre_scale_mux: prescale (PM8058) or premux (PM8921) for selecting
  143. * this channel. Both this and the amux channel is needed to uniquely
  144. * identify a channel. Values 0..3.
  145. * @amux_channel: value of the ADC_ARB_USRP_AMUX_CNTRL register for this
  146. * channel, bits 4..7, selects the amux, values 0..f
  147. * @prescale: the channels have hard-coded prescale ratios defined
  148. * by the hardware, this tells us what it is
  149. * @type: corresponding IIO channel type, usually IIO_VOLTAGE or
  150. * IIO_TEMP
  151. * @scale_fn_type: the liner interpolation etc to convert the
  152. * ADC code to the value that IIO expects, in uV or millicelsius
  153. * etc. This scale function can be pretty elaborate if different
  154. * thermistors are connected or other hardware characteristics are
  155. * deployed.
  156. * @amux_ip_rsv: ratiometric scale value used by the analog muxer: this
  157. * selects the reference voltage for ratiometric scaling
  158. */
  159. struct xoadc_channel {
  160. const char *datasheet_name;
  161. u8 pre_scale_mux:2;
  162. u8 amux_channel:4;
  163. const struct vadc_prescale_ratio prescale;
  164. enum iio_chan_type type;
  165. enum vadc_scale_fn_type scale_fn_type;
  166. u8 amux_ip_rsv:3;
  167. };
  168. /**
  169. * struct xoadc_variant - encodes the XOADC variant characteristics
  170. * @name: name of this PMIC variant
  171. * @channels: the hardware channels and respective settings and defaults
  172. * @broken_ratiometric: if the PMIC has broken ratiometric scaling (this
  173. * is a known problem on PM8058)
  174. * @prescaling: this variant uses AMUX bits 2 & 3 for prescaling (PM8058)
  175. * @second_level_mux: this variant uses AMUX bits 2 & 3 for a second level
  176. * mux
  177. */
  178. struct xoadc_variant {
  179. const char name[16];
  180. const struct xoadc_channel *channels;
  181. bool broken_ratiometric;
  182. bool prescaling;
  183. bool second_level_mux;
  184. };
  185. /*
  186. * XOADC_CHAN macro parameters:
  187. * _dname: the name of the channel
  188. * _presmux: prescaler (PM8058) or premux (PM8921) setting for this channel
  189. * _amux: the value in bits 2..7 of the ADC_ARB_USRP_AMUX_CNTRL register
  190. * for this channel. On some PMICs some of the bits select a prescaler, and
  191. * on some PMICs some of the bits select various complex multiplex settings.
  192. * _type: IIO channel type
  193. * _prenum: prescaler numerator (dividend)
  194. * _preden: prescaler denominator (divisor)
  195. * _scale: scaling function type, this selects how the raw valued is mangled
  196. * to output the actual processed measurement
  197. * _amip: analog mux input parent when using ratiometric measurements
  198. */
  199. #define XOADC_CHAN(_dname, _presmux, _amux, _type, _prenum, _preden, _scale, _amip) \
  200. { \
  201. .datasheet_name = __stringify(_dname), \
  202. .pre_scale_mux = _presmux, \
  203. .amux_channel = _amux, \
  204. .prescale = { .num = _prenum, .den = _preden }, \
  205. .type = _type, \
  206. .scale_fn_type = _scale, \
  207. .amux_ip_rsv = _amip, \
  208. }
  209. /*
  210. * Taken from arch/arm/mach-msm/board-9615.c in the vendor tree:
  211. * TODO: incomplete, needs testing.
  212. */
  213. static const struct xoadc_channel pm8018_xoadc_channels[] = {
  214. XOADC_CHAN(VCOIN, 0x00, 0x00, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  215. XOADC_CHAN(VBAT, 0x00, 0x01, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  216. XOADC_CHAN(VPH_PWR, 0x00, 0x02, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  217. XOADC_CHAN(DIE_TEMP, 0x00, 0x0b, IIO_TEMP, 1, 1, SCALE_PMIC_THERM, AMUX_RSV1),
  218. /* Used for battery ID or battery temperature */
  219. XOADC_CHAN(AMUX8, 0x00, 0x08, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV2),
  220. XOADC_CHAN(INTERNAL, 0x00, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  221. XOADC_CHAN(125V, 0x00, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  222. XOADC_CHAN(MUXOFF, 0x00, 0x0f, IIO_TEMP, 1, 1, SCALE_XOTHERM, AMUX_RSV0),
  223. { }, /* Sentinel */
  224. };
  225. /*
  226. * Taken from arch/arm/mach-msm/board-8930-pmic.c in the vendor tree:
  227. * TODO: needs testing.
  228. */
  229. static const struct xoadc_channel pm8038_xoadc_channels[] = {
  230. XOADC_CHAN(VCOIN, 0x00, 0x00, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  231. XOADC_CHAN(VBAT, 0x00, 0x01, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  232. XOADC_CHAN(DCIN, 0x00, 0x02, IIO_VOLTAGE, 1, 6, SCALE_DEFAULT, AMUX_RSV1),
  233. XOADC_CHAN(ICHG, 0x00, 0x03, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  234. XOADC_CHAN(VPH_PWR, 0x00, 0x04, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  235. XOADC_CHAN(AMUX5, 0x00, 0x05, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  236. XOADC_CHAN(AMUX6, 0x00, 0x06, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  237. XOADC_CHAN(AMUX7, 0x00, 0x07, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  238. /* AMUX8 used for battery temperature in most cases */
  239. XOADC_CHAN(AMUX8, 0x00, 0x08, IIO_TEMP, 1, 1, SCALE_THERM_100K_PULLUP, AMUX_RSV2),
  240. XOADC_CHAN(AMUX9, 0x00, 0x09, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  241. XOADC_CHAN(USB_VBUS, 0x00, 0x0a, IIO_VOLTAGE, 1, 4, SCALE_DEFAULT, AMUX_RSV1),
  242. XOADC_CHAN(DIE_TEMP, 0x00, 0x0b, IIO_TEMP, 1, 1, SCALE_PMIC_THERM, AMUX_RSV1),
  243. XOADC_CHAN(INTERNAL, 0x00, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  244. XOADC_CHAN(125V, 0x00, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  245. XOADC_CHAN(INTERNAL_2, 0x00, 0x0e, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  246. XOADC_CHAN(MUXOFF, 0x00, 0x0f, IIO_TEMP, 1, 1, SCALE_XOTHERM, AMUX_RSV0),
  247. { }, /* Sentinel */
  248. };
  249. /*
  250. * This was created by cross-referencing the vendor tree
  251. * arch/arm/mach-msm/board-msm8x60.c msm_adc_channels_data[]
  252. * with the "channel types" (first field) to find the right
  253. * configuration for these channels on an MSM8x60 i.e. PM8058
  254. * setup.
  255. */
  256. static const struct xoadc_channel pm8058_xoadc_channels[] = {
  257. XOADC_CHAN(VCOIN, 0x00, 0x00, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1),
  258. XOADC_CHAN(VBAT, 0x00, 0x01, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  259. XOADC_CHAN(DCIN, 0x00, 0x02, IIO_VOLTAGE, 1, 10, SCALE_DEFAULT, AMUX_RSV1),
  260. XOADC_CHAN(ICHG, 0x00, 0x03, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  261. XOADC_CHAN(VPH_PWR, 0x00, 0x04, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  262. /*
  263. * AMUX channels 5 thru 9 are referred to as MPP5 thru MPP9 in
  264. * some code and documentation. But they are really just 5
  265. * channels just like any other. They are connected to a switching
  266. * matrix where they can be routed to any of the MPPs, not just
  267. * 1-to-1 onto MPP5 thru 9, so naming them MPP5 thru MPP9 is
  268. * very confusing.
  269. */
  270. XOADC_CHAN(AMUX5, 0x00, 0x05, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  271. XOADC_CHAN(AMUX6, 0x00, 0x06, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  272. XOADC_CHAN(AMUX7, 0x00, 0x07, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1),
  273. XOADC_CHAN(AMUX8, 0x00, 0x08, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1),
  274. XOADC_CHAN(AMUX9, 0x00, 0x09, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  275. XOADC_CHAN(USB_VBUS, 0x00, 0x0a, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  276. XOADC_CHAN(DIE_TEMP, 0x00, 0x0b, IIO_TEMP, 1, 1, SCALE_PMIC_THERM, AMUX_RSV1),
  277. XOADC_CHAN(INTERNAL, 0x00, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  278. XOADC_CHAN(125V, 0x00, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  279. XOADC_CHAN(INTERNAL_2, 0x00, 0x0e, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  280. XOADC_CHAN(MUXOFF, 0x00, 0x0f, IIO_TEMP, 1, 1, SCALE_XOTHERM, AMUX_RSV0),
  281. /* There are also "unity" and divided by 3 channels (prescaler) but noone is using them */
  282. { }, /* Sentinel */
  283. };
  284. /*
  285. * The PM8921 has some pre-muxing on its channels, this comes from the vendor tree
  286. * include/linux/mfd/pm8xxx/pm8xxx-adc.h
  287. * board-flo-pmic.c (Nexus 7) and board-8064-pmic.c
  288. */
  289. static const struct xoadc_channel pm8921_xoadc_channels[] = {
  290. XOADC_CHAN(VCOIN, 0x00, 0x00, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  291. XOADC_CHAN(VBAT, 0x00, 0x01, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  292. XOADC_CHAN(DCIN, 0x00, 0x02, IIO_VOLTAGE, 1, 6, SCALE_DEFAULT, AMUX_RSV1),
  293. /* channel "ICHG" is reserved and not used on PM8921 */
  294. XOADC_CHAN(VPH_PWR, 0x00, 0x04, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  295. XOADC_CHAN(IBAT, 0x00, 0x05, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  296. /* CHAN 6 & 7 (MPP1 & MPP2) are reserved for MPP channels on PM8921 */
  297. XOADC_CHAN(BATT_THERM, 0x00, 0x08, IIO_TEMP, 1, 1, SCALE_THERM_100K_PULLUP, AMUX_RSV1),
  298. XOADC_CHAN(BATT_ID, 0x00, 0x09, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  299. XOADC_CHAN(USB_VBUS, 0x00, 0x0a, IIO_VOLTAGE, 1, 4, SCALE_DEFAULT, AMUX_RSV1),
  300. XOADC_CHAN(DIE_TEMP, 0x00, 0x0b, IIO_TEMP, 1, 1, SCALE_PMIC_THERM, AMUX_RSV1),
  301. XOADC_CHAN(INTERNAL, 0x00, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  302. XOADC_CHAN(125V, 0x00, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  303. /* FIXME: look into the scaling of this temperature */
  304. XOADC_CHAN(CHG_TEMP, 0x00, 0x0e, IIO_TEMP, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  305. XOADC_CHAN(MUXOFF, 0x00, 0x0f, IIO_TEMP, 1, 1, SCALE_XOTHERM, AMUX_RSV0),
  306. /* The following channels have premux bit 0 set to 1 (all end in 4) */
  307. XOADC_CHAN(ATEST_8, 0x01, 0x00, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  308. /* Set scaling to 1/2 based on the name for these two */
  309. XOADC_CHAN(USB_SNS_DIV20, 0x01, 0x01, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1),
  310. XOADC_CHAN(DCIN_SNS_DIV20, 0x01, 0x02, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1),
  311. XOADC_CHAN(AMUX3, 0x01, 0x03, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  312. XOADC_CHAN(AMUX4, 0x01, 0x04, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  313. XOADC_CHAN(AMUX5, 0x01, 0x05, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  314. XOADC_CHAN(AMUX6, 0x01, 0x06, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  315. XOADC_CHAN(AMUX7, 0x01, 0x07, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  316. XOADC_CHAN(AMUX8, 0x01, 0x08, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  317. /* Internal test signals, I think */
  318. XOADC_CHAN(ATEST_1, 0x01, 0x09, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  319. XOADC_CHAN(ATEST_2, 0x01, 0x0a, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  320. XOADC_CHAN(ATEST_3, 0x01, 0x0b, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  321. XOADC_CHAN(ATEST_4, 0x01, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  322. XOADC_CHAN(ATEST_5, 0x01, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  323. XOADC_CHAN(ATEST_6, 0x01, 0x0e, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  324. XOADC_CHAN(ATEST_7, 0x01, 0x0f, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
  325. /* The following channels have premux bit 1 set to 1 (all end in 8) */
  326. /* I guess even ATEST8 will be divided by 3 here */
  327. XOADC_CHAN(ATEST_8, 0x02, 0x00, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  328. /* I guess div 2 div 3 becomes div 6 */
  329. XOADC_CHAN(USB_SNS_DIV20_DIV3, 0x02, 0x01, IIO_VOLTAGE, 1, 6, SCALE_DEFAULT, AMUX_RSV1),
  330. XOADC_CHAN(DCIN_SNS_DIV20_DIV3, 0x02, 0x02, IIO_VOLTAGE, 1, 6, SCALE_DEFAULT, AMUX_RSV1),
  331. XOADC_CHAN(AMUX3_DIV3, 0x02, 0x03, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  332. XOADC_CHAN(AMUX4_DIV3, 0x02, 0x04, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  333. XOADC_CHAN(AMUX5_DIV3, 0x02, 0x05, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  334. XOADC_CHAN(AMUX6_DIV3, 0x02, 0x06, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  335. XOADC_CHAN(AMUX7_DIV3, 0x02, 0x07, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  336. XOADC_CHAN(AMUX8_DIV3, 0x02, 0x08, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  337. XOADC_CHAN(ATEST_1_DIV3, 0x02, 0x09, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  338. XOADC_CHAN(ATEST_2_DIV3, 0x02, 0x0a, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  339. XOADC_CHAN(ATEST_3_DIV3, 0x02, 0x0b, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  340. XOADC_CHAN(ATEST_4_DIV3, 0x02, 0x0c, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  341. XOADC_CHAN(ATEST_5_DIV3, 0x02, 0x0d, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  342. XOADC_CHAN(ATEST_6_DIV3, 0x02, 0x0e, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  343. XOADC_CHAN(ATEST_7_DIV3, 0x02, 0x0f, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
  344. { }, /* Sentinel */
  345. };
  346. /**
  347. * struct pm8xxx_chan_info - ADC channel information
  348. * @name: name of this channel
  349. * @hwchan: pointer to hardware channel information (muxing & scaling settings)
  350. * @calibration: whether to use absolute or ratiometric calibration
  351. * @scale_fn_type: scaling function type
  352. * @decimation: 0,1,2,3
  353. * @amux_ip_rsv: ratiometric scale value if using ratiometric
  354. * calibration: 0, 1, 2, 4, 5.
  355. */
  356. struct pm8xxx_chan_info {
  357. const char *name;
  358. const struct xoadc_channel *hwchan;
  359. enum vadc_calibration calibration;
  360. u8 decimation:2;
  361. u8 amux_ip_rsv:3;
  362. };
  363. /**
  364. * struct pm8xxx_xoadc - state container for the XOADC
  365. * @dev: pointer to device
  366. * @map: regmap to access registers
  367. * @variant: XOADC variant characteristics
  368. * @vref: reference voltage regulator
  369. * characteristics of the channels, and sensible default settings
  370. * @nchans: number of channels, configured by the device tree
  371. * @chans: the channel information per-channel, configured by the device tree
  372. * @iio_chans: IIO channel specifiers
  373. * @graph: linear calibration parameters for absolute and
  374. * ratiometric measurements
  375. * @complete: completion to indicate end of conversion
  376. * @lock: lock to restrict access to the hardware to one client at the time
  377. */
  378. struct pm8xxx_xoadc {
  379. struct device *dev;
  380. struct regmap *map;
  381. const struct xoadc_variant *variant;
  382. struct regulator *vref;
  383. unsigned int nchans;
  384. struct pm8xxx_chan_info *chans;
  385. struct iio_chan_spec *iio_chans;
  386. struct vadc_linear_graph graph[2];
  387. struct completion complete;
  388. struct mutex lock;
  389. };
  390. static irqreturn_t pm8xxx_eoc_irq(int irq, void *d)
  391. {
  392. struct iio_dev *indio_dev = d;
  393. struct pm8xxx_xoadc *adc = iio_priv(indio_dev);
  394. complete(&adc->complete);
  395. return IRQ_HANDLED;
  396. }
  397. static struct pm8xxx_chan_info *
  398. pm8xxx_get_channel(struct pm8xxx_xoadc *adc, u8 chan)
  399. {
  400. int i;
  401. for (i = 0; i < adc->nchans; i++) {
  402. struct pm8xxx_chan_info *ch = &adc->chans[i];
  403. if (ch->hwchan->amux_channel == chan)
  404. return ch;
  405. }
  406. return NULL;
  407. }
  408. static int pm8xxx_read_channel_rsv(struct pm8xxx_xoadc *adc,
  409. const struct pm8xxx_chan_info *ch,
  410. u8 rsv, u16 *adc_code,
  411. bool force_ratiometric)
  412. {
  413. int ret;
  414. unsigned int val;
  415. u8 rsvmask, rsvval;
  416. u8 lsb, msb;
  417. dev_dbg(adc->dev, "read channel \"%s\", amux %d, prescale/mux: %d, rsv %d\n",
  418. ch->name, ch->hwchan->amux_channel, ch->hwchan->pre_scale_mux, rsv);
  419. mutex_lock(&adc->lock);
  420. /* Mux in this channel */
  421. val = ch->hwchan->amux_channel << ADC_AMUX_SEL_SHIFT;
  422. val |= ch->hwchan->pre_scale_mux << ADC_AMUX_PREMUX_SHIFT;
  423. ret = regmap_write(adc->map, ADC_ARB_USRP_AMUX_CNTRL, val);
  424. if (ret)
  425. goto unlock;
  426. /* Set up ratiometric scale value, mask off all bits except these */
  427. rsvmask = (ADC_ARB_USRP_RSV_RST | ADC_ARB_USRP_RSV_DTEST0 |
  428. ADC_ARB_USRP_RSV_DTEST1 | ADC_ARB_USRP_RSV_OP);
  429. if (adc->variant->broken_ratiometric && !force_ratiometric) {
  430. /*
  431. * Apparently the PM8058 has some kind of bug which is
  432. * reflected in the vendor tree drivers/misc/pmix8058-xoadc.c
  433. * which just hardcodes the RSV selector to SEL1 (0x20) for
  434. * most cases and SEL0 (0x10) for the MUXOFF channel only.
  435. * If we force ratiometric (currently only done when attempting
  436. * to do ratiometric calibration) this doesn't seem to work
  437. * very well and I suspect ratiometric conversion is simply
  438. * broken or not supported on the PM8058.
  439. *
  440. * Maybe IO_SEL2 doesn't exist on PM8058 and bits 4 & 5 select
  441. * the mode alone.
  442. *
  443. * Some PM8058 register documentation would be nice to get
  444. * this right.
  445. */
  446. if (ch->hwchan->amux_channel == PM8XXX_CHANNEL_MUXOFF)
  447. rsvval = ADC_ARB_USRP_RSV_IP_SEL0;
  448. else
  449. rsvval = ADC_ARB_USRP_RSV_IP_SEL1;
  450. } else {
  451. if (rsv == 0xff)
  452. rsvval = (ch->amux_ip_rsv << ADC_RSV_IP_SEL_SHIFT) |
  453. ADC_ARB_USRP_RSV_TRM;
  454. else
  455. rsvval = (rsv << ADC_RSV_IP_SEL_SHIFT) |
  456. ADC_ARB_USRP_RSV_TRM;
  457. }
  458. ret = regmap_update_bits(adc->map,
  459. ADC_ARB_USRP_RSV,
  460. ~rsvmask,
  461. rsvval);
  462. if (ret)
  463. goto unlock;
  464. ret = regmap_write(adc->map, ADC_ARB_USRP_ANA_PARAM,
  465. ADC_ARB_USRP_ANA_PARAM_DIS);
  466. if (ret)
  467. goto unlock;
  468. /* Decimation factor */
  469. ret = regmap_write(adc->map, ADC_ARB_USRP_DIG_PARAM,
  470. ADC_ARB_USRP_DIG_PARAM_SEL_SHIFT0 |
  471. ADC_ARB_USRP_DIG_PARAM_SEL_SHIFT1 |
  472. ch->decimation << ADC_DIG_PARAM_DEC_SHIFT);
  473. if (ret)
  474. goto unlock;
  475. ret = regmap_write(adc->map, ADC_ARB_USRP_ANA_PARAM,
  476. ADC_ARB_USRP_ANA_PARAM_EN);
  477. if (ret)
  478. goto unlock;
  479. /* Enable the arbiter, the Qualcomm code does it twice like this */
  480. ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL,
  481. ADC_ARB_USRP_CNTRL_EN_ARB);
  482. if (ret)
  483. goto unlock;
  484. ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL,
  485. ADC_ARB_USRP_CNTRL_EN_ARB);
  486. if (ret)
  487. goto unlock;
  488. /* Fire a request! */
  489. reinit_completion(&adc->complete);
  490. ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL,
  491. ADC_ARB_USRP_CNTRL_EN_ARB |
  492. ADC_ARB_USRP_CNTRL_REQ);
  493. if (ret)
  494. goto unlock;
  495. /* Next the interrupt occurs */
  496. ret = wait_for_completion_timeout(&adc->complete,
  497. VADC_CONV_TIME_MAX_US);
  498. if (!ret) {
  499. dev_err(adc->dev, "conversion timed out\n");
  500. ret = -ETIMEDOUT;
  501. goto unlock;
  502. }
  503. ret = regmap_read(adc->map, ADC_ARB_USRP_DATA0, &val);
  504. if (ret)
  505. goto unlock;
  506. lsb = val;
  507. ret = regmap_read(adc->map, ADC_ARB_USRP_DATA1, &val);
  508. if (ret)
  509. goto unlock;
  510. msb = val;
  511. *adc_code = (msb << 8) | lsb;
  512. /* Turn off the ADC by setting the arbiter to 0 twice */
  513. ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL, 0);
  514. if (ret)
  515. goto unlock;
  516. ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL, 0);
  517. if (ret)
  518. goto unlock;
  519. unlock:
  520. mutex_unlock(&adc->lock);
  521. return ret;
  522. }
  523. static int pm8xxx_read_channel(struct pm8xxx_xoadc *adc,
  524. const struct pm8xxx_chan_info *ch,
  525. u16 *adc_code)
  526. {
  527. /*
  528. * Normally we just use the ratiometric scale value (RSV) predefined
  529. * for the channel, but during calibration we need to modify this
  530. * so this wrapper is a helper hiding the more complex version.
  531. */
  532. return pm8xxx_read_channel_rsv(adc, ch, 0xff, adc_code, false);
  533. }
  534. static int pm8xxx_calibrate_device(struct pm8xxx_xoadc *adc)
  535. {
  536. const struct pm8xxx_chan_info *ch;
  537. u16 read_1250v;
  538. u16 read_0625v;
  539. u16 read_nomux_rsv5;
  540. u16 read_nomux_rsv4;
  541. int ret;
  542. adc->graph[VADC_CALIB_ABSOLUTE].dx = VADC_ABSOLUTE_RANGE_UV;
  543. adc->graph[VADC_CALIB_RATIOMETRIC].dx = VADC_RATIOMETRIC_RANGE;
  544. /* Common reference channel calibration */
  545. ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_125V);
  546. if (!ch)
  547. return -ENODEV;
  548. ret = pm8xxx_read_channel(adc, ch, &read_1250v);
  549. if (ret) {
  550. dev_err(adc->dev, "could not read 1.25V reference channel\n");
  551. return -ENODEV;
  552. }
  553. ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_INTERNAL);
  554. if (!ch)
  555. return -ENODEV;
  556. ret = pm8xxx_read_channel(adc, ch, &read_0625v);
  557. if (ret) {
  558. dev_err(adc->dev, "could not read 0.625V reference channel\n");
  559. return -ENODEV;
  560. }
  561. if (read_1250v == read_0625v) {
  562. dev_err(adc->dev, "read same ADC code for 1.25V and 0.625V\n");
  563. return -ENODEV;
  564. }
  565. adc->graph[VADC_CALIB_ABSOLUTE].dy = read_1250v - read_0625v;
  566. adc->graph[VADC_CALIB_ABSOLUTE].gnd = read_0625v;
  567. dev_info(adc->dev, "absolute calibration dx = %d uV, dy = %d units\n",
  568. VADC_ABSOLUTE_RANGE_UV, adc->graph[VADC_CALIB_ABSOLUTE].dy);
  569. /* Ratiometric calibration */
  570. ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_MUXOFF);
  571. if (!ch)
  572. return -ENODEV;
  573. ret = pm8xxx_read_channel_rsv(adc, ch, AMUX_RSV5,
  574. &read_nomux_rsv5, true);
  575. if (ret) {
  576. dev_err(adc->dev, "could not read MUXOFF reference channel\n");
  577. return -ENODEV;
  578. }
  579. ret = pm8xxx_read_channel_rsv(adc, ch, AMUX_RSV4,
  580. &read_nomux_rsv4, true);
  581. if (ret) {
  582. dev_err(adc->dev, "could not read MUXOFF reference channel\n");
  583. return -ENODEV;
  584. }
  585. adc->graph[VADC_CALIB_RATIOMETRIC].dy =
  586. read_nomux_rsv5 - read_nomux_rsv4;
  587. adc->graph[VADC_CALIB_RATIOMETRIC].gnd = read_nomux_rsv4;
  588. dev_info(adc->dev, "ratiometric calibration dx = %d, dy = %d units\n",
  589. VADC_RATIOMETRIC_RANGE,
  590. adc->graph[VADC_CALIB_RATIOMETRIC].dy);
  591. return 0;
  592. }
  593. static int pm8xxx_read_raw(struct iio_dev *indio_dev,
  594. struct iio_chan_spec const *chan,
  595. int *val, int *val2, long mask)
  596. {
  597. struct pm8xxx_xoadc *adc = iio_priv(indio_dev);
  598. const struct pm8xxx_chan_info *ch;
  599. u16 adc_code;
  600. int ret;
  601. switch (mask) {
  602. case IIO_CHAN_INFO_PROCESSED:
  603. ch = pm8xxx_get_channel(adc, chan->address);
  604. if (!ch) {
  605. dev_err(adc->dev, "no such channel %lu\n",
  606. chan->address);
  607. return -EINVAL;
  608. }
  609. ret = pm8xxx_read_channel(adc, ch, &adc_code);
  610. if (ret)
  611. return ret;
  612. ret = qcom_vadc_scale(ch->hwchan->scale_fn_type,
  613. &adc->graph[ch->calibration],
  614. &ch->hwchan->prescale,
  615. (ch->calibration == VADC_CALIB_ABSOLUTE),
  616. adc_code, val);
  617. if (ret)
  618. return ret;
  619. return IIO_VAL_INT;
  620. case IIO_CHAN_INFO_RAW:
  621. ch = pm8xxx_get_channel(adc, chan->address);
  622. if (!ch) {
  623. dev_err(adc->dev, "no such channel %lu\n",
  624. chan->address);
  625. return -EINVAL;
  626. }
  627. ret = pm8xxx_read_channel(adc, ch, &adc_code);
  628. if (ret)
  629. return ret;
  630. *val = (int)adc_code;
  631. return IIO_VAL_INT;
  632. default:
  633. return -EINVAL;
  634. }
  635. }
  636. static int pm8xxx_of_xlate(struct iio_dev *indio_dev,
  637. const struct of_phandle_args *iiospec)
  638. {
  639. struct pm8xxx_xoadc *adc = iio_priv(indio_dev);
  640. u8 pre_scale_mux;
  641. u8 amux_channel;
  642. unsigned int i;
  643. /*
  644. * First cell is prescaler or premux, second cell is analog
  645. * mux.
  646. */
  647. if (iiospec->args_count != 2) {
  648. dev_err(&indio_dev->dev, "wrong number of arguments for %pOFn need 2 got %d\n",
  649. iiospec->np,
  650. iiospec->args_count);
  651. return -EINVAL;
  652. }
  653. pre_scale_mux = (u8)iiospec->args[0];
  654. amux_channel = (u8)iiospec->args[1];
  655. dev_dbg(&indio_dev->dev, "pre scale/mux: %02x, amux: %02x\n",
  656. pre_scale_mux, amux_channel);
  657. /* We need to match exactly on the prescale/premux and channel */
  658. for (i = 0; i < adc->nchans; i++)
  659. if (adc->chans[i].hwchan->pre_scale_mux == pre_scale_mux &&
  660. adc->chans[i].hwchan->amux_channel == amux_channel)
  661. return i;
  662. return -EINVAL;
  663. }
  664. static const struct iio_info pm8xxx_xoadc_info = {
  665. .of_xlate = pm8xxx_of_xlate,
  666. .read_raw = pm8xxx_read_raw,
  667. };
  668. static int pm8xxx_xoadc_parse_channel(struct device *dev,
  669. struct device_node *np,
  670. const struct xoadc_channel *hw_channels,
  671. struct iio_chan_spec *iio_chan,
  672. struct pm8xxx_chan_info *ch)
  673. {
  674. const char *name = np->name;
  675. const struct xoadc_channel *hwchan;
  676. u32 pre_scale_mux, amux_channel;
  677. u32 rsv, dec;
  678. int ret;
  679. int chid;
  680. ret = of_property_read_u32_index(np, "reg", 0, &pre_scale_mux);
  681. if (ret) {
  682. dev_err(dev, "invalid pre scale/mux number %s\n", name);
  683. return ret;
  684. }
  685. ret = of_property_read_u32_index(np, "reg", 1, &amux_channel);
  686. if (ret) {
  687. dev_err(dev, "invalid amux channel number %s\n", name);
  688. return ret;
  689. }
  690. /* Find the right channel setting */
  691. chid = 0;
  692. hwchan = &hw_channels[0];
  693. while (hwchan && hwchan->datasheet_name) {
  694. if (hwchan->pre_scale_mux == pre_scale_mux &&
  695. hwchan->amux_channel == amux_channel)
  696. break;
  697. hwchan++;
  698. chid++;
  699. }
  700. /* The sentinel does not have a name assigned */
  701. if (!hwchan->datasheet_name) {
  702. dev_err(dev, "could not locate channel %02x/%02x\n",
  703. pre_scale_mux, amux_channel);
  704. return -EINVAL;
  705. }
  706. ch->name = name;
  707. ch->hwchan = hwchan;
  708. /* Everyone seems to use absolute calibration except in special cases */
  709. ch->calibration = VADC_CALIB_ABSOLUTE;
  710. /* Everyone seems to use default ("type 2") decimation */
  711. ch->decimation = VADC_DEF_DECIMATION;
  712. if (!of_property_read_u32(np, "qcom,ratiometric", &rsv)) {
  713. ch->calibration = VADC_CALIB_RATIOMETRIC;
  714. if (rsv > XOADC_RSV_MAX) {
  715. dev_err(dev, "%s too large RSV value %d\n", name, rsv);
  716. return -EINVAL;
  717. }
  718. if (rsv == AMUX_RSV3) {
  719. dev_err(dev, "%s invalid RSV value %d\n", name, rsv);
  720. return -EINVAL;
  721. }
  722. }
  723. /* Optional decimation, if omitted we use the default */
  724. ret = of_property_read_u32(np, "qcom,decimation", &dec);
  725. if (!ret) {
  726. ret = qcom_vadc_decimation_from_dt(dec);
  727. if (ret < 0) {
  728. dev_err(dev, "%s invalid decimation %d\n",
  729. name, dec);
  730. return ret;
  731. }
  732. ch->decimation = ret;
  733. }
  734. iio_chan->channel = chid;
  735. iio_chan->address = hwchan->amux_channel;
  736. iio_chan->datasheet_name = hwchan->datasheet_name;
  737. iio_chan->type = hwchan->type;
  738. /* All channels are raw or processed */
  739. iio_chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  740. BIT(IIO_CHAN_INFO_PROCESSED);
  741. iio_chan->indexed = 1;
  742. dev_dbg(dev, "channel [PRESCALE/MUX: %02x AMUX: %02x] \"%s\" "
  743. "ref voltage: %d, decimation %d "
  744. "prescale %d/%d, scale function %d\n",
  745. hwchan->pre_scale_mux, hwchan->amux_channel, ch->name,
  746. ch->amux_ip_rsv, ch->decimation, hwchan->prescale.num,
  747. hwchan->prescale.den, hwchan->scale_fn_type);
  748. return 0;
  749. }
  750. static int pm8xxx_xoadc_parse_channels(struct pm8xxx_xoadc *adc,
  751. struct device_node *np)
  752. {
  753. struct device_node *child;
  754. struct pm8xxx_chan_info *ch;
  755. int ret;
  756. int i;
  757. adc->nchans = of_get_available_child_count(np);
  758. if (!adc->nchans) {
  759. dev_err(adc->dev, "no channel children\n");
  760. return -ENODEV;
  761. }
  762. dev_dbg(adc->dev, "found %d ADC channels\n", adc->nchans);
  763. adc->iio_chans = devm_kcalloc(adc->dev, adc->nchans,
  764. sizeof(*adc->iio_chans), GFP_KERNEL);
  765. if (!adc->iio_chans)
  766. return -ENOMEM;
  767. adc->chans = devm_kcalloc(adc->dev, adc->nchans,
  768. sizeof(*adc->chans), GFP_KERNEL);
  769. if (!adc->chans)
  770. return -ENOMEM;
  771. i = 0;
  772. for_each_available_child_of_node(np, child) {
  773. ch = &adc->chans[i];
  774. ret = pm8xxx_xoadc_parse_channel(adc->dev, child,
  775. adc->variant->channels,
  776. &adc->iio_chans[i],
  777. ch);
  778. if (ret) {
  779. of_node_put(child);
  780. return ret;
  781. }
  782. i++;
  783. }
  784. /* Check for required channels */
  785. ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_125V);
  786. if (!ch) {
  787. dev_err(adc->dev, "missing 1.25V reference channel\n");
  788. return -ENODEV;
  789. }
  790. ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_INTERNAL);
  791. if (!ch) {
  792. dev_err(adc->dev, "missing 0.625V reference channel\n");
  793. return -ENODEV;
  794. }
  795. ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_MUXOFF);
  796. if (!ch) {
  797. dev_err(adc->dev, "missing MUXOFF reference channel\n");
  798. return -ENODEV;
  799. }
  800. return 0;
  801. }
  802. static int pm8xxx_xoadc_probe(struct platform_device *pdev)
  803. {
  804. const struct xoadc_variant *variant;
  805. struct pm8xxx_xoadc *adc;
  806. struct iio_dev *indio_dev;
  807. struct device_node *np = pdev->dev.of_node;
  808. struct regmap *map;
  809. struct device *dev = &pdev->dev;
  810. int ret;
  811. variant = of_device_get_match_data(dev);
  812. if (!variant)
  813. return -ENODEV;
  814. indio_dev = devm_iio_device_alloc(dev, sizeof(*adc));
  815. if (!indio_dev)
  816. return -ENOMEM;
  817. platform_set_drvdata(pdev, indio_dev);
  818. adc = iio_priv(indio_dev);
  819. adc->dev = dev;
  820. adc->variant = variant;
  821. init_completion(&adc->complete);
  822. mutex_init(&adc->lock);
  823. ret = pm8xxx_xoadc_parse_channels(adc, np);
  824. if (ret)
  825. return ret;
  826. map = dev_get_regmap(dev->parent, NULL);
  827. if (!map) {
  828. dev_err(dev, "parent regmap unavailable.\n");
  829. return -ENXIO;
  830. }
  831. adc->map = map;
  832. /* Bring up regulator */
  833. adc->vref = devm_regulator_get(dev, "xoadc-ref");
  834. if (IS_ERR(adc->vref)) {
  835. dev_err(dev, "failed to get XOADC VREF regulator\n");
  836. return PTR_ERR(adc->vref);
  837. }
  838. ret = regulator_enable(adc->vref);
  839. if (ret) {
  840. dev_err(dev, "failed to enable XOADC VREF regulator\n");
  841. return ret;
  842. }
  843. ret = devm_request_threaded_irq(dev, platform_get_irq(pdev, 0),
  844. pm8xxx_eoc_irq, NULL, 0, variant->name, indio_dev);
  845. if (ret) {
  846. dev_err(dev, "unable to request IRQ\n");
  847. goto out_disable_vref;
  848. }
  849. indio_dev->name = variant->name;
  850. indio_dev->modes = INDIO_DIRECT_MODE;
  851. indio_dev->info = &pm8xxx_xoadc_info;
  852. indio_dev->channels = adc->iio_chans;
  853. indio_dev->num_channels = adc->nchans;
  854. ret = iio_device_register(indio_dev);
  855. if (ret)
  856. goto out_disable_vref;
  857. ret = pm8xxx_calibrate_device(adc);
  858. if (ret)
  859. goto out_unreg_device;
  860. dev_info(dev, "%s XOADC driver enabled\n", variant->name);
  861. return 0;
  862. out_unreg_device:
  863. iio_device_unregister(indio_dev);
  864. out_disable_vref:
  865. regulator_disable(adc->vref);
  866. return ret;
  867. }
  868. static int pm8xxx_xoadc_remove(struct platform_device *pdev)
  869. {
  870. struct iio_dev *indio_dev = platform_get_drvdata(pdev);
  871. struct pm8xxx_xoadc *adc = iio_priv(indio_dev);
  872. iio_device_unregister(indio_dev);
  873. regulator_disable(adc->vref);
  874. return 0;
  875. }
  876. static const struct xoadc_variant pm8018_variant = {
  877. .name = "PM8018-XOADC",
  878. .channels = pm8018_xoadc_channels,
  879. };
  880. static const struct xoadc_variant pm8038_variant = {
  881. .name = "PM8038-XOADC",
  882. .channels = pm8038_xoadc_channels,
  883. };
  884. static const struct xoadc_variant pm8058_variant = {
  885. .name = "PM8058-XOADC",
  886. .channels = pm8058_xoadc_channels,
  887. .broken_ratiometric = true,
  888. .prescaling = true,
  889. };
  890. static const struct xoadc_variant pm8921_variant = {
  891. .name = "PM8921-XOADC",
  892. .channels = pm8921_xoadc_channels,
  893. .second_level_mux = true,
  894. };
  895. static const struct of_device_id pm8xxx_xoadc_id_table[] = {
  896. {
  897. .compatible = "qcom,pm8018-adc",
  898. .data = &pm8018_variant,
  899. },
  900. {
  901. .compatible = "qcom,pm8038-adc",
  902. .data = &pm8038_variant,
  903. },
  904. {
  905. .compatible = "qcom,pm8058-adc",
  906. .data = &pm8058_variant,
  907. },
  908. {
  909. .compatible = "qcom,pm8921-adc",
  910. .data = &pm8921_variant,
  911. },
  912. { },
  913. };
  914. MODULE_DEVICE_TABLE(of, pm8xxx_xoadc_id_table);
  915. static struct platform_driver pm8xxx_xoadc_driver = {
  916. .driver = {
  917. .name = "pm8xxx-adc",
  918. .of_match_table = pm8xxx_xoadc_id_table,
  919. },
  920. .probe = pm8xxx_xoadc_probe,
  921. .remove = pm8xxx_xoadc_remove,
  922. };
  923. module_platform_driver(pm8xxx_xoadc_driver);
  924. MODULE_DESCRIPTION("PM8xxx XOADC driver");
  925. MODULE_LICENSE("GPL v2");
  926. MODULE_ALIAS("platform:pm8xxx-xoadc");