mcp3422.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * mcp3422.c - driver for the Microchip mcp3421/2/3/4/5/6/7/8 chip family
  4. *
  5. * Copyright (C) 2013, Angelo Compagnucci
  6. * Author: Angelo Compagnucci <angelo.compagnucci@gmail.com>
  7. *
  8. * Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/22088b.pdf
  9. * https://ww1.microchip.com/downloads/en/DeviceDoc/22226a.pdf
  10. * https://ww1.microchip.com/downloads/en/DeviceDoc/22072b.pdf
  11. *
  12. * This driver exports the value of analog input voltage to sysfs, the
  13. * voltage unit is nV.
  14. */
  15. #include <linux/err.h>
  16. #include <linux/i2c.h>
  17. #include <linux/module.h>
  18. #include <linux/mod_devicetable.h>
  19. #include <linux/delay.h>
  20. #include <linux/sysfs.h>
  21. #include <asm/unaligned.h>
  22. #include <linux/iio/iio.h>
  23. #include <linux/iio/sysfs.h>
  24. /* Masks */
  25. #define MCP3422_CHANNEL_MASK 0x60
  26. #define MCP3422_PGA_MASK 0x03
  27. #define MCP3422_SRATE_MASK 0x0C
  28. #define MCP3422_SRATE_240 0x0
  29. #define MCP3422_SRATE_60 0x1
  30. #define MCP3422_SRATE_15 0x2
  31. #define MCP3422_SRATE_3 0x3
  32. #define MCP3422_PGA_1 0
  33. #define MCP3422_PGA_2 1
  34. #define MCP3422_PGA_4 2
  35. #define MCP3422_PGA_8 3
  36. #define MCP3422_CONT_SAMPLING 0x10
  37. #define MCP3422_CHANNEL(config) (((config) & MCP3422_CHANNEL_MASK) >> 5)
  38. #define MCP3422_PGA(config) ((config) & MCP3422_PGA_MASK)
  39. #define MCP3422_SAMPLE_RATE(config) (((config) & MCP3422_SRATE_MASK) >> 2)
  40. #define MCP3422_CHANNEL_VALUE(value) (((value) << 5) & MCP3422_CHANNEL_MASK)
  41. #define MCP3422_PGA_VALUE(value) ((value) & MCP3422_PGA_MASK)
  42. #define MCP3422_SAMPLE_RATE_VALUE(value) ((value << 2) & MCP3422_SRATE_MASK)
  43. #define MCP3422_CHAN(_index) \
  44. { \
  45. .type = IIO_VOLTAGE, \
  46. .indexed = 1, \
  47. .channel = _index, \
  48. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
  49. | BIT(IIO_CHAN_INFO_SCALE), \
  50. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
  51. }
  52. static const int mcp3422_scales[4][4] = {
  53. { 1000000, 500000, 250000, 125000 },
  54. { 250000, 125000, 62500, 31250 },
  55. { 62500, 31250, 15625, 7812 },
  56. { 15625, 7812, 3906, 1953 } };
  57. /* Constant msleep times for data acquisitions */
  58. static const int mcp3422_read_times[4] = {
  59. [MCP3422_SRATE_240] = 1000 / 240,
  60. [MCP3422_SRATE_60] = 1000 / 60,
  61. [MCP3422_SRATE_15] = 1000 / 15,
  62. [MCP3422_SRATE_3] = 1000 / 3 };
  63. /* sample rates to integer conversion table */
  64. static const int mcp3422_sample_rates[4] = {
  65. [MCP3422_SRATE_240] = 240,
  66. [MCP3422_SRATE_60] = 60,
  67. [MCP3422_SRATE_15] = 15,
  68. [MCP3422_SRATE_3] = 3 };
  69. /* sample rates to sign extension table */
  70. static const int mcp3422_sign_extend[4] = {
  71. [MCP3422_SRATE_240] = 11,
  72. [MCP3422_SRATE_60] = 13,
  73. [MCP3422_SRATE_15] = 15,
  74. [MCP3422_SRATE_3] = 17 };
  75. /* Client data (each client gets its own) */
  76. struct mcp3422 {
  77. struct i2c_client *i2c;
  78. u8 id;
  79. u8 config;
  80. u8 pga[4];
  81. struct mutex lock;
  82. };
  83. static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
  84. {
  85. int ret;
  86. ret = i2c_master_send(adc->i2c, &newconfig, 1);
  87. if (ret > 0) {
  88. adc->config = newconfig;
  89. ret = 0;
  90. }
  91. return ret;
  92. }
  93. static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config)
  94. {
  95. int ret = 0;
  96. u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
  97. u8 buf[4] = {0, 0, 0, 0};
  98. u32 temp;
  99. if (sample_rate == MCP3422_SRATE_3) {
  100. ret = i2c_master_recv(adc->i2c, buf, 4);
  101. temp = get_unaligned_be24(&buf[0]);
  102. *config = buf[3];
  103. } else {
  104. ret = i2c_master_recv(adc->i2c, buf, 3);
  105. temp = get_unaligned_be16(&buf[0]);
  106. *config = buf[2];
  107. }
  108. *value = sign_extend32(temp, mcp3422_sign_extend[sample_rate]);
  109. return ret;
  110. }
  111. static int mcp3422_read_channel(struct mcp3422 *adc,
  112. struct iio_chan_spec const *channel, int *value)
  113. {
  114. int ret;
  115. u8 config;
  116. u8 req_channel = channel->channel;
  117. mutex_lock(&adc->lock);
  118. if (req_channel != MCP3422_CHANNEL(adc->config)) {
  119. config = adc->config;
  120. config &= ~MCP3422_CHANNEL_MASK;
  121. config |= MCP3422_CHANNEL_VALUE(req_channel);
  122. config &= ~MCP3422_PGA_MASK;
  123. config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
  124. ret = mcp3422_update_config(adc, config);
  125. if (ret < 0) {
  126. mutex_unlock(&adc->lock);
  127. return ret;
  128. }
  129. msleep(mcp3422_read_times[MCP3422_SAMPLE_RATE(adc->config)]);
  130. }
  131. ret = mcp3422_read(adc, value, &config);
  132. mutex_unlock(&adc->lock);
  133. return ret;
  134. }
  135. static int mcp3422_read_raw(struct iio_dev *iio,
  136. struct iio_chan_spec const *channel, int *val1,
  137. int *val2, long mask)
  138. {
  139. struct mcp3422 *adc = iio_priv(iio);
  140. int err;
  141. u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
  142. u8 pga = MCP3422_PGA(adc->config);
  143. switch (mask) {
  144. case IIO_CHAN_INFO_RAW:
  145. err = mcp3422_read_channel(adc, channel, val1);
  146. if (err < 0)
  147. return -EINVAL;
  148. return IIO_VAL_INT;
  149. case IIO_CHAN_INFO_SCALE:
  150. *val1 = 0;
  151. *val2 = mcp3422_scales[sample_rate][pga];
  152. return IIO_VAL_INT_PLUS_NANO;
  153. case IIO_CHAN_INFO_SAMP_FREQ:
  154. *val1 = mcp3422_sample_rates[MCP3422_SAMPLE_RATE(adc->config)];
  155. return IIO_VAL_INT;
  156. default:
  157. break;
  158. }
  159. return -EINVAL;
  160. }
  161. static int mcp3422_write_raw(struct iio_dev *iio,
  162. struct iio_chan_spec const *channel, int val1,
  163. int val2, long mask)
  164. {
  165. struct mcp3422 *adc = iio_priv(iio);
  166. u8 temp;
  167. u8 config = adc->config;
  168. u8 req_channel = channel->channel;
  169. u8 sample_rate = MCP3422_SAMPLE_RATE(config);
  170. u8 i;
  171. switch (mask) {
  172. case IIO_CHAN_INFO_SCALE:
  173. if (val1 != 0)
  174. return -EINVAL;
  175. for (i = 0; i < ARRAY_SIZE(mcp3422_scales[0]); i++) {
  176. if (val2 == mcp3422_scales[sample_rate][i]) {
  177. adc->pga[req_channel] = i;
  178. config &= ~MCP3422_CHANNEL_MASK;
  179. config |= MCP3422_CHANNEL_VALUE(req_channel);
  180. config &= ~MCP3422_PGA_MASK;
  181. config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
  182. return mcp3422_update_config(adc, config);
  183. }
  184. }
  185. return -EINVAL;
  186. case IIO_CHAN_INFO_SAMP_FREQ:
  187. switch (val1) {
  188. case 240:
  189. temp = MCP3422_SRATE_240;
  190. break;
  191. case 60:
  192. temp = MCP3422_SRATE_60;
  193. break;
  194. case 15:
  195. temp = MCP3422_SRATE_15;
  196. break;
  197. case 3:
  198. if (adc->id > 4)
  199. return -EINVAL;
  200. temp = MCP3422_SRATE_3;
  201. break;
  202. default:
  203. return -EINVAL;
  204. }
  205. config &= ~MCP3422_CHANNEL_MASK;
  206. config |= MCP3422_CHANNEL_VALUE(req_channel);
  207. config &= ~MCP3422_SRATE_MASK;
  208. config |= MCP3422_SAMPLE_RATE_VALUE(temp);
  209. return mcp3422_update_config(adc, config);
  210. default:
  211. break;
  212. }
  213. return -EINVAL;
  214. }
  215. static int mcp3422_write_raw_get_fmt(struct iio_dev *indio_dev,
  216. struct iio_chan_spec const *chan, long mask)
  217. {
  218. switch (mask) {
  219. case IIO_CHAN_INFO_SCALE:
  220. return IIO_VAL_INT_PLUS_NANO;
  221. case IIO_CHAN_INFO_SAMP_FREQ:
  222. return IIO_VAL_INT_PLUS_MICRO;
  223. default:
  224. return -EINVAL;
  225. }
  226. }
  227. static ssize_t mcp3422_show_samp_freqs(struct device *dev,
  228. struct device_attribute *attr, char *buf)
  229. {
  230. struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
  231. if (adc->id > 4)
  232. return sprintf(buf, "240 60 15\n");
  233. return sprintf(buf, "240 60 15 3\n");
  234. }
  235. static ssize_t mcp3422_show_scales(struct device *dev,
  236. struct device_attribute *attr, char *buf)
  237. {
  238. struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
  239. u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
  240. return sprintf(buf, "0.%09u 0.%09u 0.%09u 0.%09u\n",
  241. mcp3422_scales[sample_rate][0],
  242. mcp3422_scales[sample_rate][1],
  243. mcp3422_scales[sample_rate][2],
  244. mcp3422_scales[sample_rate][3]);
  245. }
  246. static IIO_DEVICE_ATTR(sampling_frequency_available, S_IRUGO,
  247. mcp3422_show_samp_freqs, NULL, 0);
  248. static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO,
  249. mcp3422_show_scales, NULL, 0);
  250. static struct attribute *mcp3422_attributes[] = {
  251. &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
  252. &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
  253. NULL,
  254. };
  255. static const struct attribute_group mcp3422_attribute_group = {
  256. .attrs = mcp3422_attributes,
  257. };
  258. static const struct iio_chan_spec mcp3421_channels[] = {
  259. MCP3422_CHAN(0),
  260. };
  261. static const struct iio_chan_spec mcp3422_channels[] = {
  262. MCP3422_CHAN(0),
  263. MCP3422_CHAN(1),
  264. };
  265. static const struct iio_chan_spec mcp3424_channels[] = {
  266. MCP3422_CHAN(0),
  267. MCP3422_CHAN(1),
  268. MCP3422_CHAN(2),
  269. MCP3422_CHAN(3),
  270. };
  271. static const struct iio_info mcp3422_info = {
  272. .read_raw = mcp3422_read_raw,
  273. .write_raw = mcp3422_write_raw,
  274. .write_raw_get_fmt = mcp3422_write_raw_get_fmt,
  275. .attrs = &mcp3422_attribute_group,
  276. };
  277. static int mcp3422_probe(struct i2c_client *client,
  278. const struct i2c_device_id *id)
  279. {
  280. struct iio_dev *indio_dev;
  281. struct mcp3422 *adc;
  282. int err;
  283. u8 config;
  284. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  285. return -EOPNOTSUPP;
  286. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adc));
  287. if (!indio_dev)
  288. return -ENOMEM;
  289. adc = iio_priv(indio_dev);
  290. adc->i2c = client;
  291. adc->id = (u8)(id->driver_data);
  292. mutex_init(&adc->lock);
  293. indio_dev->name = dev_name(&client->dev);
  294. indio_dev->modes = INDIO_DIRECT_MODE;
  295. indio_dev->info = &mcp3422_info;
  296. switch (adc->id) {
  297. case 1:
  298. case 5:
  299. indio_dev->channels = mcp3421_channels;
  300. indio_dev->num_channels = ARRAY_SIZE(mcp3421_channels);
  301. break;
  302. case 2:
  303. case 3:
  304. case 6:
  305. case 7:
  306. indio_dev->channels = mcp3422_channels;
  307. indio_dev->num_channels = ARRAY_SIZE(mcp3422_channels);
  308. break;
  309. case 4:
  310. case 8:
  311. indio_dev->channels = mcp3424_channels;
  312. indio_dev->num_channels = ARRAY_SIZE(mcp3424_channels);
  313. break;
  314. }
  315. /* meaningful default configuration */
  316. config = (MCP3422_CONT_SAMPLING
  317. | MCP3422_CHANNEL_VALUE(0)
  318. | MCP3422_PGA_VALUE(MCP3422_PGA_1)
  319. | MCP3422_SAMPLE_RATE_VALUE(MCP3422_SRATE_240));
  320. err = mcp3422_update_config(adc, config);
  321. if (err < 0)
  322. return err;
  323. err = devm_iio_device_register(&client->dev, indio_dev);
  324. if (err < 0)
  325. return err;
  326. i2c_set_clientdata(client, indio_dev);
  327. return 0;
  328. }
  329. static const struct i2c_device_id mcp3422_id[] = {
  330. { "mcp3421", 1 },
  331. { "mcp3422", 2 },
  332. { "mcp3423", 3 },
  333. { "mcp3424", 4 },
  334. { "mcp3425", 5 },
  335. { "mcp3426", 6 },
  336. { "mcp3427", 7 },
  337. { "mcp3428", 8 },
  338. { }
  339. };
  340. MODULE_DEVICE_TABLE(i2c, mcp3422_id);
  341. static const struct of_device_id mcp3422_of_match[] = {
  342. { .compatible = "mcp3422" },
  343. { }
  344. };
  345. MODULE_DEVICE_TABLE(of, mcp3422_of_match);
  346. static struct i2c_driver mcp3422_driver = {
  347. .driver = {
  348. .name = "mcp3422",
  349. .of_match_table = mcp3422_of_match,
  350. },
  351. .probe = mcp3422_probe,
  352. .id_table = mcp3422_id,
  353. };
  354. module_i2c_driver(mcp3422_driver);
  355. MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
  356. MODULE_DESCRIPTION("Microchip mcp3421/2/3/4/5/6/7/8 driver");
  357. MODULE_LICENSE("GPL v2");