lpc18xx_adc.c 5.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * IIO ADC driver for NXP LPC18xx ADC
  4. *
  5. * Copyright (C) 2016 Joachim Eastwood <manabian@gmail.com>
  6. *
  7. * UNSUPPORTED hardware features:
  8. * - Hardware triggers
  9. * - Burst mode
  10. * - Interrupts
  11. * - DMA
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/err.h>
  15. #include <linux/iio/iio.h>
  16. #include <linux/iio/driver.h>
  17. #include <linux/io.h>
  18. #include <linux/iopoll.h>
  19. #include <linux/module.h>
  20. #include <linux/mutex.h>
  21. #include <linux/of.h>
  22. #include <linux/of_device.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/regulator/consumer.h>
  25. /* LPC18XX ADC registers and bits */
  26. #define LPC18XX_ADC_CR 0x000
  27. #define LPC18XX_ADC_CR_CLKDIV_SHIFT 8
  28. #define LPC18XX_ADC_CR_PDN BIT(21)
  29. #define LPC18XX_ADC_CR_START_NOW (0x1 << 24)
  30. #define LPC18XX_ADC_GDR 0x004
  31. /* Data register bits */
  32. #define LPC18XX_ADC_SAMPLE_SHIFT 6
  33. #define LPC18XX_ADC_SAMPLE_MASK 0x3ff
  34. #define LPC18XX_ADC_CONV_DONE BIT(31)
  35. /* Clock should be 4.5 MHz or less */
  36. #define LPC18XX_ADC_CLK_TARGET 4500000
  37. struct lpc18xx_adc {
  38. struct regulator *vref;
  39. void __iomem *base;
  40. struct device *dev;
  41. struct mutex lock;
  42. struct clk *clk;
  43. u32 cr_reg;
  44. };
  45. #define LPC18XX_ADC_CHAN(_idx) { \
  46. .type = IIO_VOLTAGE, \
  47. .indexed = 1, \
  48. .channel = _idx, \
  49. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  50. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  51. }
  52. static const struct iio_chan_spec lpc18xx_adc_iio_channels[] = {
  53. LPC18XX_ADC_CHAN(0),
  54. LPC18XX_ADC_CHAN(1),
  55. LPC18XX_ADC_CHAN(2),
  56. LPC18XX_ADC_CHAN(3),
  57. LPC18XX_ADC_CHAN(4),
  58. LPC18XX_ADC_CHAN(5),
  59. LPC18XX_ADC_CHAN(6),
  60. LPC18XX_ADC_CHAN(7),
  61. };
  62. static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch)
  63. {
  64. int ret;
  65. u32 reg;
  66. reg = adc->cr_reg | BIT(ch) | LPC18XX_ADC_CR_START_NOW;
  67. writel(reg, adc->base + LPC18XX_ADC_CR);
  68. ret = readl_poll_timeout(adc->base + LPC18XX_ADC_GDR, reg,
  69. reg & LPC18XX_ADC_CONV_DONE, 3, 9);
  70. if (ret) {
  71. dev_warn(adc->dev, "adc read timed out\n");
  72. return ret;
  73. }
  74. return (reg >> LPC18XX_ADC_SAMPLE_SHIFT) & LPC18XX_ADC_SAMPLE_MASK;
  75. }
  76. static int lpc18xx_adc_read_raw(struct iio_dev *indio_dev,
  77. struct iio_chan_spec const *chan,
  78. int *val, int *val2, long mask)
  79. {
  80. struct lpc18xx_adc *adc = iio_priv(indio_dev);
  81. switch (mask) {
  82. case IIO_CHAN_INFO_RAW:
  83. mutex_lock(&adc->lock);
  84. *val = lpc18xx_adc_read_chan(adc, chan->channel);
  85. mutex_unlock(&adc->lock);
  86. if (*val < 0)
  87. return *val;
  88. return IIO_VAL_INT;
  89. case IIO_CHAN_INFO_SCALE:
  90. *val = regulator_get_voltage(adc->vref) / 1000;
  91. *val2 = 10;
  92. return IIO_VAL_FRACTIONAL_LOG2;
  93. }
  94. return -EINVAL;
  95. }
  96. static const struct iio_info lpc18xx_adc_info = {
  97. .read_raw = lpc18xx_adc_read_raw,
  98. };
  99. static int lpc18xx_adc_probe(struct platform_device *pdev)
  100. {
  101. struct iio_dev *indio_dev;
  102. struct lpc18xx_adc *adc;
  103. unsigned int clkdiv;
  104. unsigned long rate;
  105. int ret;
  106. indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*adc));
  107. if (!indio_dev)
  108. return -ENOMEM;
  109. platform_set_drvdata(pdev, indio_dev);
  110. adc = iio_priv(indio_dev);
  111. adc->dev = &pdev->dev;
  112. mutex_init(&adc->lock);
  113. adc->base = devm_platform_ioremap_resource(pdev, 0);
  114. if (IS_ERR(adc->base))
  115. return PTR_ERR(adc->base);
  116. adc->clk = devm_clk_get(&pdev->dev, NULL);
  117. if (IS_ERR(adc->clk)) {
  118. dev_err(&pdev->dev, "error getting clock\n");
  119. return PTR_ERR(adc->clk);
  120. }
  121. rate = clk_get_rate(adc->clk);
  122. clkdiv = DIV_ROUND_UP(rate, LPC18XX_ADC_CLK_TARGET);
  123. adc->vref = devm_regulator_get(&pdev->dev, "vref");
  124. if (IS_ERR(adc->vref)) {
  125. dev_err(&pdev->dev, "error getting regulator\n");
  126. return PTR_ERR(adc->vref);
  127. }
  128. indio_dev->name = dev_name(&pdev->dev);
  129. indio_dev->info = &lpc18xx_adc_info;
  130. indio_dev->modes = INDIO_DIRECT_MODE;
  131. indio_dev->channels = lpc18xx_adc_iio_channels;
  132. indio_dev->num_channels = ARRAY_SIZE(lpc18xx_adc_iio_channels);
  133. ret = regulator_enable(adc->vref);
  134. if (ret) {
  135. dev_err(&pdev->dev, "unable to enable regulator\n");
  136. return ret;
  137. }
  138. ret = clk_prepare_enable(adc->clk);
  139. if (ret) {
  140. dev_err(&pdev->dev, "unable to enable clock\n");
  141. goto dis_reg;
  142. }
  143. adc->cr_reg = (clkdiv << LPC18XX_ADC_CR_CLKDIV_SHIFT) |
  144. LPC18XX_ADC_CR_PDN;
  145. writel(adc->cr_reg, adc->base + LPC18XX_ADC_CR);
  146. ret = iio_device_register(indio_dev);
  147. if (ret) {
  148. dev_err(&pdev->dev, "unable to register device\n");
  149. goto dis_clk;
  150. }
  151. return 0;
  152. dis_clk:
  153. writel(0, adc->base + LPC18XX_ADC_CR);
  154. clk_disable_unprepare(adc->clk);
  155. dis_reg:
  156. regulator_disable(adc->vref);
  157. return ret;
  158. }
  159. static int lpc18xx_adc_remove(struct platform_device *pdev)
  160. {
  161. struct iio_dev *indio_dev = platform_get_drvdata(pdev);
  162. struct lpc18xx_adc *adc = iio_priv(indio_dev);
  163. iio_device_unregister(indio_dev);
  164. writel(0, adc->base + LPC18XX_ADC_CR);
  165. clk_disable_unprepare(adc->clk);
  166. regulator_disable(adc->vref);
  167. return 0;
  168. }
  169. static const struct of_device_id lpc18xx_adc_match[] = {
  170. { .compatible = "nxp,lpc1850-adc" },
  171. { /* sentinel */ }
  172. };
  173. MODULE_DEVICE_TABLE(of, lpc18xx_adc_match);
  174. static struct platform_driver lpc18xx_adc_driver = {
  175. .probe = lpc18xx_adc_probe,
  176. .remove = lpc18xx_adc_remove,
  177. .driver = {
  178. .name = "lpc18xx-adc",
  179. .of_match_table = lpc18xx_adc_match,
  180. },
  181. };
  182. module_platform_driver(lpc18xx_adc_driver);
  183. MODULE_DESCRIPTION("LPC18xx ADC driver");
  184. MODULE_AUTHOR("Joachim Eastwood <manabian@gmail.com>");
  185. MODULE_LICENSE("GPL v2");