ad7923.c 10 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * AD7904/AD7914/AD7923/AD7924/AD7908/AD7918/AD7928 SPI ADC driver
  4. *
  5. * Copyright 2011 Analog Devices Inc (from AD7923 Driver)
  6. * Copyright 2012 CS Systemes d'Information
  7. */
  8. #include <linux/device.h>
  9. #include <linux/kernel.h>
  10. #include <linux/slab.h>
  11. #include <linux/sysfs.h>
  12. #include <linux/spi/spi.h>
  13. #include <linux/regulator/consumer.h>
  14. #include <linux/err.h>
  15. #include <linux/delay.h>
  16. #include <linux/module.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/iio/iio.h>
  19. #include <linux/iio/sysfs.h>
  20. #include <linux/iio/buffer.h>
  21. #include <linux/iio/trigger_consumer.h>
  22. #include <linux/iio/triggered_buffer.h>
  23. #define AD7923_WRITE_CR BIT(11) /* write control register */
  24. #define AD7923_RANGE BIT(1) /* range to REFin */
  25. #define AD7923_CODING BIT(0) /* coding is straight binary */
  26. #define AD7923_PM_MODE_AS (1) /* auto shutdown */
  27. #define AD7923_PM_MODE_FS (2) /* full shutdown */
  28. #define AD7923_PM_MODE_OPS (3) /* normal operation */
  29. #define AD7923_SEQUENCE_OFF (0) /* no sequence fonction */
  30. #define AD7923_SEQUENCE_PROTECT (2) /* no interrupt write cycle */
  31. #define AD7923_SEQUENCE_ON (3) /* continuous sequence */
  32. #define AD7923_PM_MODE_WRITE(mode) ((mode) << 4) /* write mode */
  33. #define AD7923_CHANNEL_WRITE(channel) ((channel) << 6) /* write channel */
  34. #define AD7923_SEQUENCE_WRITE(sequence) ((((sequence) & 1) << 3) \
  35. + (((sequence) & 2) << 9))
  36. /* write sequence fonction */
  37. /* left shift for CR : bit 11 transmit in first */
  38. #define AD7923_SHIFT_REGISTER 4
  39. /* val = value, dec = left shift, bits = number of bits of the mask */
  40. #define EXTRACT(val, dec, bits) (((val) >> (dec)) & ((1 << (bits)) - 1))
  41. struct ad7923_state {
  42. struct spi_device *spi;
  43. struct spi_transfer ring_xfer[5];
  44. struct spi_transfer scan_single_xfer[2];
  45. struct spi_message ring_msg;
  46. struct spi_message scan_single_msg;
  47. struct regulator *reg;
  48. unsigned int settings;
  49. /*
  50. * DMA (thus cache coherency maintenance) requires the
  51. * transfer buffers to live in their own cache lines.
  52. * Ensure rx_buf can be directly used in iio_push_to_buffers_with_timetamp
  53. * Length = 8 channels + 4 extra for 8 byte timestamp
  54. */
  55. __be16 rx_buf[12] ____cacheline_aligned;
  56. __be16 tx_buf[4];
  57. };
  58. struct ad7923_chip_info {
  59. const struct iio_chan_spec *channels;
  60. unsigned int num_channels;
  61. };
  62. enum ad7923_id {
  63. AD7904,
  64. AD7914,
  65. AD7924,
  66. AD7908,
  67. AD7918,
  68. AD7928
  69. };
  70. #define AD7923_V_CHAN(index, bits) \
  71. { \
  72. .type = IIO_VOLTAGE, \
  73. .indexed = 1, \
  74. .channel = index, \
  75. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  76. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  77. .address = index, \
  78. .scan_index = index, \
  79. .scan_type = { \
  80. .sign = 'u', \
  81. .realbits = (bits), \
  82. .storagebits = 16, \
  83. .endianness = IIO_BE, \
  84. }, \
  85. }
  86. #define DECLARE_AD7923_CHANNELS(name, bits) \
  87. const struct iio_chan_spec name ## _channels[] = { \
  88. AD7923_V_CHAN(0, bits), \
  89. AD7923_V_CHAN(1, bits), \
  90. AD7923_V_CHAN(2, bits), \
  91. AD7923_V_CHAN(3, bits), \
  92. IIO_CHAN_SOFT_TIMESTAMP(4), \
  93. }
  94. #define DECLARE_AD7908_CHANNELS(name, bits) \
  95. const struct iio_chan_spec name ## _channels[] = { \
  96. AD7923_V_CHAN(0, bits), \
  97. AD7923_V_CHAN(1, bits), \
  98. AD7923_V_CHAN(2, bits), \
  99. AD7923_V_CHAN(3, bits), \
  100. AD7923_V_CHAN(4, bits), \
  101. AD7923_V_CHAN(5, bits), \
  102. AD7923_V_CHAN(6, bits), \
  103. AD7923_V_CHAN(7, bits), \
  104. IIO_CHAN_SOFT_TIMESTAMP(8), \
  105. }
  106. static DECLARE_AD7923_CHANNELS(ad7904, 8);
  107. static DECLARE_AD7923_CHANNELS(ad7914, 10);
  108. static DECLARE_AD7923_CHANNELS(ad7924, 12);
  109. static DECLARE_AD7908_CHANNELS(ad7908, 8);
  110. static DECLARE_AD7908_CHANNELS(ad7918, 10);
  111. static DECLARE_AD7908_CHANNELS(ad7928, 12);
  112. static const struct ad7923_chip_info ad7923_chip_info[] = {
  113. [AD7904] = {
  114. .channels = ad7904_channels,
  115. .num_channels = ARRAY_SIZE(ad7904_channels),
  116. },
  117. [AD7914] = {
  118. .channels = ad7914_channels,
  119. .num_channels = ARRAY_SIZE(ad7914_channels),
  120. },
  121. [AD7924] = {
  122. .channels = ad7924_channels,
  123. .num_channels = ARRAY_SIZE(ad7924_channels),
  124. },
  125. [AD7908] = {
  126. .channels = ad7908_channels,
  127. .num_channels = ARRAY_SIZE(ad7908_channels),
  128. },
  129. [AD7918] = {
  130. .channels = ad7918_channels,
  131. .num_channels = ARRAY_SIZE(ad7918_channels),
  132. },
  133. [AD7928] = {
  134. .channels = ad7928_channels,
  135. .num_channels = ARRAY_SIZE(ad7928_channels),
  136. },
  137. };
  138. /*
  139. * ad7923_update_scan_mode() setup the spi transfer buffer for the new scan mask
  140. */
  141. static int ad7923_update_scan_mode(struct iio_dev *indio_dev,
  142. const unsigned long *active_scan_mask)
  143. {
  144. struct ad7923_state *st = iio_priv(indio_dev);
  145. int i, cmd, len;
  146. len = 0;
  147. /*
  148. * For this driver the last channel is always the software timestamp so
  149. * skip that one.
  150. */
  151. for_each_set_bit(i, active_scan_mask, indio_dev->num_channels - 1) {
  152. cmd = AD7923_WRITE_CR | AD7923_CHANNEL_WRITE(i) |
  153. AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) |
  154. st->settings;
  155. cmd <<= AD7923_SHIFT_REGISTER;
  156. st->tx_buf[len++] = cpu_to_be16(cmd);
  157. }
  158. /* build spi ring message */
  159. st->ring_xfer[0].tx_buf = &st->tx_buf[0];
  160. st->ring_xfer[0].len = len;
  161. st->ring_xfer[0].cs_change = 1;
  162. spi_message_init(&st->ring_msg);
  163. spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
  164. for (i = 0; i < len; i++) {
  165. st->ring_xfer[i + 1].rx_buf = &st->rx_buf[i];
  166. st->ring_xfer[i + 1].len = 2;
  167. st->ring_xfer[i + 1].cs_change = 1;
  168. spi_message_add_tail(&st->ring_xfer[i + 1], &st->ring_msg);
  169. }
  170. /* make sure last transfer cs_change is not set */
  171. st->ring_xfer[i + 1].cs_change = 0;
  172. return 0;
  173. }
  174. /*
  175. * ad7923_trigger_handler() bh of trigger launched polling to ring buffer
  176. *
  177. * Currently there is no option in this driver to disable the saving of
  178. * timestamps within the ring.
  179. */
  180. static irqreturn_t ad7923_trigger_handler(int irq, void *p)
  181. {
  182. struct iio_poll_func *pf = p;
  183. struct iio_dev *indio_dev = pf->indio_dev;
  184. struct ad7923_state *st = iio_priv(indio_dev);
  185. int b_sent;
  186. b_sent = spi_sync(st->spi, &st->ring_msg);
  187. if (b_sent)
  188. goto done;
  189. iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
  190. iio_get_time_ns(indio_dev));
  191. done:
  192. iio_trigger_notify_done(indio_dev->trig);
  193. return IRQ_HANDLED;
  194. }
  195. static int ad7923_scan_direct(struct ad7923_state *st, unsigned int ch)
  196. {
  197. int ret, cmd;
  198. cmd = AD7923_WRITE_CR | AD7923_CHANNEL_WRITE(ch) |
  199. AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) |
  200. st->settings;
  201. cmd <<= AD7923_SHIFT_REGISTER;
  202. st->tx_buf[0] = cpu_to_be16(cmd);
  203. ret = spi_sync(st->spi, &st->scan_single_msg);
  204. if (ret)
  205. return ret;
  206. return be16_to_cpu(st->rx_buf[0]);
  207. }
  208. static int ad7923_get_range(struct ad7923_state *st)
  209. {
  210. int vref;
  211. vref = regulator_get_voltage(st->reg);
  212. if (vref < 0)
  213. return vref;
  214. vref /= 1000;
  215. if (!(st->settings & AD7923_RANGE))
  216. vref *= 2;
  217. return vref;
  218. }
  219. static int ad7923_read_raw(struct iio_dev *indio_dev,
  220. struct iio_chan_spec const *chan,
  221. int *val,
  222. int *val2,
  223. long m)
  224. {
  225. int ret;
  226. struct ad7923_state *st = iio_priv(indio_dev);
  227. switch (m) {
  228. case IIO_CHAN_INFO_RAW:
  229. ret = iio_device_claim_direct_mode(indio_dev);
  230. if (ret)
  231. return ret;
  232. ret = ad7923_scan_direct(st, chan->address);
  233. iio_device_release_direct_mode(indio_dev);
  234. if (ret < 0)
  235. return ret;
  236. if (chan->address == EXTRACT(ret, 12, 4))
  237. *val = EXTRACT(ret, 0, 12);
  238. else
  239. return -EIO;
  240. return IIO_VAL_INT;
  241. case IIO_CHAN_INFO_SCALE:
  242. ret = ad7923_get_range(st);
  243. if (ret < 0)
  244. return ret;
  245. *val = ret;
  246. *val2 = chan->scan_type.realbits;
  247. return IIO_VAL_FRACTIONAL_LOG2;
  248. }
  249. return -EINVAL;
  250. }
  251. static const struct iio_info ad7923_info = {
  252. .read_raw = &ad7923_read_raw,
  253. .update_scan_mode = ad7923_update_scan_mode,
  254. };
  255. static int ad7923_probe(struct spi_device *spi)
  256. {
  257. struct ad7923_state *st;
  258. struct iio_dev *indio_dev;
  259. const struct ad7923_chip_info *info;
  260. int ret;
  261. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  262. if (!indio_dev)
  263. return -ENOMEM;
  264. st = iio_priv(indio_dev);
  265. spi_set_drvdata(spi, indio_dev);
  266. st->spi = spi;
  267. st->settings = AD7923_CODING | AD7923_RANGE |
  268. AD7923_PM_MODE_WRITE(AD7923_PM_MODE_OPS);
  269. info = &ad7923_chip_info[spi_get_device_id(spi)->driver_data];
  270. indio_dev->name = spi_get_device_id(spi)->name;
  271. indio_dev->modes = INDIO_DIRECT_MODE;
  272. indio_dev->channels = info->channels;
  273. indio_dev->num_channels = info->num_channels;
  274. indio_dev->info = &ad7923_info;
  275. /* Setup default message */
  276. st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
  277. st->scan_single_xfer[0].len = 2;
  278. st->scan_single_xfer[0].cs_change = 1;
  279. st->scan_single_xfer[1].rx_buf = &st->rx_buf[0];
  280. st->scan_single_xfer[1].len = 2;
  281. spi_message_init(&st->scan_single_msg);
  282. spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg);
  283. spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg);
  284. st->reg = devm_regulator_get(&spi->dev, "refin");
  285. if (IS_ERR(st->reg))
  286. return PTR_ERR(st->reg);
  287. ret = regulator_enable(st->reg);
  288. if (ret)
  289. return ret;
  290. ret = iio_triggered_buffer_setup(indio_dev, NULL,
  291. &ad7923_trigger_handler, NULL);
  292. if (ret)
  293. goto error_disable_reg;
  294. ret = iio_device_register(indio_dev);
  295. if (ret)
  296. goto error_cleanup_ring;
  297. return 0;
  298. error_cleanup_ring:
  299. iio_triggered_buffer_cleanup(indio_dev);
  300. error_disable_reg:
  301. regulator_disable(st->reg);
  302. return ret;
  303. }
  304. static int ad7923_remove(struct spi_device *spi)
  305. {
  306. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  307. struct ad7923_state *st = iio_priv(indio_dev);
  308. iio_device_unregister(indio_dev);
  309. iio_triggered_buffer_cleanup(indio_dev);
  310. regulator_disable(st->reg);
  311. return 0;
  312. }
  313. static const struct spi_device_id ad7923_id[] = {
  314. {"ad7904", AD7904},
  315. {"ad7914", AD7914},
  316. {"ad7923", AD7924},
  317. {"ad7924", AD7924},
  318. {"ad7908", AD7908},
  319. {"ad7918", AD7918},
  320. {"ad7928", AD7928},
  321. {}
  322. };
  323. MODULE_DEVICE_TABLE(spi, ad7923_id);
  324. static const struct of_device_id ad7923_of_match[] = {
  325. { .compatible = "adi,ad7904", },
  326. { .compatible = "adi,ad7914", },
  327. { .compatible = "adi,ad7923", },
  328. { .compatible = "adi,ad7924", },
  329. { .compatible = "adi,ad7908", },
  330. { .compatible = "adi,ad7918", },
  331. { .compatible = "adi,ad7928", },
  332. { },
  333. };
  334. MODULE_DEVICE_TABLE(of, ad7923_of_match);
  335. static struct spi_driver ad7923_driver = {
  336. .driver = {
  337. .name = "ad7923",
  338. .of_match_table = ad7923_of_match,
  339. },
  340. .probe = ad7923_probe,
  341. .remove = ad7923_remove,
  342. .id_table = ad7923_id,
  343. };
  344. module_spi_driver(ad7923_driver);
  345. MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
  346. MODULE_AUTHOR("Patrick Vasseur <patrick.vasseur@c-s.fr>");
  347. MODULE_DESCRIPTION("Analog Devices AD7923 and similar ADC");
  348. MODULE_LICENSE("GPL v2");