ad7766.c 7.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * AD7766/AD7767 SPI ADC driver
  4. *
  5. * Copyright 2016 Analog Devices Inc.
  6. */
  7. #include <linux/clk.h>
  8. #include <linux/delay.h>
  9. #include <linux/device.h>
  10. #include <linux/err.h>
  11. #include <linux/gpio/consumer.h>
  12. #include <linux/module.h>
  13. #include <linux/regulator/consumer.h>
  14. #include <linux/slab.h>
  15. #include <linux/spi/spi.h>
  16. #include <linux/iio/iio.h>
  17. #include <linux/iio/buffer.h>
  18. #include <linux/iio/trigger.h>
  19. #include <linux/iio/trigger_consumer.h>
  20. #include <linux/iio/triggered_buffer.h>
  21. struct ad7766_chip_info {
  22. unsigned int decimation_factor;
  23. };
  24. enum {
  25. AD7766_SUPPLY_AVDD = 0,
  26. AD7766_SUPPLY_DVDD = 1,
  27. AD7766_SUPPLY_VREF = 2,
  28. AD7766_NUM_SUPPLIES = 3
  29. };
  30. struct ad7766 {
  31. const struct ad7766_chip_info *chip_info;
  32. struct spi_device *spi;
  33. struct clk *mclk;
  34. struct gpio_desc *pd_gpio;
  35. struct regulator_bulk_data reg[AD7766_NUM_SUPPLIES];
  36. struct iio_trigger *trig;
  37. struct spi_transfer xfer;
  38. struct spi_message msg;
  39. /*
  40. * DMA (thus cache coherency maintenance) requires the
  41. * transfer buffers to live in their own cache lines.
  42. * Make the buffer large enough for one 24 bit sample and one 64 bit
  43. * aligned 64 bit timestamp.
  44. */
  45. unsigned char data[ALIGN(3, sizeof(s64)) + sizeof(s64)]
  46. ____cacheline_aligned;
  47. };
  48. /*
  49. * AD7766 and AD7767 variations are interface compatible, the main difference is
  50. * analog performance. Both parts will use the same ID.
  51. */
  52. enum ad7766_device_ids {
  53. ID_AD7766,
  54. ID_AD7766_1,
  55. ID_AD7766_2,
  56. };
  57. static irqreturn_t ad7766_trigger_handler(int irq, void *p)
  58. {
  59. struct iio_poll_func *pf = p;
  60. struct iio_dev *indio_dev = pf->indio_dev;
  61. struct ad7766 *ad7766 = iio_priv(indio_dev);
  62. int ret;
  63. ret = spi_sync(ad7766->spi, &ad7766->msg);
  64. if (ret < 0)
  65. goto done;
  66. iio_push_to_buffers_with_timestamp(indio_dev, ad7766->data,
  67. pf->timestamp);
  68. done:
  69. iio_trigger_notify_done(indio_dev->trig);
  70. return IRQ_HANDLED;
  71. }
  72. static int ad7766_preenable(struct iio_dev *indio_dev)
  73. {
  74. struct ad7766 *ad7766 = iio_priv(indio_dev);
  75. int ret;
  76. ret = regulator_bulk_enable(ARRAY_SIZE(ad7766->reg), ad7766->reg);
  77. if (ret < 0) {
  78. dev_err(&ad7766->spi->dev, "Failed to enable supplies: %d\n",
  79. ret);
  80. return ret;
  81. }
  82. ret = clk_prepare_enable(ad7766->mclk);
  83. if (ret < 0) {
  84. dev_err(&ad7766->spi->dev, "Failed to enable MCLK: %d\n", ret);
  85. regulator_bulk_disable(ARRAY_SIZE(ad7766->reg), ad7766->reg);
  86. return ret;
  87. }
  88. gpiod_set_value(ad7766->pd_gpio, 0);
  89. return 0;
  90. }
  91. static int ad7766_postdisable(struct iio_dev *indio_dev)
  92. {
  93. struct ad7766 *ad7766 = iio_priv(indio_dev);
  94. gpiod_set_value(ad7766->pd_gpio, 1);
  95. /*
  96. * The PD pin is synchronous to the clock, so give it some time to
  97. * notice the change before we disable the clock.
  98. */
  99. msleep(20);
  100. clk_disable_unprepare(ad7766->mclk);
  101. regulator_bulk_disable(ARRAY_SIZE(ad7766->reg), ad7766->reg);
  102. return 0;
  103. }
  104. static int ad7766_read_raw(struct iio_dev *indio_dev,
  105. const struct iio_chan_spec *chan, int *val, int *val2, long info)
  106. {
  107. struct ad7766 *ad7766 = iio_priv(indio_dev);
  108. struct regulator *vref = ad7766->reg[AD7766_SUPPLY_VREF].consumer;
  109. int scale_uv;
  110. switch (info) {
  111. case IIO_CHAN_INFO_SCALE:
  112. scale_uv = regulator_get_voltage(vref);
  113. if (scale_uv < 0)
  114. return scale_uv;
  115. *val = scale_uv / 1000;
  116. *val2 = chan->scan_type.realbits;
  117. return IIO_VAL_FRACTIONAL_LOG2;
  118. case IIO_CHAN_INFO_SAMP_FREQ:
  119. *val = clk_get_rate(ad7766->mclk) /
  120. ad7766->chip_info->decimation_factor;
  121. return IIO_VAL_INT;
  122. }
  123. return -EINVAL;
  124. }
  125. static const struct iio_chan_spec ad7766_channels[] = {
  126. {
  127. .type = IIO_VOLTAGE,
  128. .indexed = 1,
  129. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
  130. .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
  131. .scan_type = {
  132. .sign = 's',
  133. .realbits = 24,
  134. .storagebits = 32,
  135. .endianness = IIO_BE,
  136. },
  137. },
  138. IIO_CHAN_SOFT_TIMESTAMP(1),
  139. };
  140. static const struct ad7766_chip_info ad7766_chip_info[] = {
  141. [ID_AD7766] = {
  142. .decimation_factor = 8,
  143. },
  144. [ID_AD7766_1] = {
  145. .decimation_factor = 16,
  146. },
  147. [ID_AD7766_2] = {
  148. .decimation_factor = 32,
  149. },
  150. };
  151. static const struct iio_buffer_setup_ops ad7766_buffer_setup_ops = {
  152. .preenable = &ad7766_preenable,
  153. .postdisable = &ad7766_postdisable,
  154. };
  155. static const struct iio_info ad7766_info = {
  156. .read_raw = &ad7766_read_raw,
  157. };
  158. static irqreturn_t ad7766_irq(int irq, void *private)
  159. {
  160. iio_trigger_poll(private);
  161. return IRQ_HANDLED;
  162. }
  163. static int ad7766_set_trigger_state(struct iio_trigger *trig, bool enable)
  164. {
  165. struct ad7766 *ad7766 = iio_trigger_get_drvdata(trig);
  166. if (enable)
  167. enable_irq(ad7766->spi->irq);
  168. else
  169. disable_irq(ad7766->spi->irq);
  170. return 0;
  171. }
  172. static const struct iio_trigger_ops ad7766_trigger_ops = {
  173. .set_trigger_state = ad7766_set_trigger_state,
  174. .validate_device = iio_trigger_validate_own_device,
  175. };
  176. static int ad7766_probe(struct spi_device *spi)
  177. {
  178. const struct spi_device_id *id = spi_get_device_id(spi);
  179. struct iio_dev *indio_dev;
  180. struct ad7766 *ad7766;
  181. int ret;
  182. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*ad7766));
  183. if (!indio_dev)
  184. return -ENOMEM;
  185. ad7766 = iio_priv(indio_dev);
  186. ad7766->chip_info = &ad7766_chip_info[id->driver_data];
  187. ad7766->mclk = devm_clk_get(&spi->dev, "mclk");
  188. if (IS_ERR(ad7766->mclk))
  189. return PTR_ERR(ad7766->mclk);
  190. ad7766->reg[AD7766_SUPPLY_AVDD].supply = "avdd";
  191. ad7766->reg[AD7766_SUPPLY_DVDD].supply = "dvdd";
  192. ad7766->reg[AD7766_SUPPLY_VREF].supply = "vref";
  193. ret = devm_regulator_bulk_get(&spi->dev, ARRAY_SIZE(ad7766->reg),
  194. ad7766->reg);
  195. if (ret)
  196. return ret;
  197. ad7766->pd_gpio = devm_gpiod_get_optional(&spi->dev, "powerdown",
  198. GPIOD_OUT_HIGH);
  199. if (IS_ERR(ad7766->pd_gpio))
  200. return PTR_ERR(ad7766->pd_gpio);
  201. indio_dev->name = spi_get_device_id(spi)->name;
  202. indio_dev->modes = INDIO_DIRECT_MODE;
  203. indio_dev->channels = ad7766_channels;
  204. indio_dev->num_channels = ARRAY_SIZE(ad7766_channels);
  205. indio_dev->info = &ad7766_info;
  206. if (spi->irq > 0) {
  207. ad7766->trig = devm_iio_trigger_alloc(&spi->dev, "%s-dev%d",
  208. indio_dev->name, indio_dev->id);
  209. if (!ad7766->trig)
  210. return -ENOMEM;
  211. ad7766->trig->ops = &ad7766_trigger_ops;
  212. ad7766->trig->dev.parent = &spi->dev;
  213. iio_trigger_set_drvdata(ad7766->trig, ad7766);
  214. ret = devm_request_irq(&spi->dev, spi->irq, ad7766_irq,
  215. IRQF_TRIGGER_FALLING, dev_name(&spi->dev),
  216. ad7766->trig);
  217. if (ret < 0)
  218. return ret;
  219. /*
  220. * The device generates interrupts as long as it is powered up.
  221. * Some platforms might not allow the option to power it down so
  222. * disable the interrupt to avoid extra load on the system
  223. */
  224. disable_irq(spi->irq);
  225. ret = devm_iio_trigger_register(&spi->dev, ad7766->trig);
  226. if (ret)
  227. return ret;
  228. }
  229. spi_set_drvdata(spi, indio_dev);
  230. ad7766->spi = spi;
  231. /* First byte always 0 */
  232. ad7766->xfer.rx_buf = &ad7766->data[1];
  233. ad7766->xfer.len = 3;
  234. spi_message_init(&ad7766->msg);
  235. spi_message_add_tail(&ad7766->xfer, &ad7766->msg);
  236. ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
  237. &iio_pollfunc_store_time, &ad7766_trigger_handler,
  238. &ad7766_buffer_setup_ops);
  239. if (ret)
  240. return ret;
  241. ret = devm_iio_device_register(&spi->dev, indio_dev);
  242. if (ret)
  243. return ret;
  244. return 0;
  245. }
  246. static const struct spi_device_id ad7766_id[] = {
  247. {"ad7766", ID_AD7766},
  248. {"ad7766-1", ID_AD7766_1},
  249. {"ad7766-2", ID_AD7766_2},
  250. {"ad7767", ID_AD7766},
  251. {"ad7767-1", ID_AD7766_1},
  252. {"ad7767-2", ID_AD7766_2},
  253. {}
  254. };
  255. MODULE_DEVICE_TABLE(spi, ad7766_id);
  256. static struct spi_driver ad7766_driver = {
  257. .driver = {
  258. .name = "ad7766",
  259. },
  260. .probe = ad7766_probe,
  261. .id_table = ad7766_id,
  262. };
  263. module_spi_driver(ad7766_driver);
  264. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  265. MODULE_DESCRIPTION("Analog Devices AD7766 and AD7767 ADCs driver support");
  266. MODULE_LICENSE("GPL v2");