ad7606.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * AD7606 SPI ADC driver
  4. *
  5. * Copyright 2011 Analog Devices Inc.
  6. */
  7. #include <linux/delay.h>
  8. #include <linux/device.h>
  9. #include <linux/err.h>
  10. #include <linux/gpio/consumer.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/regulator/consumer.h>
  15. #include <linux/sched.h>
  16. #include <linux/slab.h>
  17. #include <linux/sysfs.h>
  18. #include <linux/util_macros.h>
  19. #include <linux/iio/iio.h>
  20. #include <linux/iio/buffer.h>
  21. #include <linux/iio/sysfs.h>
  22. #include <linux/iio/trigger.h>
  23. #include <linux/iio/triggered_buffer.h>
  24. #include <linux/iio/trigger_consumer.h>
  25. #include "ad7606.h"
  26. /*
  27. * Scales are computed as 5000/32768 and 10000/32768 respectively,
  28. * so that when applied to the raw values they provide mV values
  29. */
  30. static const unsigned int ad7606_scale_avail[2] = {
  31. 152588, 305176
  32. };
  33. static const unsigned int ad7616_sw_scale_avail[3] = {
  34. 76293, 152588, 305176
  35. };
  36. static const unsigned int ad7606_oversampling_avail[7] = {
  37. 1, 2, 4, 8, 16, 32, 64,
  38. };
  39. static const unsigned int ad7616_oversampling_avail[8] = {
  40. 1, 2, 4, 8, 16, 32, 64, 128,
  41. };
  42. static int ad7606_reset(struct ad7606_state *st)
  43. {
  44. if (st->gpio_reset) {
  45. gpiod_set_value(st->gpio_reset, 1);
  46. ndelay(100); /* t_reset >= 100ns */
  47. gpiod_set_value(st->gpio_reset, 0);
  48. return 0;
  49. }
  50. return -ENODEV;
  51. }
  52. static int ad7606_reg_access(struct iio_dev *indio_dev,
  53. unsigned int reg,
  54. unsigned int writeval,
  55. unsigned int *readval)
  56. {
  57. struct ad7606_state *st = iio_priv(indio_dev);
  58. int ret;
  59. mutex_lock(&st->lock);
  60. if (readval) {
  61. ret = st->bops->reg_read(st, reg);
  62. if (ret < 0)
  63. goto err_unlock;
  64. *readval = ret;
  65. ret = 0;
  66. } else {
  67. ret = st->bops->reg_write(st, reg, writeval);
  68. }
  69. err_unlock:
  70. mutex_unlock(&st->lock);
  71. return ret;
  72. }
  73. static int ad7606_read_samples(struct ad7606_state *st)
  74. {
  75. unsigned int num = st->chip_info->num_channels - 1;
  76. u16 *data = st->data;
  77. int ret;
  78. /*
  79. * The frstdata signal is set to high while and after reading the sample
  80. * of the first channel and low for all other channels. This can be used
  81. * to check that the incoming data is correctly aligned. During normal
  82. * operation the data should never become unaligned, but some glitch or
  83. * electrostatic discharge might cause an extra read or clock cycle.
  84. * Monitoring the frstdata signal allows to recover from such failure
  85. * situations.
  86. */
  87. if (st->gpio_frstdata) {
  88. ret = st->bops->read_block(st->dev, 1, data);
  89. if (ret)
  90. return ret;
  91. if (!gpiod_get_value(st->gpio_frstdata)) {
  92. ad7606_reset(st);
  93. return -EIO;
  94. }
  95. data++;
  96. num--;
  97. }
  98. return st->bops->read_block(st->dev, num, data);
  99. }
  100. static irqreturn_t ad7606_trigger_handler(int irq, void *p)
  101. {
  102. struct iio_poll_func *pf = p;
  103. struct iio_dev *indio_dev = pf->indio_dev;
  104. struct ad7606_state *st = iio_priv(indio_dev);
  105. int ret;
  106. mutex_lock(&st->lock);
  107. ret = ad7606_read_samples(st);
  108. if (ret == 0)
  109. iio_push_to_buffers_with_timestamp(indio_dev, st->data,
  110. iio_get_time_ns(indio_dev));
  111. iio_trigger_notify_done(indio_dev->trig);
  112. /* The rising edge of the CONVST signal starts a new conversion. */
  113. gpiod_set_value(st->gpio_convst, 1);
  114. mutex_unlock(&st->lock);
  115. return IRQ_HANDLED;
  116. }
  117. static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch)
  118. {
  119. struct ad7606_state *st = iio_priv(indio_dev);
  120. int ret;
  121. gpiod_set_value(st->gpio_convst, 1);
  122. ret = wait_for_completion_timeout(&st->completion,
  123. msecs_to_jiffies(1000));
  124. if (!ret) {
  125. ret = -ETIMEDOUT;
  126. goto error_ret;
  127. }
  128. ret = ad7606_read_samples(st);
  129. if (ret == 0)
  130. ret = st->data[ch];
  131. error_ret:
  132. gpiod_set_value(st->gpio_convst, 0);
  133. return ret;
  134. }
  135. static int ad7606_read_raw(struct iio_dev *indio_dev,
  136. struct iio_chan_spec const *chan,
  137. int *val,
  138. int *val2,
  139. long m)
  140. {
  141. int ret, ch = 0;
  142. struct ad7606_state *st = iio_priv(indio_dev);
  143. switch (m) {
  144. case IIO_CHAN_INFO_RAW:
  145. ret = iio_device_claim_direct_mode(indio_dev);
  146. if (ret)
  147. return ret;
  148. ret = ad7606_scan_direct(indio_dev, chan->address);
  149. iio_device_release_direct_mode(indio_dev);
  150. if (ret < 0)
  151. return ret;
  152. *val = (short)ret;
  153. return IIO_VAL_INT;
  154. case IIO_CHAN_INFO_SCALE:
  155. if (st->sw_mode_en)
  156. ch = chan->address;
  157. *val = 0;
  158. *val2 = st->scale_avail[st->range[ch]];
  159. return IIO_VAL_INT_PLUS_MICRO;
  160. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  161. *val = st->oversampling;
  162. return IIO_VAL_INT;
  163. }
  164. return -EINVAL;
  165. }
  166. static ssize_t ad7606_show_avail(char *buf, const unsigned int *vals,
  167. unsigned int n, bool micros)
  168. {
  169. size_t len = 0;
  170. int i;
  171. for (i = 0; i < n; i++) {
  172. len += scnprintf(buf + len, PAGE_SIZE - len,
  173. micros ? "0.%06u " : "%u ", vals[i]);
  174. }
  175. buf[len - 1] = '\n';
  176. return len;
  177. }
  178. static ssize_t in_voltage_scale_available_show(struct device *dev,
  179. struct device_attribute *attr,
  180. char *buf)
  181. {
  182. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  183. struct ad7606_state *st = iio_priv(indio_dev);
  184. return ad7606_show_avail(buf, st->scale_avail, st->num_scales, true);
  185. }
  186. static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0);
  187. static int ad7606_write_scale_hw(struct iio_dev *indio_dev, int ch, int val)
  188. {
  189. struct ad7606_state *st = iio_priv(indio_dev);
  190. gpiod_set_value(st->gpio_range, val);
  191. return 0;
  192. }
  193. static int ad7606_write_os_hw(struct iio_dev *indio_dev, int val)
  194. {
  195. struct ad7606_state *st = iio_priv(indio_dev);
  196. DECLARE_BITMAP(values, 3);
  197. values[0] = val;
  198. gpiod_set_array_value(ARRAY_SIZE(values), st->gpio_os->desc,
  199. st->gpio_os->info, values);
  200. /* AD7616 requires a reset to update value */
  201. if (st->chip_info->os_req_reset)
  202. ad7606_reset(st);
  203. return 0;
  204. }
  205. static int ad7606_write_raw(struct iio_dev *indio_dev,
  206. struct iio_chan_spec const *chan,
  207. int val,
  208. int val2,
  209. long mask)
  210. {
  211. struct ad7606_state *st = iio_priv(indio_dev);
  212. int i, ret, ch = 0;
  213. switch (mask) {
  214. case IIO_CHAN_INFO_SCALE:
  215. mutex_lock(&st->lock);
  216. i = find_closest(val2, st->scale_avail, st->num_scales);
  217. if (st->sw_mode_en)
  218. ch = chan->address;
  219. ret = st->write_scale(indio_dev, ch, i);
  220. if (ret < 0) {
  221. mutex_unlock(&st->lock);
  222. return ret;
  223. }
  224. st->range[ch] = i;
  225. mutex_unlock(&st->lock);
  226. return 0;
  227. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  228. if (val2)
  229. return -EINVAL;
  230. i = find_closest(val, st->oversampling_avail,
  231. st->num_os_ratios);
  232. mutex_lock(&st->lock);
  233. ret = st->write_os(indio_dev, i);
  234. if (ret < 0) {
  235. mutex_unlock(&st->lock);
  236. return ret;
  237. }
  238. st->oversampling = st->oversampling_avail[i];
  239. mutex_unlock(&st->lock);
  240. return 0;
  241. default:
  242. return -EINVAL;
  243. }
  244. }
  245. static ssize_t ad7606_oversampling_ratio_avail(struct device *dev,
  246. struct device_attribute *attr,
  247. char *buf)
  248. {
  249. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  250. struct ad7606_state *st = iio_priv(indio_dev);
  251. return ad7606_show_avail(buf, st->oversampling_avail,
  252. st->num_os_ratios, false);
  253. }
  254. static IIO_DEVICE_ATTR(oversampling_ratio_available, 0444,
  255. ad7606_oversampling_ratio_avail, NULL, 0);
  256. static struct attribute *ad7606_attributes_os_and_range[] = {
  257. &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
  258. &iio_dev_attr_oversampling_ratio_available.dev_attr.attr,
  259. NULL,
  260. };
  261. static const struct attribute_group ad7606_attribute_group_os_and_range = {
  262. .attrs = ad7606_attributes_os_and_range,
  263. };
  264. static struct attribute *ad7606_attributes_os[] = {
  265. &iio_dev_attr_oversampling_ratio_available.dev_attr.attr,
  266. NULL,
  267. };
  268. static const struct attribute_group ad7606_attribute_group_os = {
  269. .attrs = ad7606_attributes_os,
  270. };
  271. static struct attribute *ad7606_attributes_range[] = {
  272. &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
  273. NULL,
  274. };
  275. static const struct attribute_group ad7606_attribute_group_range = {
  276. .attrs = ad7606_attributes_range,
  277. };
  278. static const struct iio_chan_spec ad7605_channels[] = {
  279. IIO_CHAN_SOFT_TIMESTAMP(4),
  280. AD7605_CHANNEL(0),
  281. AD7605_CHANNEL(1),
  282. AD7605_CHANNEL(2),
  283. AD7605_CHANNEL(3),
  284. };
  285. static const struct iio_chan_spec ad7606_channels[] = {
  286. IIO_CHAN_SOFT_TIMESTAMP(8),
  287. AD7606_CHANNEL(0),
  288. AD7606_CHANNEL(1),
  289. AD7606_CHANNEL(2),
  290. AD7606_CHANNEL(3),
  291. AD7606_CHANNEL(4),
  292. AD7606_CHANNEL(5),
  293. AD7606_CHANNEL(6),
  294. AD7606_CHANNEL(7),
  295. };
  296. /*
  297. * The current assumption that this driver makes for AD7616, is that it's
  298. * working in Hardware Mode with Serial, Burst and Sequencer modes activated.
  299. * To activate them, following pins must be pulled high:
  300. * -SER/PAR
  301. * -SEQEN
  302. * And following pins must be pulled low:
  303. * -WR/BURST
  304. * -DB4/SER1W
  305. */
  306. static const struct iio_chan_spec ad7616_channels[] = {
  307. IIO_CHAN_SOFT_TIMESTAMP(16),
  308. AD7606_CHANNEL(0),
  309. AD7606_CHANNEL(1),
  310. AD7606_CHANNEL(2),
  311. AD7606_CHANNEL(3),
  312. AD7606_CHANNEL(4),
  313. AD7606_CHANNEL(5),
  314. AD7606_CHANNEL(6),
  315. AD7606_CHANNEL(7),
  316. AD7606_CHANNEL(8),
  317. AD7606_CHANNEL(9),
  318. AD7606_CHANNEL(10),
  319. AD7606_CHANNEL(11),
  320. AD7606_CHANNEL(12),
  321. AD7606_CHANNEL(13),
  322. AD7606_CHANNEL(14),
  323. AD7606_CHANNEL(15),
  324. };
  325. static const struct ad7606_chip_info ad7606_chip_info_tbl[] = {
  326. /* More devices added in future */
  327. [ID_AD7605_4] = {
  328. .channels = ad7605_channels,
  329. .num_channels = 5,
  330. },
  331. [ID_AD7606_8] = {
  332. .channels = ad7606_channels,
  333. .num_channels = 9,
  334. .oversampling_avail = ad7606_oversampling_avail,
  335. .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
  336. },
  337. [ID_AD7606_6] = {
  338. .channels = ad7606_channels,
  339. .num_channels = 7,
  340. .oversampling_avail = ad7606_oversampling_avail,
  341. .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
  342. },
  343. [ID_AD7606_4] = {
  344. .channels = ad7606_channels,
  345. .num_channels = 5,
  346. .oversampling_avail = ad7606_oversampling_avail,
  347. .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
  348. },
  349. [ID_AD7606B] = {
  350. .channels = ad7606_channels,
  351. .num_channels = 9,
  352. .oversampling_avail = ad7606_oversampling_avail,
  353. .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
  354. },
  355. [ID_AD7616] = {
  356. .channels = ad7616_channels,
  357. .num_channels = 17,
  358. .oversampling_avail = ad7616_oversampling_avail,
  359. .oversampling_num = ARRAY_SIZE(ad7616_oversampling_avail),
  360. .os_req_reset = true,
  361. .init_delay_ms = 15,
  362. },
  363. };
  364. static int ad7606_request_gpios(struct ad7606_state *st)
  365. {
  366. struct device *dev = st->dev;
  367. st->gpio_convst = devm_gpiod_get(dev, "adi,conversion-start",
  368. GPIOD_OUT_LOW);
  369. if (IS_ERR(st->gpio_convst))
  370. return PTR_ERR(st->gpio_convst);
  371. st->gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
  372. if (IS_ERR(st->gpio_reset))
  373. return PTR_ERR(st->gpio_reset);
  374. st->gpio_range = devm_gpiod_get_optional(dev, "adi,range",
  375. GPIOD_OUT_LOW);
  376. if (IS_ERR(st->gpio_range))
  377. return PTR_ERR(st->gpio_range);
  378. st->gpio_standby = devm_gpiod_get_optional(dev, "standby",
  379. GPIOD_OUT_HIGH);
  380. if (IS_ERR(st->gpio_standby))
  381. return PTR_ERR(st->gpio_standby);
  382. st->gpio_frstdata = devm_gpiod_get_optional(dev, "adi,first-data",
  383. GPIOD_IN);
  384. if (IS_ERR(st->gpio_frstdata))
  385. return PTR_ERR(st->gpio_frstdata);
  386. if (!st->chip_info->oversampling_num)
  387. return 0;
  388. st->gpio_os = devm_gpiod_get_array_optional(dev,
  389. "adi,oversampling-ratio",
  390. GPIOD_OUT_LOW);
  391. return PTR_ERR_OR_ZERO(st->gpio_os);
  392. }
  393. /*
  394. * The BUSY signal indicates when conversions are in progress, so when a rising
  395. * edge of CONVST is applied, BUSY goes logic high and transitions low at the
  396. * end of the entire conversion process. The falling edge of the BUSY signal
  397. * triggers this interrupt.
  398. */
  399. static irqreturn_t ad7606_interrupt(int irq, void *dev_id)
  400. {
  401. struct iio_dev *indio_dev = dev_id;
  402. struct ad7606_state *st = iio_priv(indio_dev);
  403. if (iio_buffer_enabled(indio_dev)) {
  404. gpiod_set_value(st->gpio_convst, 0);
  405. iio_trigger_poll_chained(st->trig);
  406. } else {
  407. complete(&st->completion);
  408. }
  409. return IRQ_HANDLED;
  410. };
  411. static int ad7606_validate_trigger(struct iio_dev *indio_dev,
  412. struct iio_trigger *trig)
  413. {
  414. struct ad7606_state *st = iio_priv(indio_dev);
  415. if (st->trig != trig)
  416. return -EINVAL;
  417. return 0;
  418. }
  419. static int ad7606_buffer_postenable(struct iio_dev *indio_dev)
  420. {
  421. struct ad7606_state *st = iio_priv(indio_dev);
  422. gpiod_set_value(st->gpio_convst, 1);
  423. return 0;
  424. }
  425. static int ad7606_buffer_predisable(struct iio_dev *indio_dev)
  426. {
  427. struct ad7606_state *st = iio_priv(indio_dev);
  428. gpiod_set_value(st->gpio_convst, 0);
  429. return 0;
  430. }
  431. static const struct iio_buffer_setup_ops ad7606_buffer_ops = {
  432. .postenable = &ad7606_buffer_postenable,
  433. .predisable = &ad7606_buffer_predisable,
  434. };
  435. static const struct iio_info ad7606_info_no_os_or_range = {
  436. .read_raw = &ad7606_read_raw,
  437. .validate_trigger = &ad7606_validate_trigger,
  438. };
  439. static const struct iio_info ad7606_info_os_and_range = {
  440. .read_raw = &ad7606_read_raw,
  441. .write_raw = &ad7606_write_raw,
  442. .attrs = &ad7606_attribute_group_os_and_range,
  443. .validate_trigger = &ad7606_validate_trigger,
  444. };
  445. static const struct iio_info ad7606_info_os_range_and_debug = {
  446. .read_raw = &ad7606_read_raw,
  447. .write_raw = &ad7606_write_raw,
  448. .debugfs_reg_access = &ad7606_reg_access,
  449. .attrs = &ad7606_attribute_group_os_and_range,
  450. .validate_trigger = &ad7606_validate_trigger,
  451. };
  452. static const struct iio_info ad7606_info_os = {
  453. .read_raw = &ad7606_read_raw,
  454. .write_raw = &ad7606_write_raw,
  455. .attrs = &ad7606_attribute_group_os,
  456. .validate_trigger = &ad7606_validate_trigger,
  457. };
  458. static const struct iio_info ad7606_info_range = {
  459. .read_raw = &ad7606_read_raw,
  460. .write_raw = &ad7606_write_raw,
  461. .attrs = &ad7606_attribute_group_range,
  462. .validate_trigger = &ad7606_validate_trigger,
  463. };
  464. static const struct iio_trigger_ops ad7606_trigger_ops = {
  465. .validate_device = iio_trigger_validate_own_device,
  466. };
  467. static void ad7606_regulator_disable(void *data)
  468. {
  469. struct ad7606_state *st = data;
  470. regulator_disable(st->reg);
  471. }
  472. int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
  473. const char *name, unsigned int id,
  474. const struct ad7606_bus_ops *bops)
  475. {
  476. struct ad7606_state *st;
  477. int ret;
  478. struct iio_dev *indio_dev;
  479. indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
  480. if (!indio_dev)
  481. return -ENOMEM;
  482. st = iio_priv(indio_dev);
  483. dev_set_drvdata(dev, indio_dev);
  484. st->dev = dev;
  485. mutex_init(&st->lock);
  486. st->bops = bops;
  487. st->base_address = base_address;
  488. /* tied to logic low, analog input range is +/- 5V */
  489. st->range[0] = 0;
  490. st->oversampling = 1;
  491. st->scale_avail = ad7606_scale_avail;
  492. st->num_scales = ARRAY_SIZE(ad7606_scale_avail);
  493. st->reg = devm_regulator_get(dev, "avcc");
  494. if (IS_ERR(st->reg))
  495. return PTR_ERR(st->reg);
  496. ret = regulator_enable(st->reg);
  497. if (ret) {
  498. dev_err(dev, "Failed to enable specified AVcc supply\n");
  499. return ret;
  500. }
  501. ret = devm_add_action_or_reset(dev, ad7606_regulator_disable, st);
  502. if (ret)
  503. return ret;
  504. st->chip_info = &ad7606_chip_info_tbl[id];
  505. if (st->chip_info->oversampling_num) {
  506. st->oversampling_avail = st->chip_info->oversampling_avail;
  507. st->num_os_ratios = st->chip_info->oversampling_num;
  508. }
  509. ret = ad7606_request_gpios(st);
  510. if (ret)
  511. return ret;
  512. if (st->gpio_os) {
  513. if (st->gpio_range)
  514. indio_dev->info = &ad7606_info_os_and_range;
  515. else
  516. indio_dev->info = &ad7606_info_os;
  517. } else {
  518. if (st->gpio_range)
  519. indio_dev->info = &ad7606_info_range;
  520. else
  521. indio_dev->info = &ad7606_info_no_os_or_range;
  522. }
  523. indio_dev->modes = INDIO_DIRECT_MODE;
  524. indio_dev->name = name;
  525. indio_dev->channels = st->chip_info->channels;
  526. indio_dev->num_channels = st->chip_info->num_channels;
  527. init_completion(&st->completion);
  528. ret = ad7606_reset(st);
  529. if (ret)
  530. dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n");
  531. /* AD7616 requires al least 15ms to reconfigure after a reset */
  532. if (st->chip_info->init_delay_ms) {
  533. if (msleep_interruptible(st->chip_info->init_delay_ms))
  534. return -ERESTARTSYS;
  535. }
  536. st->write_scale = ad7606_write_scale_hw;
  537. st->write_os = ad7606_write_os_hw;
  538. if (st->bops->sw_mode_config)
  539. st->sw_mode_en = device_property_present(st->dev,
  540. "adi,sw-mode");
  541. if (st->sw_mode_en) {
  542. /* Scale of 0.076293 is only available in sw mode */
  543. st->scale_avail = ad7616_sw_scale_avail;
  544. st->num_scales = ARRAY_SIZE(ad7616_sw_scale_avail);
  545. /* After reset, in software mode, ±10 V is set by default */
  546. memset32(st->range, 2, ARRAY_SIZE(st->range));
  547. indio_dev->info = &ad7606_info_os_range_and_debug;
  548. ret = st->bops->sw_mode_config(indio_dev);
  549. if (ret < 0)
  550. return ret;
  551. }
  552. st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
  553. indio_dev->name, indio_dev->id);
  554. if (!st->trig)
  555. return -ENOMEM;
  556. st->trig->ops = &ad7606_trigger_ops;
  557. st->trig->dev.parent = dev;
  558. iio_trigger_set_drvdata(st->trig, indio_dev);
  559. ret = devm_iio_trigger_register(dev, st->trig);
  560. if (ret)
  561. return ret;
  562. indio_dev->trig = iio_trigger_get(st->trig);
  563. ret = devm_request_threaded_irq(dev, irq,
  564. NULL,
  565. &ad7606_interrupt,
  566. IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
  567. name, indio_dev);
  568. if (ret)
  569. return ret;
  570. ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
  571. &iio_pollfunc_store_time,
  572. &ad7606_trigger_handler,
  573. &ad7606_buffer_ops);
  574. if (ret)
  575. return ret;
  576. return devm_iio_device_register(dev, indio_dev);
  577. }
  578. EXPORT_SYMBOL_GPL(ad7606_probe);
  579. #ifdef CONFIG_PM_SLEEP
  580. static int ad7606_suspend(struct device *dev)
  581. {
  582. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  583. struct ad7606_state *st = iio_priv(indio_dev);
  584. if (st->gpio_standby) {
  585. gpiod_set_value(st->gpio_range, 1);
  586. gpiod_set_value(st->gpio_standby, 0);
  587. }
  588. return 0;
  589. }
  590. static int ad7606_resume(struct device *dev)
  591. {
  592. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  593. struct ad7606_state *st = iio_priv(indio_dev);
  594. if (st->gpio_standby) {
  595. gpiod_set_value(st->gpio_range, st->range[0]);
  596. gpiod_set_value(st->gpio_standby, 1);
  597. ad7606_reset(st);
  598. }
  599. return 0;
  600. }
  601. SIMPLE_DEV_PM_OPS(ad7606_pm_ops, ad7606_suspend, ad7606_resume);
  602. EXPORT_SYMBOL_GPL(ad7606_pm_ops);
  603. #endif
  604. MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
  605. MODULE_DESCRIPTION("Analog Devices AD7606 ADC");
  606. MODULE_LICENSE("GPL v2");