ad7298.c 9.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * AD7298 SPI ADC driver
  4. *
  5. * Copyright 2011 Analog Devices Inc.
  6. */
  7. #include <linux/device.h>
  8. #include <linux/kernel.h>
  9. #include <linux/slab.h>
  10. #include <linux/sysfs.h>
  11. #include <linux/spi/spi.h>
  12. #include <linux/regulator/consumer.h>
  13. #include <linux/err.h>
  14. #include <linux/delay.h>
  15. #include <linux/module.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/bitops.h>
  18. #include <linux/iio/iio.h>
  19. #include <linux/iio/sysfs.h>
  20. #include <linux/iio/buffer.h>
  21. #include <linux/iio/trigger_consumer.h>
  22. #include <linux/iio/triggered_buffer.h>
  23. #include <linux/platform_data/ad7298.h>
  24. #define AD7298_WRITE BIT(15) /* write to the control register */
  25. #define AD7298_REPEAT BIT(14) /* repeated conversion enable */
  26. #define AD7298_CH(x) BIT(13 - (x)) /* channel select */
  27. #define AD7298_TSENSE BIT(5) /* temperature conversion enable */
  28. #define AD7298_EXTREF BIT(2) /* external reference enable */
  29. #define AD7298_TAVG BIT(1) /* temperature sensor averaging enable */
  30. #define AD7298_PDD BIT(0) /* partial power down enable */
  31. #define AD7298_MAX_CHAN 8
  32. #define AD7298_INTREF_mV 2500
  33. #define AD7298_CH_TEMP 9
  34. struct ad7298_state {
  35. struct spi_device *spi;
  36. struct regulator *reg;
  37. unsigned ext_ref;
  38. struct spi_transfer ring_xfer[10];
  39. struct spi_transfer scan_single_xfer[3];
  40. struct spi_message ring_msg;
  41. struct spi_message scan_single_msg;
  42. /*
  43. * DMA (thus cache coherency maintenance) requires the
  44. * transfer buffers to live in their own cache lines.
  45. */
  46. __be16 rx_buf[12] ____cacheline_aligned;
  47. __be16 tx_buf[2];
  48. };
  49. #define AD7298_V_CHAN(index) \
  50. { \
  51. .type = IIO_VOLTAGE, \
  52. .indexed = 1, \
  53. .channel = index, \
  54. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  55. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  56. .address = index, \
  57. .scan_index = index, \
  58. .scan_type = { \
  59. .sign = 'u', \
  60. .realbits = 12, \
  61. .storagebits = 16, \
  62. .endianness = IIO_BE, \
  63. }, \
  64. }
  65. static const struct iio_chan_spec ad7298_channels[] = {
  66. {
  67. .type = IIO_TEMP,
  68. .indexed = 1,
  69. .channel = 0,
  70. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  71. BIT(IIO_CHAN_INFO_SCALE) |
  72. BIT(IIO_CHAN_INFO_OFFSET),
  73. .address = AD7298_CH_TEMP,
  74. .scan_index = -1,
  75. .scan_type = {
  76. .sign = 's',
  77. .realbits = 32,
  78. .storagebits = 32,
  79. },
  80. },
  81. AD7298_V_CHAN(0),
  82. AD7298_V_CHAN(1),
  83. AD7298_V_CHAN(2),
  84. AD7298_V_CHAN(3),
  85. AD7298_V_CHAN(4),
  86. AD7298_V_CHAN(5),
  87. AD7298_V_CHAN(6),
  88. AD7298_V_CHAN(7),
  89. IIO_CHAN_SOFT_TIMESTAMP(8),
  90. };
  91. /*
  92. * ad7298_update_scan_mode() setup the spi transfer buffer for the new scan mask
  93. */
  94. static int ad7298_update_scan_mode(struct iio_dev *indio_dev,
  95. const unsigned long *active_scan_mask)
  96. {
  97. struct ad7298_state *st = iio_priv(indio_dev);
  98. int i, m;
  99. unsigned short command;
  100. int scan_count;
  101. /* Now compute overall size */
  102. scan_count = bitmap_weight(active_scan_mask, indio_dev->masklength);
  103. command = AD7298_WRITE | st->ext_ref;
  104. for (i = 0, m = AD7298_CH(0); i < AD7298_MAX_CHAN; i++, m >>= 1)
  105. if (test_bit(i, active_scan_mask))
  106. command |= m;
  107. st->tx_buf[0] = cpu_to_be16(command);
  108. /* build spi ring message */
  109. st->ring_xfer[0].tx_buf = &st->tx_buf[0];
  110. st->ring_xfer[0].len = 2;
  111. st->ring_xfer[0].cs_change = 1;
  112. st->ring_xfer[1].tx_buf = &st->tx_buf[1];
  113. st->ring_xfer[1].len = 2;
  114. st->ring_xfer[1].cs_change = 1;
  115. spi_message_init(&st->ring_msg);
  116. spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
  117. spi_message_add_tail(&st->ring_xfer[1], &st->ring_msg);
  118. for (i = 0; i < scan_count; i++) {
  119. st->ring_xfer[i + 2].rx_buf = &st->rx_buf[i];
  120. st->ring_xfer[i + 2].len = 2;
  121. st->ring_xfer[i + 2].cs_change = 1;
  122. spi_message_add_tail(&st->ring_xfer[i + 2], &st->ring_msg);
  123. }
  124. /* make sure last transfer cs_change is not set */
  125. st->ring_xfer[i + 1].cs_change = 0;
  126. return 0;
  127. }
  128. /*
  129. * ad7298_trigger_handler() bh of trigger launched polling to ring buffer
  130. *
  131. * Currently there is no option in this driver to disable the saving of
  132. * timestamps within the ring.
  133. */
  134. static irqreturn_t ad7298_trigger_handler(int irq, void *p)
  135. {
  136. struct iio_poll_func *pf = p;
  137. struct iio_dev *indio_dev = pf->indio_dev;
  138. struct ad7298_state *st = iio_priv(indio_dev);
  139. int b_sent;
  140. b_sent = spi_sync(st->spi, &st->ring_msg);
  141. if (b_sent)
  142. goto done;
  143. iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
  144. iio_get_time_ns(indio_dev));
  145. done:
  146. iio_trigger_notify_done(indio_dev->trig);
  147. return IRQ_HANDLED;
  148. }
  149. static int ad7298_scan_direct(struct ad7298_state *st, unsigned ch)
  150. {
  151. int ret;
  152. st->tx_buf[0] = cpu_to_be16(AD7298_WRITE | st->ext_ref |
  153. (AD7298_CH(0) >> ch));
  154. ret = spi_sync(st->spi, &st->scan_single_msg);
  155. if (ret)
  156. return ret;
  157. return be16_to_cpu(st->rx_buf[0]);
  158. }
  159. static int ad7298_scan_temp(struct ad7298_state *st, int *val)
  160. {
  161. int ret;
  162. __be16 buf;
  163. buf = cpu_to_be16(AD7298_WRITE | AD7298_TSENSE |
  164. AD7298_TAVG | st->ext_ref);
  165. ret = spi_write(st->spi, (u8 *)&buf, 2);
  166. if (ret)
  167. return ret;
  168. buf = cpu_to_be16(0);
  169. ret = spi_write(st->spi, (u8 *)&buf, 2);
  170. if (ret)
  171. return ret;
  172. usleep_range(101, 1000); /* sleep > 100us */
  173. ret = spi_read(st->spi, (u8 *)&buf, 2);
  174. if (ret)
  175. return ret;
  176. *val = sign_extend32(be16_to_cpu(buf), 11);
  177. return 0;
  178. }
  179. static int ad7298_get_ref_voltage(struct ad7298_state *st)
  180. {
  181. int vref;
  182. if (st->ext_ref) {
  183. vref = regulator_get_voltage(st->reg);
  184. if (vref < 0)
  185. return vref;
  186. return vref / 1000;
  187. } else {
  188. return AD7298_INTREF_mV;
  189. }
  190. }
  191. static int ad7298_read_raw(struct iio_dev *indio_dev,
  192. struct iio_chan_spec const *chan,
  193. int *val,
  194. int *val2,
  195. long m)
  196. {
  197. int ret;
  198. struct ad7298_state *st = iio_priv(indio_dev);
  199. switch (m) {
  200. case IIO_CHAN_INFO_RAW:
  201. ret = iio_device_claim_direct_mode(indio_dev);
  202. if (ret)
  203. return ret;
  204. if (chan->address == AD7298_CH_TEMP)
  205. ret = ad7298_scan_temp(st, val);
  206. else
  207. ret = ad7298_scan_direct(st, chan->address);
  208. iio_device_release_direct_mode(indio_dev);
  209. if (ret < 0)
  210. return ret;
  211. if (chan->address != AD7298_CH_TEMP)
  212. *val = ret & GENMASK(chan->scan_type.realbits - 1, 0);
  213. return IIO_VAL_INT;
  214. case IIO_CHAN_INFO_SCALE:
  215. switch (chan->type) {
  216. case IIO_VOLTAGE:
  217. *val = ad7298_get_ref_voltage(st);
  218. *val2 = chan->scan_type.realbits;
  219. return IIO_VAL_FRACTIONAL_LOG2;
  220. case IIO_TEMP:
  221. *val = ad7298_get_ref_voltage(st);
  222. *val2 = 10;
  223. return IIO_VAL_FRACTIONAL;
  224. default:
  225. return -EINVAL;
  226. }
  227. case IIO_CHAN_INFO_OFFSET:
  228. *val = 1093 - 2732500 / ad7298_get_ref_voltage(st);
  229. return IIO_VAL_INT;
  230. }
  231. return -EINVAL;
  232. }
  233. static const struct iio_info ad7298_info = {
  234. .read_raw = &ad7298_read_raw,
  235. .update_scan_mode = ad7298_update_scan_mode,
  236. };
  237. static int ad7298_probe(struct spi_device *spi)
  238. {
  239. struct ad7298_platform_data *pdata = spi->dev.platform_data;
  240. struct ad7298_state *st;
  241. struct iio_dev *indio_dev;
  242. int ret;
  243. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  244. if (indio_dev == NULL)
  245. return -ENOMEM;
  246. st = iio_priv(indio_dev);
  247. if (pdata && pdata->ext_ref)
  248. st->ext_ref = AD7298_EXTREF;
  249. if (st->ext_ref) {
  250. st->reg = devm_regulator_get(&spi->dev, "vref");
  251. if (IS_ERR(st->reg))
  252. return PTR_ERR(st->reg);
  253. ret = regulator_enable(st->reg);
  254. if (ret)
  255. return ret;
  256. }
  257. spi_set_drvdata(spi, indio_dev);
  258. st->spi = spi;
  259. indio_dev->name = spi_get_device_id(spi)->name;
  260. indio_dev->modes = INDIO_DIRECT_MODE;
  261. indio_dev->channels = ad7298_channels;
  262. indio_dev->num_channels = ARRAY_SIZE(ad7298_channels);
  263. indio_dev->info = &ad7298_info;
  264. /* Setup default message */
  265. st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
  266. st->scan_single_xfer[0].len = 2;
  267. st->scan_single_xfer[0].cs_change = 1;
  268. st->scan_single_xfer[1].tx_buf = &st->tx_buf[1];
  269. st->scan_single_xfer[1].len = 2;
  270. st->scan_single_xfer[1].cs_change = 1;
  271. st->scan_single_xfer[2].rx_buf = &st->rx_buf[0];
  272. st->scan_single_xfer[2].len = 2;
  273. spi_message_init(&st->scan_single_msg);
  274. spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg);
  275. spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg);
  276. spi_message_add_tail(&st->scan_single_xfer[2], &st->scan_single_msg);
  277. ret = iio_triggered_buffer_setup(indio_dev, NULL,
  278. &ad7298_trigger_handler, NULL);
  279. if (ret)
  280. goto error_disable_reg;
  281. ret = iio_device_register(indio_dev);
  282. if (ret)
  283. goto error_cleanup_ring;
  284. return 0;
  285. error_cleanup_ring:
  286. iio_triggered_buffer_cleanup(indio_dev);
  287. error_disable_reg:
  288. if (st->ext_ref)
  289. regulator_disable(st->reg);
  290. return ret;
  291. }
  292. static int ad7298_remove(struct spi_device *spi)
  293. {
  294. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  295. struct ad7298_state *st = iio_priv(indio_dev);
  296. iio_device_unregister(indio_dev);
  297. iio_triggered_buffer_cleanup(indio_dev);
  298. if (st->ext_ref)
  299. regulator_disable(st->reg);
  300. return 0;
  301. }
  302. static const struct spi_device_id ad7298_id[] = {
  303. {"ad7298", 0},
  304. {}
  305. };
  306. MODULE_DEVICE_TABLE(spi, ad7298_id);
  307. static struct spi_driver ad7298_driver = {
  308. .driver = {
  309. .name = "ad7298",
  310. },
  311. .probe = ad7298_probe,
  312. .remove = ad7298_remove,
  313. .id_table = ad7298_id,
  314. };
  315. module_spi_driver(ad7298_driver);
  316. MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
  317. MODULE_DESCRIPTION("Analog Devices AD7298 ADC");
  318. MODULE_LICENSE("GPL v2");