ad7292.c 8.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Analog Devices AD7292 SPI ADC driver
  4. *
  5. * Copyright 2019 Analog Devices Inc.
  6. */
  7. #include <linux/bitfield.h>
  8. #include <linux/device.h>
  9. #include <linux/module.h>
  10. #include <linux/regulator/consumer.h>
  11. #include <linux/spi/spi.h>
  12. #include <linux/iio/iio.h>
  13. #define ADI_VENDOR_ID 0x0018
  14. /* AD7292 registers definition */
  15. #define AD7292_REG_VENDOR_ID 0x00
  16. #define AD7292_REG_CONF_BANK 0x05
  17. #define AD7292_REG_CONV_COMM 0x0E
  18. #define AD7292_REG_ADC_CH(x) (0x10 + (x))
  19. /* AD7292 configuration bank subregisters definition */
  20. #define AD7292_BANK_REG_VIN_RNG0 0x10
  21. #define AD7292_BANK_REG_VIN_RNG1 0x11
  22. #define AD7292_BANK_REG_SAMP_MODE 0x12
  23. #define AD7292_RD_FLAG_MSK(x) (BIT(7) | ((x) & 0x3F))
  24. /* AD7292_REG_ADC_CONVERSION */
  25. #define AD7292_ADC_DATA_MASK GENMASK(15, 6)
  26. #define AD7292_ADC_DATA(x) FIELD_GET(AD7292_ADC_DATA_MASK, x)
  27. /* AD7292_CHANNEL_SAMPLING_MODE */
  28. #define AD7292_CH_SAMP_MODE(reg, ch) (((reg) >> 8) & BIT(ch))
  29. /* AD7292_CHANNEL_VIN_RANGE */
  30. #define AD7292_CH_VIN_RANGE(reg, ch) ((reg) & BIT(ch))
  31. #define AD7292_VOLTAGE_CHAN(_chan) \
  32. { \
  33. .type = IIO_VOLTAGE, \
  34. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  35. BIT(IIO_CHAN_INFO_SCALE), \
  36. .indexed = 1, \
  37. .channel = _chan, \
  38. }
  39. static const struct iio_chan_spec ad7292_channels[] = {
  40. AD7292_VOLTAGE_CHAN(0),
  41. AD7292_VOLTAGE_CHAN(1),
  42. AD7292_VOLTAGE_CHAN(2),
  43. AD7292_VOLTAGE_CHAN(3),
  44. AD7292_VOLTAGE_CHAN(4),
  45. AD7292_VOLTAGE_CHAN(5),
  46. AD7292_VOLTAGE_CHAN(6),
  47. AD7292_VOLTAGE_CHAN(7)
  48. };
  49. static const struct iio_chan_spec ad7292_channels_diff[] = {
  50. {
  51. .type = IIO_VOLTAGE,
  52. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
  53. .indexed = 1,
  54. .differential = 1,
  55. .channel = 0,
  56. .channel2 = 1,
  57. },
  58. AD7292_VOLTAGE_CHAN(2),
  59. AD7292_VOLTAGE_CHAN(3),
  60. AD7292_VOLTAGE_CHAN(4),
  61. AD7292_VOLTAGE_CHAN(5),
  62. AD7292_VOLTAGE_CHAN(6),
  63. AD7292_VOLTAGE_CHAN(7)
  64. };
  65. struct ad7292_state {
  66. struct spi_device *spi;
  67. struct regulator *reg;
  68. unsigned short vref_mv;
  69. __be16 d16 ____cacheline_aligned;
  70. u8 d8[2];
  71. };
  72. static int ad7292_spi_reg_read(struct ad7292_state *st, unsigned int addr)
  73. {
  74. int ret;
  75. st->d8[0] = AD7292_RD_FLAG_MSK(addr);
  76. ret = spi_write_then_read(st->spi, st->d8, 1, &st->d16, 2);
  77. if (ret < 0)
  78. return ret;
  79. return be16_to_cpu(st->d16);
  80. }
  81. static int ad7292_spi_subreg_read(struct ad7292_state *st, unsigned int addr,
  82. unsigned int sub_addr, unsigned int len)
  83. {
  84. unsigned int shift = 16 - (8 * len);
  85. int ret;
  86. st->d8[0] = AD7292_RD_FLAG_MSK(addr);
  87. st->d8[1] = sub_addr;
  88. ret = spi_write_then_read(st->spi, st->d8, 2, &st->d16, len);
  89. if (ret < 0)
  90. return ret;
  91. return (be16_to_cpu(st->d16) >> shift);
  92. }
  93. static int ad7292_single_conversion(struct ad7292_state *st,
  94. unsigned int chan_addr)
  95. {
  96. int ret;
  97. struct spi_transfer t[] = {
  98. {
  99. .tx_buf = &st->d8,
  100. .len = 4,
  101. .delay = {
  102. .value = 6,
  103. .unit = SPI_DELAY_UNIT_USECS
  104. },
  105. }, {
  106. .rx_buf = &st->d16,
  107. .len = 2,
  108. },
  109. };
  110. st->d8[0] = chan_addr;
  111. st->d8[1] = AD7292_RD_FLAG_MSK(AD7292_REG_CONV_COMM);
  112. ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
  113. if (ret < 0)
  114. return ret;
  115. return be16_to_cpu(st->d16);
  116. }
  117. static int ad7292_vin_range_multiplier(struct ad7292_state *st, int channel)
  118. {
  119. int samp_mode, range0, range1, factor = 1;
  120. /*
  121. * Every AD7292 ADC channel may have its input range adjusted according
  122. * to the settings at the ADC sampling mode and VIN range subregisters.
  123. * For a given channel, the minimum input range is equal to Vref, and it
  124. * may be increased by a multiplier factor of 2 or 4 according to the
  125. * following rule:
  126. * If channel is being sampled with respect to AGND:
  127. * factor = 4 if VIN range0 and VIN range1 equal 0
  128. * factor = 2 if only one of VIN ranges equal 1
  129. * factor = 1 if both VIN range0 and VIN range1 equal 1
  130. * If channel is being sampled with respect to AVDD:
  131. * factor = 4 if VIN range0 and VIN range1 equal 0
  132. * Behavior is undefined if any of VIN range doesn't equal 0
  133. */
  134. samp_mode = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK,
  135. AD7292_BANK_REG_SAMP_MODE, 2);
  136. if (samp_mode < 0)
  137. return samp_mode;
  138. range0 = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK,
  139. AD7292_BANK_REG_VIN_RNG0, 2);
  140. if (range0 < 0)
  141. return range0;
  142. range1 = ad7292_spi_subreg_read(st, AD7292_REG_CONF_BANK,
  143. AD7292_BANK_REG_VIN_RNG1, 2);
  144. if (range1 < 0)
  145. return range1;
  146. if (AD7292_CH_SAMP_MODE(samp_mode, channel)) {
  147. /* Sampling with respect to AGND */
  148. if (!AD7292_CH_VIN_RANGE(range0, channel))
  149. factor *= 2;
  150. if (!AD7292_CH_VIN_RANGE(range1, channel))
  151. factor *= 2;
  152. } else {
  153. /* Sampling with respect to AVDD */
  154. if (AD7292_CH_VIN_RANGE(range0, channel) ||
  155. AD7292_CH_VIN_RANGE(range1, channel))
  156. return -EPERM;
  157. factor = 4;
  158. }
  159. return factor;
  160. }
  161. static int ad7292_read_raw(struct iio_dev *indio_dev,
  162. const struct iio_chan_spec *chan,
  163. int *val, int *val2, long info)
  164. {
  165. struct ad7292_state *st = iio_priv(indio_dev);
  166. unsigned int ch_addr;
  167. int ret;
  168. switch (info) {
  169. case IIO_CHAN_INFO_RAW:
  170. ch_addr = AD7292_REG_ADC_CH(chan->channel);
  171. ret = ad7292_single_conversion(st, ch_addr);
  172. if (ret < 0)
  173. return ret;
  174. *val = AD7292_ADC_DATA(ret);
  175. return IIO_VAL_INT;
  176. case IIO_CHAN_INFO_SCALE:
  177. /*
  178. * To convert a raw value to standard units, the IIO defines
  179. * this formula: Scaled value = (raw + offset) * scale.
  180. * For the scale to be a correct multiplier for (raw + offset),
  181. * it must be calculated as the input range divided by the
  182. * number of possible distinct input values. Given the ADC data
  183. * is 10 bit long, it may assume 2^10 distinct values.
  184. * Hence, scale = range / 2^10. The IIO_VAL_FRACTIONAL_LOG2
  185. * return type indicates to the IIO API to divide *val by 2 to
  186. * the power of *val2 when returning from read_raw.
  187. */
  188. ret = ad7292_vin_range_multiplier(st, chan->channel);
  189. if (ret < 0)
  190. return ret;
  191. *val = st->vref_mv * ret;
  192. *val2 = 10;
  193. return IIO_VAL_FRACTIONAL_LOG2;
  194. default:
  195. break;
  196. }
  197. return -EINVAL;
  198. }
  199. static const struct iio_info ad7292_info = {
  200. .read_raw = ad7292_read_raw,
  201. };
  202. static void ad7292_regulator_disable(void *data)
  203. {
  204. struct ad7292_state *st = data;
  205. regulator_disable(st->reg);
  206. }
  207. static int ad7292_probe(struct spi_device *spi)
  208. {
  209. struct ad7292_state *st;
  210. struct iio_dev *indio_dev;
  211. struct device_node *child;
  212. bool diff_channels = 0;
  213. int ret;
  214. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  215. if (!indio_dev)
  216. return -ENOMEM;
  217. st = iio_priv(indio_dev);
  218. st->spi = spi;
  219. ret = ad7292_spi_reg_read(st, AD7292_REG_VENDOR_ID);
  220. if (ret != ADI_VENDOR_ID) {
  221. dev_err(&spi->dev, "Wrong vendor id 0x%x\n", ret);
  222. return -EINVAL;
  223. }
  224. spi_set_drvdata(spi, indio_dev);
  225. st->reg = devm_regulator_get_optional(&spi->dev, "vref");
  226. if (!IS_ERR(st->reg)) {
  227. ret = regulator_enable(st->reg);
  228. if (ret) {
  229. dev_err(&spi->dev,
  230. "Failed to enable external vref supply\n");
  231. return ret;
  232. }
  233. ret = devm_add_action_or_reset(&spi->dev,
  234. ad7292_regulator_disable, st);
  235. if (ret) {
  236. regulator_disable(st->reg);
  237. return ret;
  238. }
  239. ret = regulator_get_voltage(st->reg);
  240. if (ret < 0)
  241. return ret;
  242. st->vref_mv = ret / 1000;
  243. } else {
  244. /* Use the internal voltage reference. */
  245. st->vref_mv = 1250;
  246. }
  247. indio_dev->name = spi_get_device_id(spi)->name;
  248. indio_dev->modes = INDIO_DIRECT_MODE;
  249. indio_dev->info = &ad7292_info;
  250. for_each_available_child_of_node(spi->dev.of_node, child) {
  251. diff_channels = of_property_read_bool(child, "diff-channels");
  252. if (diff_channels) {
  253. of_node_put(child);
  254. break;
  255. }
  256. }
  257. if (diff_channels) {
  258. indio_dev->num_channels = ARRAY_SIZE(ad7292_channels_diff);
  259. indio_dev->channels = ad7292_channels_diff;
  260. } else {
  261. indio_dev->num_channels = ARRAY_SIZE(ad7292_channels);
  262. indio_dev->channels = ad7292_channels;
  263. }
  264. return devm_iio_device_register(&spi->dev, indio_dev);
  265. }
  266. static const struct spi_device_id ad7292_id_table[] = {
  267. { "ad7292", 0 },
  268. {}
  269. };
  270. MODULE_DEVICE_TABLE(spi, ad7292_id_table);
  271. static const struct of_device_id ad7292_of_match[] = {
  272. { .compatible = "adi,ad7292" },
  273. { },
  274. };
  275. MODULE_DEVICE_TABLE(of, ad7292_of_match);
  276. static struct spi_driver ad7292_driver = {
  277. .driver = {
  278. .name = "ad7292",
  279. .of_match_table = ad7292_of_match,
  280. },
  281. .probe = ad7292_probe,
  282. .id_table = ad7292_id_table,
  283. };
  284. module_spi_driver(ad7292_driver);
  285. MODULE_AUTHOR("Marcelo Schmitt <marcelo.schmitt1@gmail.com>");
  286. MODULE_DESCRIPTION("Analog Devices AD7292 ADC driver");
  287. MODULE_LICENSE("GPL v2");