ide-dma-sff.c 8.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. #include <linux/types.h>
  3. #include <linux/kernel.h>
  4. #include <linux/export.h>
  5. #include <linux/ide.h>
  6. #include <linux/scatterlist.h>
  7. #include <linux/dma-mapping.h>
  8. #include <linux/io.h>
  9. /**
  10. * config_drive_for_dma - attempt to activate IDE DMA
  11. * @drive: the drive to place in DMA mode
  12. *
  13. * If the drive supports at least mode 2 DMA or UDMA of any kind
  14. * then attempt to place it into DMA mode. Drives that are known to
  15. * support DMA but predate the DMA properties or that are known
  16. * to have DMA handling bugs are also set up appropriately based
  17. * on the good/bad drive lists.
  18. */
  19. int config_drive_for_dma(ide_drive_t *drive)
  20. {
  21. ide_hwif_t *hwif = drive->hwif;
  22. u16 *id = drive->id;
  23. if (drive->media != ide_disk) {
  24. if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
  25. return 0;
  26. }
  27. /*
  28. * Enable DMA on any drive that has
  29. * UltraDMA (mode 0/1/2/3/4/5/6) enabled
  30. */
  31. if ((id[ATA_ID_FIELD_VALID] & 4) &&
  32. ((id[ATA_ID_UDMA_MODES] >> 8) & 0x7f))
  33. return 1;
  34. /*
  35. * Enable DMA on any drive that has mode2 DMA
  36. * (multi or single) enabled
  37. */
  38. if ((id[ATA_ID_MWDMA_MODES] & 0x404) == 0x404 ||
  39. (id[ATA_ID_SWDMA_MODES] & 0x404) == 0x404)
  40. return 1;
  41. /* Consult the list of known "good" drives */
  42. if (ide_dma_good_drive(drive))
  43. return 1;
  44. return 0;
  45. }
  46. u8 ide_dma_sff_read_status(ide_hwif_t *hwif)
  47. {
  48. unsigned long addr = hwif->dma_base + ATA_DMA_STATUS;
  49. if (hwif->host_flags & IDE_HFLAG_MMIO)
  50. return readb((void __iomem *)addr);
  51. else
  52. return inb(addr);
  53. }
  54. EXPORT_SYMBOL_GPL(ide_dma_sff_read_status);
  55. static void ide_dma_sff_write_status(ide_hwif_t *hwif, u8 val)
  56. {
  57. unsigned long addr = hwif->dma_base + ATA_DMA_STATUS;
  58. if (hwif->host_flags & IDE_HFLAG_MMIO)
  59. writeb(val, (void __iomem *)addr);
  60. else
  61. outb(val, addr);
  62. }
  63. /**
  64. * ide_dma_host_set - Enable/disable DMA on a host
  65. * @drive: drive to control
  66. *
  67. * Enable/disable DMA on an IDE controller following generic
  68. * bus-mastering IDE controller behaviour.
  69. */
  70. void ide_dma_host_set(ide_drive_t *drive, int on)
  71. {
  72. ide_hwif_t *hwif = drive->hwif;
  73. u8 unit = drive->dn & 1;
  74. u8 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
  75. if (on)
  76. dma_stat |= (1 << (5 + unit));
  77. else
  78. dma_stat &= ~(1 << (5 + unit));
  79. ide_dma_sff_write_status(hwif, dma_stat);
  80. }
  81. EXPORT_SYMBOL_GPL(ide_dma_host_set);
  82. /**
  83. * ide_build_dmatable - build IDE DMA table
  84. *
  85. * ide_build_dmatable() prepares a dma request. We map the command
  86. * to get the pci bus addresses of the buffers and then build up
  87. * the PRD table that the IDE layer wants to be fed.
  88. *
  89. * Most chipsets correctly interpret a length of 0x0000 as 64KB,
  90. * but at least one (e.g. CS5530) misinterprets it as zero (!).
  91. * So we break the 64KB entry into two 32KB entries instead.
  92. *
  93. * Returns the number of built PRD entries if all went okay,
  94. * returns 0 otherwise.
  95. *
  96. * May also be invoked from trm290.c
  97. */
  98. int ide_build_dmatable(ide_drive_t *drive, struct ide_cmd *cmd)
  99. {
  100. ide_hwif_t *hwif = drive->hwif;
  101. __le32 *table = (__le32 *)hwif->dmatable_cpu;
  102. unsigned int count = 0;
  103. int i;
  104. struct scatterlist *sg;
  105. u8 is_trm290 = !!(hwif->host_flags & IDE_HFLAG_TRM290);
  106. for_each_sg(hwif->sg_table, sg, cmd->sg_nents, i) {
  107. u32 cur_addr, cur_len, xcount, bcount;
  108. cur_addr = sg_dma_address(sg);
  109. cur_len = sg_dma_len(sg);
  110. /*
  111. * Fill in the dma table, without crossing any 64kB boundaries.
  112. * Most hardware requires 16-bit alignment of all blocks,
  113. * but the trm290 requires 32-bit alignment.
  114. */
  115. while (cur_len) {
  116. if (count++ >= PRD_ENTRIES)
  117. goto use_pio_instead;
  118. bcount = 0x10000 - (cur_addr & 0xffff);
  119. if (bcount > cur_len)
  120. bcount = cur_len;
  121. *table++ = cpu_to_le32(cur_addr);
  122. xcount = bcount & 0xffff;
  123. if (is_trm290)
  124. xcount = ((xcount >> 2) - 1) << 16;
  125. else if (xcount == 0x0000) {
  126. if (count++ >= PRD_ENTRIES)
  127. goto use_pio_instead;
  128. *table++ = cpu_to_le32(0x8000);
  129. *table++ = cpu_to_le32(cur_addr + 0x8000);
  130. xcount = 0x8000;
  131. }
  132. *table++ = cpu_to_le32(xcount);
  133. cur_addr += bcount;
  134. cur_len -= bcount;
  135. }
  136. }
  137. if (count) {
  138. if (!is_trm290)
  139. *--table |= cpu_to_le32(0x80000000);
  140. return count;
  141. }
  142. use_pio_instead:
  143. printk(KERN_ERR "%s: %s\n", drive->name,
  144. count ? "DMA table too small" : "empty DMA table?");
  145. return 0; /* revert to PIO for this request */
  146. }
  147. EXPORT_SYMBOL_GPL(ide_build_dmatable);
  148. /**
  149. * ide_dma_setup - begin a DMA phase
  150. * @drive: target device
  151. * @cmd: command
  152. *
  153. * Build an IDE DMA PRD (IDE speak for scatter gather table)
  154. * and then set up the DMA transfer registers for a device
  155. * that follows generic IDE PCI DMA behaviour. Controllers can
  156. * override this function if they need to
  157. *
  158. * Returns 0 on success. If a PIO fallback is required then 1
  159. * is returned.
  160. */
  161. int ide_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
  162. {
  163. ide_hwif_t *hwif = drive->hwif;
  164. u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
  165. u8 rw = (cmd->tf_flags & IDE_TFLAG_WRITE) ? 0 : ATA_DMA_WR;
  166. u8 dma_stat;
  167. /* fall back to pio! */
  168. if (ide_build_dmatable(drive, cmd) == 0) {
  169. ide_map_sg(drive, cmd);
  170. return 1;
  171. }
  172. /* PRD table */
  173. if (mmio)
  174. writel(hwif->dmatable_dma,
  175. (void __iomem *)(hwif->dma_base + ATA_DMA_TABLE_OFS));
  176. else
  177. outl(hwif->dmatable_dma, hwif->dma_base + ATA_DMA_TABLE_OFS);
  178. /* specify r/w */
  179. if (mmio)
  180. writeb(rw, (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
  181. else
  182. outb(rw, hwif->dma_base + ATA_DMA_CMD);
  183. /* read DMA status for INTR & ERROR flags */
  184. dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
  185. /* clear INTR & ERROR flags */
  186. ide_dma_sff_write_status(hwif, dma_stat | ATA_DMA_ERR | ATA_DMA_INTR);
  187. return 0;
  188. }
  189. EXPORT_SYMBOL_GPL(ide_dma_setup);
  190. /**
  191. * ide_dma_sff_timer_expiry - handle a DMA timeout
  192. * @drive: Drive that timed out
  193. *
  194. * An IDE DMA transfer timed out. In the event of an error we ask
  195. * the driver to resolve the problem, if a DMA transfer is still
  196. * in progress we continue to wait (arguably we need to add a
  197. * secondary 'I don't care what the drive thinks' timeout here)
  198. * Finally if we have an interrupt we let it complete the I/O.
  199. * But only one time - we clear expiry and if it's still not
  200. * completed after WAIT_CMD, we error and retry in PIO.
  201. * This can occur if an interrupt is lost or due to hang or bugs.
  202. */
  203. int ide_dma_sff_timer_expiry(ide_drive_t *drive)
  204. {
  205. ide_hwif_t *hwif = drive->hwif;
  206. u8 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
  207. printk(KERN_WARNING "%s: %s: DMA status (0x%02x)\n",
  208. drive->name, __func__, dma_stat);
  209. if ((dma_stat & 0x18) == 0x18) /* BUSY Stupid Early Timer !! */
  210. return WAIT_CMD;
  211. hwif->expiry = NULL; /* one free ride for now */
  212. if (dma_stat & ATA_DMA_ERR) /* ERROR */
  213. return -1;
  214. if (dma_stat & ATA_DMA_ACTIVE) /* DMAing */
  215. return WAIT_CMD;
  216. if (dma_stat & ATA_DMA_INTR) /* Got an Interrupt */
  217. return WAIT_CMD;
  218. return 0; /* Status is unknown -- reset the bus */
  219. }
  220. EXPORT_SYMBOL_GPL(ide_dma_sff_timer_expiry);
  221. void ide_dma_start(ide_drive_t *drive)
  222. {
  223. ide_hwif_t *hwif = drive->hwif;
  224. u8 dma_cmd;
  225. /* Note that this is done *after* the cmd has
  226. * been issued to the drive, as per the BM-IDE spec.
  227. * The Promise Ultra33 doesn't work correctly when
  228. * we do this part before issuing the drive cmd.
  229. */
  230. if (hwif->host_flags & IDE_HFLAG_MMIO) {
  231. dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
  232. writeb(dma_cmd | ATA_DMA_START,
  233. (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
  234. } else {
  235. dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
  236. outb(dma_cmd | ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD);
  237. }
  238. }
  239. EXPORT_SYMBOL_GPL(ide_dma_start);
  240. /* returns 1 on error, 0 otherwise */
  241. int ide_dma_end(ide_drive_t *drive)
  242. {
  243. ide_hwif_t *hwif = drive->hwif;
  244. u8 dma_stat = 0, dma_cmd = 0;
  245. /* stop DMA */
  246. if (hwif->host_flags & IDE_HFLAG_MMIO) {
  247. dma_cmd = readb((void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
  248. writeb(dma_cmd & ~ATA_DMA_START,
  249. (void __iomem *)(hwif->dma_base + ATA_DMA_CMD));
  250. } else {
  251. dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
  252. outb(dma_cmd & ~ATA_DMA_START, hwif->dma_base + ATA_DMA_CMD);
  253. }
  254. /* get DMA status */
  255. dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
  256. /* clear INTR & ERROR bits */
  257. ide_dma_sff_write_status(hwif, dma_stat | ATA_DMA_ERR | ATA_DMA_INTR);
  258. #define CHECK_DMA_MASK (ATA_DMA_ACTIVE | ATA_DMA_ERR | ATA_DMA_INTR)
  259. /* verify good DMA status */
  260. if ((dma_stat & CHECK_DMA_MASK) != ATA_DMA_INTR)
  261. return 0x10 | dma_stat;
  262. return 0;
  263. }
  264. EXPORT_SYMBOL_GPL(ide_dma_end);
  265. /* returns 1 if dma irq issued, 0 otherwise */
  266. int ide_dma_test_irq(ide_drive_t *drive)
  267. {
  268. ide_hwif_t *hwif = drive->hwif;
  269. u8 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
  270. return (dma_stat & ATA_DMA_INTR) ? 1 : 0;
  271. }
  272. EXPORT_SYMBOL_GPL(ide_dma_test_irq);
  273. const struct ide_dma_ops sff_dma_ops = {
  274. .dma_host_set = ide_dma_host_set,
  275. .dma_setup = ide_dma_setup,
  276. .dma_start = ide_dma_start,
  277. .dma_end = ide_dma_end,
  278. .dma_test_irq = ide_dma_test_irq,
  279. .dma_lost_irq = ide_dma_lost_irq,
  280. .dma_timer_expiry = ide_dma_sff_timer_expiry,
  281. .dma_sff_read_status = ide_dma_sff_read_status,
  282. };
  283. EXPORT_SYMBOL_GPL(sff_dma_ops);