ali14xx.c 6.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 1996 Linus Torvalds & author (see below)
  4. */
  5. /*
  6. * ALI M14xx chipset EIDE controller
  7. *
  8. * Works for ALI M1439/1443/1445/1487/1489 chipsets.
  9. *
  10. * Adapted from code developed by derekn@vw.ece.cmu.edu. -ml
  11. * Derek's notes follow:
  12. *
  13. * I think the code should be pretty understandable,
  14. * but I'll be happy to (try to) answer questions.
  15. *
  16. * The critical part is in the setupDrive function. The initRegisters
  17. * function doesn't seem to be necessary, but the DOS driver does it, so
  18. * I threw it in.
  19. *
  20. * I've only tested this on my system, which only has one disk. I posted
  21. * it to comp.sys.linux.hardware, so maybe some other people will try it
  22. * out.
  23. *
  24. * Derek Noonburg (derekn@ece.cmu.edu)
  25. * 95-sep-26
  26. *
  27. * Update 96-jul-13:
  28. *
  29. * I've since upgraded to two disks and a CD-ROM, with no trouble, and
  30. * I've also heard from several others who have used it successfully.
  31. * This driver appears to work with both the 1443/1445 and the 1487/1489
  32. * chipsets. I've added support for PIO mode 4 for the 1487. This
  33. * seems to work just fine on the 1443 also, although I'm not sure it's
  34. * advertised as supporting mode 4. (I've been running a WDC AC21200 in
  35. * mode 4 for a while now with no trouble.) -Derek
  36. */
  37. #include <linux/module.h>
  38. #include <linux/types.h>
  39. #include <linux/kernel.h>
  40. #include <linux/delay.h>
  41. #include <linux/timer.h>
  42. #include <linux/mm.h>
  43. #include <linux/ioport.h>
  44. #include <linux/blkdev.h>
  45. #include <linux/ide.h>
  46. #include <linux/init.h>
  47. #include <asm/io.h>
  48. #define DRV_NAME "ali14xx"
  49. /* port addresses for auto-detection */
  50. #define ALI_NUM_PORTS 4
  51. static const int ports[ALI_NUM_PORTS] __initconst =
  52. { 0x074, 0x0f4, 0x034, 0x0e4 };
  53. /* register initialization data */
  54. typedef struct { u8 reg, data; } RegInitializer;
  55. static const RegInitializer initData[] __initconst = {
  56. {0x01, 0x0f}, {0x02, 0x00}, {0x03, 0x00}, {0x04, 0x00},
  57. {0x05, 0x00}, {0x06, 0x00}, {0x07, 0x2b}, {0x0a, 0x0f},
  58. {0x25, 0x00}, {0x26, 0x00}, {0x27, 0x00}, {0x28, 0x00},
  59. {0x29, 0x00}, {0x2a, 0x00}, {0x2f, 0x00}, {0x2b, 0x00},
  60. {0x2c, 0x00}, {0x2d, 0x00}, {0x2e, 0x00}, {0x30, 0x00},
  61. {0x31, 0x00}, {0x32, 0x00}, {0x33, 0x00}, {0x34, 0xff},
  62. {0x35, 0x03}, {0x00, 0x00}
  63. };
  64. /* timing parameter registers for each drive */
  65. static struct { u8 reg1, reg2, reg3, reg4; } regTab[4] = {
  66. {0x03, 0x26, 0x04, 0x27}, /* drive 0 */
  67. {0x05, 0x28, 0x06, 0x29}, /* drive 1 */
  68. {0x2b, 0x30, 0x2c, 0x31}, /* drive 2 */
  69. {0x2d, 0x32, 0x2e, 0x33}, /* drive 3 */
  70. };
  71. static int basePort; /* base port address */
  72. static int regPort; /* port for register number */
  73. static int dataPort; /* port for register data */
  74. static u8 regOn; /* output to base port to access registers */
  75. static u8 regOff; /* output to base port to close registers */
  76. /*------------------------------------------------------------------------*/
  77. /*
  78. * Read a controller register.
  79. */
  80. static inline u8 inReg(u8 reg)
  81. {
  82. outb_p(reg, regPort);
  83. return inb(dataPort);
  84. }
  85. /*
  86. * Write a controller register.
  87. */
  88. static void outReg(u8 data, u8 reg)
  89. {
  90. outb_p(reg, regPort);
  91. outb_p(data, dataPort);
  92. }
  93. static DEFINE_SPINLOCK(ali14xx_lock);
  94. /*
  95. * Set PIO mode for the specified drive.
  96. * This function computes timing parameters
  97. * and sets controller registers accordingly.
  98. */
  99. static void ali14xx_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
  100. {
  101. int driveNum;
  102. int time1, time2;
  103. u8 param1, param2, param3, param4;
  104. unsigned long flags;
  105. int bus_speed = ide_vlb_clk ? ide_vlb_clk : 50;
  106. const u8 pio = drive->pio_mode - XFER_PIO_0;
  107. struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
  108. /* calculate timing, according to PIO mode */
  109. time1 = ide_pio_cycle_time(drive, pio);
  110. time2 = t->active;
  111. param3 = param1 = (time2 * bus_speed + 999) / 1000;
  112. param4 = param2 = (time1 * bus_speed + 999) / 1000 - param1;
  113. if (pio < 3) {
  114. param3 += 8;
  115. param4 += 8;
  116. }
  117. printk(KERN_DEBUG "%s: PIO mode%d, t1=%dns, t2=%dns, cycles = %d+%d, %d+%d\n",
  118. drive->name, pio, time1, time2, param1, param2, param3, param4);
  119. /* stuff timing parameters into controller registers */
  120. driveNum = (drive->hwif->index << 1) + (drive->dn & 1);
  121. spin_lock_irqsave(&ali14xx_lock, flags);
  122. outb_p(regOn, basePort);
  123. outReg(param1, regTab[driveNum].reg1);
  124. outReg(param2, regTab[driveNum].reg2);
  125. outReg(param3, regTab[driveNum].reg3);
  126. outReg(param4, regTab[driveNum].reg4);
  127. outb_p(regOff, basePort);
  128. spin_unlock_irqrestore(&ali14xx_lock, flags);
  129. }
  130. /*
  131. * Auto-detect the IDE controller port.
  132. */
  133. static int __init findPort(void)
  134. {
  135. int i;
  136. u8 t;
  137. unsigned long flags;
  138. local_irq_save(flags);
  139. for (i = 0; i < ALI_NUM_PORTS; ++i) {
  140. basePort = ports[i];
  141. regOff = inb(basePort);
  142. for (regOn = 0x30; regOn <= 0x33; ++regOn) {
  143. outb_p(regOn, basePort);
  144. if (inb(basePort) == regOn) {
  145. regPort = basePort + 4;
  146. dataPort = basePort + 8;
  147. t = inReg(0) & 0xf0;
  148. outb_p(regOff, basePort);
  149. local_irq_restore(flags);
  150. if (t != 0x50)
  151. return 0;
  152. return 1; /* success */
  153. }
  154. }
  155. outb_p(regOff, basePort);
  156. }
  157. local_irq_restore(flags);
  158. return 0;
  159. }
  160. /*
  161. * Initialize controller registers with default values.
  162. */
  163. static int __init initRegisters(void)
  164. {
  165. const RegInitializer *p;
  166. u8 t;
  167. unsigned long flags;
  168. local_irq_save(flags);
  169. outb_p(regOn, basePort);
  170. for (p = initData; p->reg != 0; ++p)
  171. outReg(p->data, p->reg);
  172. outb_p(0x01, regPort);
  173. t = inb(regPort) & 0x01;
  174. outb_p(regOff, basePort);
  175. local_irq_restore(flags);
  176. return t;
  177. }
  178. static const struct ide_port_ops ali14xx_port_ops = {
  179. .set_pio_mode = ali14xx_set_pio_mode,
  180. };
  181. static const struct ide_port_info ali14xx_port_info = {
  182. .name = DRV_NAME,
  183. .chipset = ide_ali14xx,
  184. .port_ops = &ali14xx_port_ops,
  185. .host_flags = IDE_HFLAG_NO_DMA,
  186. .pio_mask = ATA_PIO4,
  187. };
  188. static int __init ali14xx_probe(void)
  189. {
  190. printk(KERN_DEBUG "ali14xx: base=0x%03x, regOn=0x%02x.\n",
  191. basePort, regOn);
  192. /* initialize controller registers */
  193. if (!initRegisters()) {
  194. printk(KERN_ERR "ali14xx: Chip initialization failed.\n");
  195. return 1;
  196. }
  197. return ide_legacy_device_add(&ali14xx_port_info, 0);
  198. }
  199. static bool probe_ali14xx;
  200. module_param_named(probe, probe_ali14xx, bool, 0);
  201. MODULE_PARM_DESC(probe, "probe for ALI M14xx chipsets");
  202. static int __init ali14xx_init(void)
  203. {
  204. if (probe_ali14xx == 0)
  205. goto out;
  206. /* auto-detect IDE controller port */
  207. if (findPort()) {
  208. if (ali14xx_probe())
  209. return -ENODEV;
  210. return 0;
  211. }
  212. printk(KERN_ERR "ali14xx: not found.\n");
  213. out:
  214. return -ENODEV;
  215. }
  216. module_init(ali14xx_init);
  217. MODULE_AUTHOR("see local file");
  218. MODULE_DESCRIPTION("support of ALI 14XX IDE chipsets");
  219. MODULE_LICENSE("GPL");